CN110840439A - ECG signal detection circuit and ECG signal detection device - Google Patents

Abstract

The invention discloses an electrocardiographic signal detection circuit and an electrocardiographic signal detection device. The electrocardiographic signal detection circuit comprises a receiving amplifying circuit, a pacing pulse detection circuit, a pacing pulse suppression circuit and an output amplifying circuit; The pulse detection circuit is electrically connected with the receiving amplifying circuit to detect whether there is a pacing pulse signal in the ECG signal received by the receiving and amplifying circuit; the pacing pulse detection circuit is electrically connected with the pacing pulse suppression circuit to Filtering the detected pacing pulse signal; the output amplifying circuit is electrically connected to the pacing pulse suppressing circuit, so as to amplify and output the ECG signal processed by the pacing pulse suppressing circuit. The ECG signal detection circuit provided by the invention obtains the ECG signal by identifying and filtering the pacing pulse suppression circuit in the mixed signal, reduces the influence of the pacing pulse signal on the ECG signal, and provides medical staff with more accurate diagnosis and treatment. patient data.

Description

ECG signal detection circuit and ECG signal detection device

technical field

The invention relates to the field of medical monitor equipment, in particular to an electrocardiographic signal detection circuit and an electrocardiographic signal detection device.

Background technique

The tissues and body fluids around the heart can conduct electricity, so the human body can be regarded as a volume conductor with three dimensions of length, width and thickness. The heart is like a power source, and the sum of the action potential changes of countless cardiomyocytes can be conducted and reflected on the body surface. There are potential differences between many points on the body surface, and there are also many points that are isoelectric with no potential difference between each other. In each cardiac cycle, the heart is excited successively by the pacemaker, atrium, and ventricle, accompanied by changes in bioelectricity, which are called ECG. There are potential differences between different points on the surface of the human body, and by collecting these potential differences, an electrocardiogram can be drawn. ECG signal is a biomedical signal and is an approximate periodic signal, which is characterized by strong mutation. ECG signal has the characteristics of weakness, low frequency, high impedance, instability, randomness and so on. The ECG signal can be correctly extracted, and the ECG signal can be drawn. The amplitude of the ECG signal is very small, generally 10μV ~ 4mV, and the typical value is 1mV.

A pacemaker is an electrical stimulator that produces periodic electrical pulses. The pulses generated are transmitted to the heart through electrodes. Causes the heart to contract. The function of restoring the heart to normal heart rate work. The human body is a volume conductor. The pacing signal and the ECG signal will be collected by the ECG measurement circuit. The strong pacing signal will affect the characteristics of the ECG signal itself, resulting in incorrect diagnosis, and in severe cases, the circuit will be saturated. Overwhelm the ECG signal.

SUMMARY OF THE INVENTION

The main purpose of the present invention is to provide an ECG signal detection circuit and an ECG signal detection device, which can reduce the impact of the pacing pulse signal on the acquisition of the ECG signal during the process of using a cardiac pacemaker to treat a patient.

In order to achieve the above purpose, the present invention provides an ECG signal detection circuit, the ECG signal detection circuit includes a receiving amplifier circuit, a pacing pulse detection circuit, a pacing pulse suppression circuit, and an output amplifier circuit; the pacing pulse detection circuit The detection circuit is electrically connected with the receiving amplifying circuit to detect whether there is a pacing pulse signal in the ECG signal received by the receiving and amplifying circuit; the pacing pulse detection circuit is electrically connected with the pacing pulse suppression circuit to The detected pacing pulse signal is filtered; the output amplifying circuit is electrically connected to the pacing pulse suppressing circuit, so as to amplify and output the ECG signal processed by the pacing pulse suppressing circuit.

Further, the ECG signal detection circuit further includes a high-frequency noise filter circuit, and the high-frequency noise filter circuit is electrically connected to the receiving amplifying circuit and the pacing pulse detection circuit, respectively, to filter the high-frequency noise signal.

Further, the pacing pulse detection circuit includes a pacing pulse identification unit that is electrically connected to the high-frequency noise filter circuit to identify the pacing pulse signal by highlighting the characteristics of the pacing pulse signal.

Further, the pacing pulse identification unit includes a first resistor, a second resistor, a first capacitor, a second capacitor and a first amplifier, the first resistor is connected in series with the second resistor, and the second resistor is connected in series. The second terminal is electrically connected to the positive pole of the first amplifier, the first terminal of the first capacitor is connected between the first resistor and the second resistor, and the second terminal of the first capacitor is connected to the The negative electrode of the first amplifier is electrically connected to the output end, the first end of the second capacitor is connected between the second resistor and the first amplifier, and the second end of the second capacitor is grounded.

Further, the pacing pulse detection circuit further includes a level adjustment unit, and the level adjustment unit includes a logic level shaping part and a logic level stabilizing part; the logic level shaping part and the logic level stabilizing part The part is electrically connected to adjust the amplitude of the detected pacing pulse signal to a logic level, and perform signal enhancement and signal stabilization processing on the logic level.

Further, the pacing pulse detection circuit further includes a pulse detection switch unit, and the pulse detection switch unit is electrically connected to the pacing pulse suppression circuit to control the detection of the pacing pulse signal of the ECG signal detection circuit and turn on the suppression function.

Further, the pacing pulse suppression circuit includes a first MOS transistor, a second MOS transistor and a third capacitor, the source of the first MOS transistor is electrically connected to the source of the second MOS transistor, and the source of the first MOS transistor is electrically connected. The drain is electrically connected to the high-frequency noise filter circuit, the drain of the second MOS transistor is electrically connected to the third capacitor, and a pacing pulse suppression is formed between the second MOS transistor and the third capacitor node to filter out the pacing pulse signal in the ECG signal.

Further, the ECG signal detection circuit further includes a low-frequency noise filter circuit, which is electrically connected to the high-frequency noise filter circuit and the pacing pulse suppression circuit, so as to filter out the low-frequency noise of the ECG signal. noise.

Further, the ECG signal detection circuit further includes a signal conduction acceleration circuit, and the signal conduction acceleration circuit is electrically connected with the low-noise filter circuit to accelerate the signal conduction.

The present invention further provides an ECG signal detection device, the ECG signal detection device includes the ECG signal detection circuit described in any one of the above.

The beneficial effect of the electrocardiographic signal detection circuit provided by the present invention is that the characteristics of the pacing pulse signal are highlighted by the second-order pacing pulse detection circuit, and the pacing pulse signal is adjusted to be a positive pulse level through the level adjustment unit, so that the pacing pulse signal is at a positive pulse level. The logic level of the pulse signal is enhanced and stable, which facilitates the subsequent filtering of the pacing pulse signal to obtain a cleaner ECG signal, reduces the impact of the pacing pulse signal on the ECG signal, and provides more accurate data for medical staff.

Description of drawings

1 is a schematic structural diagram of an ECG signal detection circuit provided by an embodiment of the present invention;

2 is a schematic structural diagram of a pacing pulse detection circuit according to an embodiment of the present invention;

3 is a schematic circuit diagram of a pacing pulse identification unit according to an embodiment of the present invention;

4 is a schematic circuit diagram of a pacing pulse signal detection differential filter circuit according to an embodiment of the present invention;

5 is a schematic circuit diagram of a level adjustment unit according to an embodiment of the present invention;

6 is a schematic circuit diagram of a pulse detection switch unit according to an embodiment of the present invention;

7 is a schematic circuit diagram of a pacing pulse suppression circuit according to an embodiment of the present invention;

8 is a schematic circuit diagram of a receiving amplifying circuit according to an embodiment of the present invention;

9 is a schematic circuit diagram of a high-frequency noise filter circuit according to an embodiment of the present invention;

10 is a schematic circuit diagram of a low-frequency noise filter circuit according to an embodiment of the present invention;

11 is a schematic circuit diagram of a conduction acceleration circuit according to an embodiment of the present invention;

12 is a schematic circuit diagram of an output amplifying circuit according to an embodiment of the present invention;

The realization, functional characteristics and advantages of the present invention will be further described with reference to the accompanying drawings in conjunction with the embodiments.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

The terms "first", "second", "third", "fourth", etc. (if any) in the description and claims of this application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It is to be understood that data so used may be interchanged under appropriate circumstances so that the embodiments described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having" and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those expressly listed Rather, those steps or units may include other steps or units not expressly listed or inherent to these processes, methods, products or devices.

It should be noted that the descriptions involving "first", "second", etc. in the present invention are only for the purpose of description, and should not be construed as indicating or implying their relative importance or implying the number of indicated technical features . Thus, a feature delimited with "first", "second" may expressly or implicitly include at least one of that feature. In addition, the technical solutions between the various embodiments can be combined with each other, but must be based on the realization by those of ordinary skill in the art. When the combination of technical solutions is contradictory or cannot be realized, it should be considered that the combination of such technical solutions does not exist. , is not within the scope of protection required by the present invention.

The embodiments provided by the present invention include an ECG signal detection device, the ECG signal detection device includes an ECG signal detection circuit, and the ECG signal detection circuit can be connected through an ECG lead wire of the ECG signal detection device The patient's body collects the patient's ECG signal, and when the patient is treated with a pacemaker, the ECG signal detection circuit can suppress the interference of the pacing pulse signal on the ECG signal and reduce the external interference of the doctor's diagnosis.

1-2, the ECG signal detection circuit includes a receiving amplifying circuit 11, a pacing pulse detecting circuit 12, a pacing pulse suppressing circuit 14, and an output amplifying circuit 17; the receiving amplifying circuit 11; the The pacing pulse detection circuit 12 is electrically connected to the receiving amplifying circuit 11 to detect whether there is a pacing pulse signal in the ECG signal received by the receiving amplifying circuit 11; the pacing pulse detecting circuit 12 is connected to the pacing pulse suppression The circuit 14 is electrically connected to filter the detected pacing pulse signal; the output amplifying circuit 17 is electrically connected to the pacing pulse suppression circuit 14 to The electrical signal is amplified and output.

In this embodiment, the ECG signal mixed with the pacing pulse signal enters the ECG signal detection circuit through the ECG lead wire, and the weak ECG signal and the pacing pulse signal are amplified by the receiving amplifying circuit 11; The detection circuit 12 determines whether there is a pacing pulse signal. If there is a pacing pulse signal, the pacing pulse suppression circuit 14 performs filtering, and finally the output amplifier circuit 17 amplifies and outputs the ECG signal of the filtered pacing pulse signal.

Preferably, the ECG signal detection circuit further includes a high-frequency noise filter circuit 13, and the high-frequency noise filter circuit 13 is electrically connected to the receiving amplifying circuit 11 and the pacing pulse detection circuit 12, respectively, so as to filter the cardiac High frequency noise signal of electrical signal.

Specifically, the signal received by the receiving amplifier circuit 11 is simultaneously sent to the pacing pulse detection circuit 12 and the high-frequency noise filter circuit 13. When the received signal enters the pacing pulse detection circuit 12 and the pacing pulse signal is detected, the The received ECG signal is sent to the pacing pulse suppression circuit 14 to filter the pacing pulse signal, and the high frequency noise filter circuit 13 filters the high frequency noise signal. If there is no pacing pulse signal, high-frequency noise filtering is performed directly to remove the high-frequency noise signal in the received ECG signal. Specifically, the ECG signal and the pacing pulse signal belong to the low-frequency signal, and the high-frequency noise filter circuit 13 removes the high-frequency noise signal.

Preferably, the ECG signal detection circuit further includes a low-frequency noise filter circuit 15, and the low-frequency noise filter circuit 15 is electrically connected to the high-frequency noise filter circuit 13 and the pacing pulse suppression circuit 14 to filter out the heart rate. Low frequency noise of electrical signals.

Specifically, the low-frequency noise filter will remove high-frequency noise and the ECG signal of the pacing pulse signal to remove low-frequency signals, such as baseline drift, so as to make the output ECG signal more accurate.

Preferably, the ECG signal detection circuit further includes a signal conduction acceleration circuit 16, and the signal conduction acceleration circuit 16 is electrically connected to the low-noise filter circuit to accelerate signal conduction.

Specifically, the signal conduction acceleration circuit 16 effectively improves the signal transmission rate through the charging and discharging of the capacitor itself, so that the ECG information of the patient can be reflected more quickly.

Referring to FIG. 3 , the pacing pulse detection circuit 12 includes a pacing pulse identification unit 121 , and the pacing pulse identification unit 121 is electrically connected to the high-frequency noise filter circuit 13 to highlight the characteristic identification of the pacing pulse signal. Pacing pulse signal.

Specifically, the pacing pulse identification unit 121 includes a first resistor R1, a second resistor R1, a first capacitor C1, a second capacitor C2 and a first amplifier U1, and the second end of the first resistor R1 is connected to the The second resistor R2 is electrically connected, and the first end of the first resistor R1 is connected to the PaceA end to receive the mixed signal of the ECG signal and the pacing pulse signal output by the receiving amplifying circuit 11; The terminal is electrically connected to the positive pole of the first amplifier U1, the first terminal of the first capacitor C1 is connected between the first resistor U1 and the second resistor U2, and the second terminal of the first capacitor C1 is respectively It is electrically connected to the negative electrode and the output end of the first amplifier U1, the first end of the second capacitor C2 is connected between the second resistor C2 and the first amplifier U1, and the second capacitor C2 The second terminal is grounded. The first resistor R1, the second resistor R2, the first capacitor C1, the second capacitor C2 and the first amplifier U1 form a second-order active filter, which receives the mixed signal of the ECG signal and the pacing pulse signal input by the amplifier circuit 11 and passes through the filter. The second-order active filter highlights the characteristics of the pacing pulse signal to identify the pacing pulse signal. The characteristics of the pacing pulse signal can refer to the standard amplitude and figure shape established by the American Association for the Advancement of Medical Devices. In this embodiment, the first amplifier U1 may be an operational amplifier ADTL082ARM. In this embodiment, in order to prevent the interference signal from being misjudged as a pacing pulse signal, the output end of the pacing pulse detection circuit 12 is further connected with a pacing pulse signal detection differential filter circuit. Specifically, please refer to FIG. 4, the pacing pulse signal detection differential filter circuit includes a capacitor C3, a capacitor C4, a resistor R3, a resistor R4 and a second amplifier U2,. Specifically, the output terminal of the pacing pulse detection circuit 12 is electrically connected to the first terminal of the capacitor C3, and the second terminal of the capacitor C3 is electrically connected to the resistor R3 to form a differential circuit. The capacitor C4 is connected in parallel with the resistor R4 and connected to the second terminal. The negative input terminal and the output terminal of the amplifier U2 are electrically connected to form a low-pass filter, and the differential circuit is electrically connected to the low-pass filter. Using the time constant characteristics of the differential circuit, the ORS peak group of the ECG waveform can be effectively filtered out, and the low-pass filter is retained. pulse signal. The low-pass filter filters out noise and prevents interference signals from being misjudged as pacing pulse signals. The resistor R5 and the capacitor C5 form a first-order low-pass filter, which is electrically connected to the positive input terminal of the second amplifier U2 to reduce noise on the reference voltage of the positive input terminal of the second amplifier to ensure the normal and stable operation of the operational amplifier. The second amplifier U2 can be an ADTL082ARM.

Preferably, the pacing pulse detection circuit 12 further includes a level adjustment unit 122, and the level adjustment unit 122 includes a logic level shaping unit and a logic level stabilizing unit; the logic level shaping unit and the logic level shaping unit The level stabilization unit is electrically connected to adjust the amplitude of the detected pacing pulse signal to a logic level, and perform signal enhancement and signal stabilization processing on the logic level.

Specifically, referring to FIG. 5 , the level adjustment unit 122 is configured to adjust the level of the pacing pulse signal, and enhance and stabilize the logic level of the pacing pulse signal. Specifically, the logic level shaping unit includes a resistor R6, a resistor R7, a resistor R8, a resistor R9, a third amplifier U3 and a fourth amplifier U4. Specifically, the resistor R6 is electrically connected to the resistor R7, and the resistor R7 is electrically connected to the resistor R8. Connection, resistor R8 and resistor R9 are electrically connected, the negative terminal of the third amplifier U3 is connected between the resistor R6 and the resistor R7, the positive terminal of the fourth amplifier U4 is connected between the resistor R8 and the resistor R9, and the third amplifier U3 The node that is electrically connected to the positive terminal of the fourth amplifier U4 and the negative terminal of the fourth amplifier U4 is electrically connected to the pacing pulse identification unit 121, and a window comparator is formed by two amplifiers to process the pacing pulse signal output by the pacing pulse identification unit 121. , the amplitude of the pacing pulse signal is unified into a logic level. The third amplifier U3 and the fourth amplifier U4 are both ISL28213FC operational amplifiers. The logic level stabilizing part includes a semiconductor diode D1 and a resistor R10. The two input pins of the semiconductor diode D1 are respectively electrically connected to the output end of the third amplifier U3 and the output end of the fourth amplifier U4, and the output end of the semiconductor diode D1 is electrically connected A resistor R10 is used, and the other end of the resistor R10 is electrically connected to the ground. Through the semiconductor diode D1, the logic level of the pacing pulse signal is the same as the positive pulse signal, and through the resistor R10, the circuit is stabilized. The logic level stabilizing part also includes a first NAND gate U1 and a second NAND gate U2, the first NAND gate U1 and the second NAND gate U2 are electrically connected to process the pacing pulse signal of the positive pulse signal. Logic level enhanced stability.

Preferably, the pacing pulse detection circuit 12 further includes a pulse detection switch unit 123, and the pulse detection switch unit 123 is electrically connected to the pacing pulse suppression circuit 14 to control the pacing of the ECG signal detection circuit Pulse signal detection and suppression are turned on.

Specifically, please refer to FIG. 6 , the pulse detection switch unit 123 includes a field effect transistor Q3, and the PaceCon terminal of the field effect transistor Q1 is electrically connected to the central control unit of the ECG signal detection device. During the electrocardiogram, the pulse detection switch unit 123 is turned on, and the amplified electrocardiographic signal of the receiving amplifier circuit 11 is controlled to be transmitted to the pacing pulse detection circuit 12 .

Preferably, please refer to FIG. 7 , the pacing pulse suppression circuit 14 includes a first MOS transistor Q1, a second MOS transistor Q2 and a third capacitor C6, the source of the first MOS transistor Q1 and the source of the second MOS transistor Q2 The drain of the first MOS transistor Q1 is electrically connected to the high-frequency noise filter circuit 13; the drain of the second MOS transistor Q2 is electrically connected to the third capacitor C6, and the second MOS transistor Q2 is electrically connected to the third capacitor C6. A pacing pulse suppression node is formed between the MOS transistor Q2 and the third capacitor C3 to filter out the pacing pulse signal in the ECG signal.

Specifically, the drain of the first MOS transistor is electrically connected to the high-frequency noise filter circuit 13 to obtain a mixed signal, the first MOS transistor Q1 is electrically connected to the gate of the second MOS transistor Q2, and is electrically connected to the pacing pulse detection circuit 12 , to obtain the detection result of the presence of a pacing pulse signal. When the pacing pulse detection circuit 12 detects the presence of a pacing pulse signal, the first MOS transistor Q1 and the second MOS transistor Q2 are turned on, and the pacing pulse suppression node will be pulled down. Pacing pulse signal until the pacing pulse signal is filtered out, so as to achieve the effect of suppressing the pacing pulse signal.

Preferably, please refer to FIG. 8 , the receiving amplifier circuit 11 includes a differential amplifier U3, and IN- and IN+ of the differential amplifier U3 are connected to the left leg and right arm of the human body through ECG lead wires to receive the user's ECG signal. The specific connection parts can be connected according to the specific situation, which is not limited here. The resistor R11 is connected to the RG- and RG+ of the differential amplifier U3 to adjust the amplification factor of the differential amplifier U3. The VSS of the differential amplifier U3 is electrically connected to the capacitor C7, the VDD of the differential amplifier U3 is electrically connected to the capacitor C8, and the capacitor C9 and the Ref interface of the differential amplifier U3 are simultaneously connected to 1.65V as the reference voltage of the differential amplifier. Specifically, the capacitor C7, the capacitor C8 and the capacitor C9 are all filter capacitors of the power supply. The signal at PaceA is transmitted to the pacing pulse detection circuit 12 for signal detection.

Preferably, please refer to FIG. 9 , the high-frequency noise filter circuit 13 includes a resistor R12, a resistor R13, a capacitor C10 and a capacitor C11, the resistor R12 is connected in series with the resistor R13, and the capacitor C10 and the capacitor C11 are respectively electrically connected to two of the resistor R13. terminal, and the capacitor C11 is connected between the resistor R12 and the resistor R13, and at the same time, the other ends of the capacitor C10 and the capacitor C11 are grounded. In addition, the resistor R13 and the capacitor C11 are electrically connected to the pacing pulse suppressing circuit 14 , and the pacing pulse suppressing circuit 14 suppresses the pulse. The circuit consists of two sets of resistors and capacitors, R12 and C10 form a first-order low-pass filter, and then add a set of resistors and capacitors R13 and C11 to form a second-order low-pass filter. The function of the low-pass filter is to block the high frequency and pass the low frequency, that is, the high-frequency noise will be filtered out, and the low-frequency signal can pass through. The ECG signal and pacing pulse belong to the low-frequency signal, and the low-pass filter can be filtered out. High-frequency noise in ECG signals.

Preferably, please refer to FIG. 10 , the low-frequency noise filter circuit 15 includes a capacitor C12, a resistor R14 and a resistor R15 to form a high-pass filter. The function of the high-pass filter is to block low-frequency and high-frequency signals, that is, low-frequency signals, such as baseline drift. etc., will be filtered out by the high-pass filter, and the signal of high frequency band can pass. As a result, the high-frequency noise filter circuit 13 and the low-frequency noise filter circuit 15 become band-pass filters. The band-pass filter only allows frequency signals within a specified range to pass through, and frequencies beyond this range will be filtered out. The filter is also designed to effectively extract the ECG signal and pass the pacing pulse signal.

Preferably, please refer to FIG. 11 , the conduction acceleration circuit 16 includes a resistor R16 and a resistor R17 and a control chip U6, specifically, the control chip is MC14053BDTR2. The conduction acceleration circuit 16 is electrically connected to the low-frequency noise filter circuit 15 to control the capacitor charging acceleration in the low-frequency noise filter circuit 15 to increase the signal conduction speed.

Preferably, please refer to FIG. 12 , the output amplifying circuit 17 includes a fifth amplifier U5 , a resistor R18 , a resistor R19 , a resistor R20 and a capacitor C13 . The fifth amplifier U5 adopts the operational amplifier ISL28213FUZ, the reference voltage of the operational amplifier is 1.65V, and forms an active filter with resistor R18, resistor R19, resistor R20 and capacitor C13, which not only has the effect of amplification, but also has the effect of filtering noise.

The ECG signal detection circuit provided by the above embodiment highlights the characteristics of the pacing pulse signal through the second-order pacing pulse detection circuit 12, and adjusts the pacing pulse signal to a positive pulse level through the level adjustment unit, so that the pacing pulse signal is at a positive pulse level. The logic level is enhanced and stable, which is convenient for subsequent filtering of the pacing pulse signal, obtaining a cleaner ECG signal, reducing the impact of the pacing pulse signal on the ECG signal, and providing more accurate data for medical staff.

Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, device and unit described above may refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.

The above are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields , are similarly included in the scope of patent protection of the present invention.

Claims (10)

1. An ECG signal detection circuit, characterized in that the ECG signal detection circuit comprises a receiving amplifier circuit, a pacing pulse detection circuit, a pacing pulse suppression circuit, and an output amplifier circuit; the pacing pulse detection circuit and The receiving amplifying circuit is electrically connected to detect whether there is a pacing pulse signal in the ECG signal received by the receiving amplifying circuit; the pacing pulse detection circuit is electrically connected to the pacing pulse suppression circuit to The pacing pulse signal is filtered; the output amplifying circuit is electrically connected to the pacing pulse suppressing circuit, so as to amplify and output the ECG signal processed by the pacing pulse suppressing circuit. 2 . The ECG signal detection circuit according to claim 1 , wherein the ECG signal detection circuit further comprises a high-frequency noise filter circuit, and the high-frequency noise filter circuit is respectively connected with the receiving amplifying circuit and the receiving amplifier circuit. 3 . The pacing pulse detection circuit is electrically connected to filter high frequency noise signals. 3. The electrocardiographic signal detection circuit according to claim 1 or 2, wherein the pacing pulse detection circuit comprises a pacing pulse identification unit, and the pacing identification unit is electrically connected to the high-frequency noise filter circuit. connected to highlight the amplitude characteristics of the pacing pulse signal and identify the pacing pulse signal. 4. The electrocardiographic signal detection circuit according to claim 3, wherein the pacing pulse identification unit comprises a first resistor, a second resistor, a first capacitor, a second capacitor and a first amplifier, and the first A resistor is connected in series with the second resistor, the second end of the second resistor is electrically connected to the positive electrode of the first amplifier, and the first end of the first capacitor is connected to the first resistor and the second resistor The second end of the first capacitor is electrically connected to the negative electrode and the output end of the first amplifier, respectively, and the first end of the second capacitor is connected to the connection between the second resistor and the first amplifier. During this time, the second end of the second capacitor is grounded. 5 . The ECG signal detection circuit according to claim 3 , wherein the pacing pulse detection circuit further comprises a level adjustment unit, and the level adjustment unit the logic level shaping part and the logic level stabilization part are electrically connected to adjust the amplitude of the detected pacing pulse signal to a logic level, and perform signal enhancement and signal enhancement on the logic level Stable handling. 6 . The ECG signal detection circuit according to claim 3 , wherein the pacing pulse detection circuit further comprises a pulse detection switch unit, and the pulse detection switch unit is electrically connected to the pacing pulse suppression circuit, 6 . to control the activation of the detection and suppression functions of the pacing pulse signal of the ECG signal detection circuit. 7 . The ECG signal detection circuit according to claim 2 , wherein the pacing pulse suppression circuit comprises a first MOS transistor, a second MOS transistor and a third capacitor, and the source of the first MOS transistor is connected to the first MOS transistor. 8 . The sources of the two MOS transistors are electrically connected, the drain of the first MOS transistor is electrically connected to the high-frequency noise filter circuit, the drain of the second MOS transistor is electrically connected to the third capacitor, and the first MOS transistor is electrically connected to the third capacitor. A pacing pulse suppression node is formed between the two MOS transistors and the third capacitor, so as to filter out the pacing pulse signal in the ECG signal. 8 . The ECG signal detection circuit according to claim 2 , wherein the ECG signal detection circuit further comprises a low-frequency noise filter circuit, the low-frequency noise filter circuit is connected to the high-frequency noise filter circuit and the The pacing pulse suppression circuit is electrically connected to filter out low frequency noise of the ECG signal. 9 . The ECG signal detection circuit according to claim 3 , wherein the ECG signal detection circuit further comprises a signal conduction acceleration circuit, and the signal conduction acceleration circuit is electrically connected to the low-noise filter circuit to Accelerates signaling. 10. An ECG signal detection device, characterized in that the ECG signal detection device comprises the ECG signal detection circuit according to any one of the preceding claims 1-9.

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