CN110797431B - Relaxed GeSn infrared avalanche photodetector and its fabrication method - Google Patents
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- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
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Abstract
本发明涉及半导体制造技术领域，尤其涉及一种驰豫GeSn红外雪崩光电探测器及其制造方法。所述驰豫GeSn红外雪崩光电探测器，包括衬底以及沿垂直于所述衬底的方向依次层叠于衬底上的电荷倍增结构、缓冲层和吸收层；所述电荷倍增结构采用Si材料构成；所述吸收层采用驰豫Ge1‑xSnx材料构成，其中，0<x<1；所述缓冲层采用Si1‑yGey材料构成，其中，0.2<y<0.8，且其缺陷密度大于预设值，以限制由所述Si材料与所述驰豫Ge1‑xSnx材料晶格失配引起的线位错传播。本发明有着大的光电流放大倍数和高的灵敏度，同时避免了厚的驰豫Ge缓冲层的生长，使得缺陷位错局限在缓冲层中，从而保证高质量的驰豫GeSn吸收层的生长。
The invention relates to the technical field of semiconductor manufacturing, in particular to a relaxation GeSn infrared avalanche photodetector and a manufacturing method thereof. The relaxation GeSn infrared avalanche photodetector includes a substrate and a charge multiplying structure, a buffer layer and an absorption layer sequentially stacked on the substrate along a direction perpendicular to the substrate; the charge multiplying structure is made of Si material ; The absorption layer is composed of relaxation Ge 1-x Sn x material, wherein 0<x<1; The buffer layer is composed of Si 1-y Ge y material, wherein 0.2<y<0.8, and its defects The density is greater than a preset value to limit the propagation of linear dislocations caused by lattice mismatch of the Si material with the relaxed Ge 1-x Snx material. The present invention has large photocurrent magnification and high sensitivity, while avoiding the growth of a thick relaxed Ge buffer layer, so that defect dislocations are confined in the buffer layer, thereby ensuring the growth of a high-quality relaxed GeSn absorption layer.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a relaxation GeSn infrared avalanche photodetector and a manufacturing method thereof.
Background
The infrared photoelectric detector has wide application in communication, night vision, guidance, astronomical observation, biomedical treatment and the like. Compared with the traditional III-V family and II-V family infrared photoelectric detectors, the IV family infrared photoelectric detector is compatible with the Si-based CMOS process in the preparation process, and has the potential advantages of small volume, easy integration, low cost, high performance and the like. Ge detectors based On Si substrates or SOI (Silicon On Insulator) substrates have gained wide applications in the fields of communications and sensing. However, the absorption coefficient of Ge materials drops sharply at wavelengths greater than 1.55 μm, which makes Ge detectors unsatisfactory for short-wave infrared and even mid-infrared applications. The detection range of the Ge can be extended by introducing Sn into the Ge, and the detection range can be extended to a short-wave infrared band or even a middle-infrared band along with the increase of Sn components. In recent years, GeSn infrared photodetectors have been extensively studied.
However, conventional GeSn p-i-n type photodetectors have limited sensitivity due to a lack of an internal gain mechanism. In addition, due to the large lattice mismatch between GeSn and Si, reported GeSn infrared photodetectors typically incorporate a thick layer of relaxed Ge material as a buffer layer, and then epitaxially grow a strained GeSn material thereon as an absorber layer. The thickness of the strain GeSn absorbing layer is limited by the strain relaxation critical thickness, thereby limiting the responsivity of the infrared photodetector. Meanwhile, the thick relaxed Ge buffer layer may limit the design of the detector, especially the design of the avalanche photodetector, making it difficult to optimize the performance of the detector.
Therefore, how to improve the sensitivity of the GeSn infrared photodetector is a technical problem to be solved urgently at present.
Disclosure of Invention
The invention provides a relaxation GeSn infrared avalanche photodetector and a manufacturing method thereof, which are used for solving the problem of low sensitivity of the existing GeSn infrared photodetector.
In order to solve the above problems, the present invention provides a relaxed GeSn infrared avalanche photodetector, comprising a substrate, and a charge multiplication structure, a buffer layer and an absorption layer sequentially stacked on the substrate along a direction perpendicular to the substrate;
the charge multiplication structure is made of Si material;
the absorption layer adopts relaxed Ge1-xSnxA material composition of, wherein 0<x<1；
The buffer layer has a defect density greater than a predetermined value to limit a defect density caused by the Si material and the relaxed Ge1-xSnxPropagation of threading dislocations due to lattice mismatch of materials.
Preferably, the buffer layer adopts Si1-yGeyMaterial composition of, wherein, 0.2<y<0.8。
Preferably, the buffer layer has a thickness of 30nm to 80 nm.
Preferably, the method further comprises the following steps:
a lower contact layer on the substrate;
an upper contact layer laminated on a surface of the absorption layer in a direction perpendicular to the substrate;
the n-electrode is positioned on the surface of the lower contact layer;
and the p-electrode is positioned on the surface of the upper contact layer.
Preferably, the charge multiplication structure comprises a multiplication layer and a charge layer which are sequentially laminated on the surface of the lower contact layer along a direction vertical to the substrate;
the lower contact layer is an n-type Si contact layer, and the upper contact layer is p-type Ge1-aSnaA contact layer, the charge layer being a p-type Si charge layer; and 0 is more than or equal to a<1。
In order to solve the above problems, the present invention further provides a method for manufacturing a relaxed GeSn infrared avalanche photodetector, comprising the following steps:
providing a substrate;
epitaxially growing a Si material on the substrate to form a charge multiplication structure;
epitaxially growing a buffer layer on the charge multiplying structure, the buffer layer having a defect density greater than a predetermined value to confine the charge multiplying structure to the Si material and the relaxed Ge1-xSnxPropagation of threading dislocations due to lattice mismatch of the material, wherein 0<x<1；
Epitaxially growing the relaxed Ge1-xSnxAnd forming an absorption layer on the buffer layer.
Preferably, the epitaxial growth of the Si material on the substrate includes the specific steps of:
epitaxially growing an n-type Si material on the surface of the substrate to form a lower contact layer;
epitaxially growing an intrinsic Si material on the surface of the lower contact layer to form a multiplication layer;
and epitaxially growing a p-type Si material on the surface of the multiplication layer to form a charge layer.
Preferably, the step of epitaxially growing a buffer layer on the charge multiplying structure comprises:
epitaxial growth of Si1-yGeyForming the buffer layer on the surface of the charge layer with 0.2 g<y<0.8。
Preferably, the buffer layer has a thickness of 30nm to 80 nm.
Preferably, the method further comprises the following steps after the absorption layer is formed:
epitaxially growing p-type Ge1-aSnaForming an upper contact layer on the surface of the absorption layer, wherein a is more than or equal to 0<1；
Depositing a first conductive material on the surface of the lower contact layer to form an n-electrode;
and depositing a second conductive material on the surface of the upper contact layer to form a p-electrode.
The relaxation GeSn infrared avalanche photodetector and the manufacturing method thereof provided by the invention have the following advantages in three aspects: firstly, a GeSn material is adopted as an absorption layer, so that the method can be compatible with the existing CMOS process; secondly, compared with the traditional GeSn p-i-n type infrared photodetector, the infrared photoelectric detector adopts a structure of multiplying and separating absorption charges into avalanche photodetectors, and has large photoelectric current amplification times and high sensitivity; and thirdly, a buffer layer with defect density larger than a preset value is introduced between the charge multiplication structure and the absorption layer, so that the growth of a thick relaxation Ge buffer layer is avoided, and defect dislocation is limited in the buffer layer, thereby ensuring the growth of a high-quality relaxation GeSn absorption layer.
Drawings
FIG. 1 is a schematic structural diagram of a relaxed GeSn infrared avalanche photodetector according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method for fabricating a relaxed GeSn infrared avalanche photodetector according to an embodiment of the present invention;
fig. 3A-fig. 3G are schematic diagrams of main process structures in the manufacturing process of the relaxed GeSn infrared avalanche photodetector according to the embodiment of the present invention.
Detailed Description
The following describes in detail specific embodiments of the relaxed GeSn infrared avalanche photodetector and the manufacturing method thereof according to the present invention with reference to the accompanying drawings.
The present embodiment provides a relaxed GeSn infrared avalanche photodetector, and fig. 1 is a schematic structural diagram of the relaxed GeSn infrared avalanche photodetector according to the present embodiment. As shown in fig. 1, the relaxed GeSn infrared avalanche photodetector provided in this embodiment includes a substrate 10, and a charge multiplication structure, a buffer layer 13, and an absorption layer 14 sequentially stacked on the substrate 10 along a direction perpendicular to the substrate 10; the charge multiplication structure is made of Si material; the absorption layer 14 adopts relaxed Ge1-xSnxA material composition of, wherein 0<x<1; the buffer layer 13 has a defect density greater than a predetermined value to limit the generation of Si from the Si material and the relaxed Ge1-xSnxPropagation of threading dislocations due to lattice mismatch of materials. Wherein the preset value is preferably 1 × 1015/cm3。
In this embodiment relaxed Ge is used1-xSnxAs the material of the absorption layer, the detection range of the detector is expanded, and the material can be compatible with a CMOS process. Infrared light is absorbed by the absorbing layer 14 and photogenerated carriers are accelerated into the charge multiplying structure by the electric field. The charge multiplication structure is made of Si material and is used for leading the charge to come from the charge multiplication structure through avalanche multiplication effectThe photocurrent of the absorption layer 14 is increased, resulting in an increased photoresponse and an increased detector sensitivity. Meanwhile, the charge multiplication structure made of Si material and the silicon-based semiconductor material made of relaxed Ge1-xSnxThe buffer layer 13 with high defect density is introduced between the absorption layers 14 made of materials, so that the growth of a thick relaxed Ge buffer layer is avoided. Moreover, by introducing a large number of point defects into the buffer layer 13, propagation of threading dislocations caused by lattice mismatch is effectively limited, so that the defect dislocations are confined in the buffer layer 13, thereby ensuring high quality of relaxed Ge1-xSnxAnd growing an absorption layer.
The relative content of the Ge component and the Sn component in the absorption layer 14 can be adjusted by those skilled in the art according to actual needs. In general, in the absorption layer 14, as the Sn composition increases, the GeSn alloy band gap becomes smaller and the detection range is expanded. Therefore, to obtain a larger detection range, 0< x <0.4 is preferable.
In order to further improve the growth quality of the absorption layer 14, it is preferable that Si is used for the buffer layer 131-yGeyMaterial composition of, wherein, 0.2<y<0.8. In order to further optimize the performance of the relaxed GeSn infrared avalanche photodetector, the thickness of the buffer layer 13 is preferably 30nm to 80 nm. More preferably, the thickness of the buffer layer 13 is 50 nm.
Preferably, the relaxed GeSn infrared avalanche photodetector provided in this embodiment further includes: a lower contact layer 15 on the substrate 10; an upper contact layer 16 laminated on a surface of the absorption layer 14 in a direction perpendicular to the substrate 10; an n-electrode 17 on the surface of the lower contact layer 15; a p-electrode 18 located on the surface of the upper contact layer 16. More preferably, the charge multiplication structure comprises a multiplication layer 11 and a charge layer 12 which are sequentially laminated on the surface of the lower contact layer 15 along a direction vertical to the substrate 10; the lower contact layer 15 is an n-type Si contact layer, and the upper contact layer 16 is p-type Ge1-aSnaA contact layer, the charge layer 12 being a p-type Si charge layer; and 0 is more than or equal to a<1。
Specifically, the charge multiplying structure comprisesThe multiplication layer 11 and the charge layer 12 are laminated on the surface of the lower contact layer 15. The lower contact layer 15 is an n-type Si contact layer stacked on the surface of the substrate 10 in a direction perpendicular to the substrate 10, the lower contact layer 15 forms a step structure, the step structure includes a lower mesa and an upper mesa protruding from the lower mesa, and the n-electrode 17 is located on the lower mesa of the lower contact layer 15. The multiplication layer 11 is an intrinsic Si material layer or a low n-type ion doped Si material layer which is stacked on the upper table surface of the lower contact layer 15; the charge layer 12 is a p-type Si charge layer laminated on the surface of the multiplication layer 11; the upper contact layer 16 is p-type Ge laminated on the surface of the absorption layer 141-aSnaAnd a contact layer.
Moreover, the present embodiment further provides a method for manufacturing a relaxed GeSn infrared avalanche photodetector, fig. 2 is a flowchart of a method for manufacturing a relaxed GeSn infrared avalanche photodetector according to an embodiment of the present invention, fig. 3A to fig. 3G are schematic diagrams of main process structures in a manufacturing process of a relaxed GeSn infrared avalanche photodetector according to an embodiment of the present invention, and a structure of a relaxed GeSn infrared avalanche photodetector manufactured according to an embodiment of the present invention is shown in fig. 1. As shown in fig. 1, fig. 2, and fig. 3A to fig. 3G, the method for manufacturing a relaxed GeSn infrared avalanche photodetector provided in this embodiment includes the following steps:
in step S21, the substrate 10 is provided. The substrate 10 is preferably a Si substrate or an SOI substrate.
In step S22, a Si material is epitaxially grown on the substrate 10 to form a charge multiplication structure, as shown in fig. 3A. The charge multiplication structure is used for increasing the photocurrent from the absorption layer 14 through avalanche multiplication effect, so that the photoresponse is improved, and the sensitivity of the detector is improved.
Preferably, the epitaxial growth of the Si material on the substrate 10 includes the specific steps of:
(S22-1) epitaxially growing an n-type Si material on the surface of the substrate 10 to form a lower contact layer 15. Specifically, after the substrate 10 is cleaned, a heavy n-type ion is epitaxially grown on the surface of the substrate 10(n +) doping the Si material to form the lower contact layer 15. Wherein the doping concentration of n-type ions in the lower contact layer 15 may be 2 × 1019/cm3The thickness was 1 μm.
(S22-2) epitaxially growing an intrinsic Si material on the surface of the lower contact layer 15 to form the multiplication layer 11. Specifically, an intrinsic Si material is epitaxially grown on the surface of the lower contact layer 15 to form the multiplication layer 11.
In other embodiments, a multiplication layer may be formed by epitaxially growing a Si material doped with light n-type ions on the surface of the lower contact layer 15. At this time, the doping concentration of n-type ions in the multiplication layer may be 5 × 1015/cm3The thickness is 500 nm.
(S22-3) epitaxially growing a p-type Si material on the surface of the multiplication layer 11 to form the charge layer 12, as shown in fig. 3A. Specifically, a light p-type ion-doped (p-) Si material is epitaxially grown on the surface of the multiplication layer 11 to form the charge layer 12. Wherein the thickness and doping concentration of the charge layer 12 are mutually constrained to control the electric field of the absorption layer 14 and the multiplication layer 11, so that the electric field strength of the multiplication layer 11 is high enough to cause avalanche multiplication effect, such as: the doping concentration of p-type ions in the charge layer 12 is 2 x 1017/cm3The thickness is 100 nm.
Step S23, epitaxially growing a buffer layer 13 on the charge multiplication structure, wherein the defect density of the buffer layer 13 is greater than a predetermined value to limit the generation of Si material and relaxed Ge1-xSnxPropagation of threading dislocations due to lattice mismatch of the material, 0<x<1, as shown in fig. 3B.
Preferably, the step of epitaxially growing the buffer layer 13 on the charge multiplication structure includes:
epitaxial growth of Si1-yGeyForming the buffer layer 13 on the surface of the charge layer 12, wherein 0.2<y<0.8. More preferably, the buffer layer 13 has a thickness of 30nm to 80 nm. The specific thickness of the buffer layer 13 may be in accordance with the Si1-yGeyThe content of Ge component in the material is selected to be betterThe thickness of the buffer layer 13 may be set to 50nm when propagation of threading dislocation due to lattice mismatch is restricted, for example, when y is 0.3.
Step S24 of epitaxially growing the relaxed Ge1-xSnxMaterial is formed on the buffer layer 13 to form an absorption layer 14, as shown in fig. 3C. For example, epitaxially grown intrinsic Ge1-xSnxThe material is formed on the surface of the buffer layer 13 to form the absorption layer 14, x is 0.08, and the thickness of the absorption layer 14 is 1 μm.
Preferably, the following steps are included after the formation of the absorption layer 14:
(a) epitaxially growing p-type Ge1-aSnaForming an upper contact layer 16 on the surface of the absorption layer 14, wherein a is more than or equal to 0<1, as shown in fig. 3D. Specifically, heavily p-type ion-doped (p +) Ge is epitaxially grown1-aSnaMaterial is applied to the surface of the absorption layer 14 to form the upper contact layer 16. Wherein the doping concentration of p-type ions in the upper contact layer 16 may be 2 × 1019/cm3The thickness is 100 nm.
(b) Depositing a first conductive material on the surface of the lower contact layer 15 to form an n-electrode 17.
(c) Depositing a second conductive material on the surface of the upper contact layer 16 to form a p-electrode 18.
Specifically, after the upper contact layer 16 is formed, the upper contact layer 16, the absorption layer 14, the buffer layer 13, the charge layer 12, the multiplication layer 11, and the lower contact layer 15 are etched to form a mesa structure as shown in fig. 3E; then, depositing a passivation layer material on the surface of the stacked structure composed of the lower contact layer 15, the multiplication layer 11, the charge layer 12, the buffer layer 13, the absorption layer 14 and the upper contact layer 16 to form an anti-reflection layer 19, wherein the passivation layer material is preferably silicon dioxide; next, etching the anti-reflection layer 19 by using photolithography and dry etching processes to form a first electrode trench 171 and a second electrode trench 181, as shown in fig. 3F; finally, magnetron sputtering is adopted to deposit a first conductive material in the first electrode groove 171 and a second conductive material in the second electrode groove 181, and photolithography and dry etching processes are combined to form the n-electrode 17 and the p-electrode 18, as shown in fig. 3G. The first conductive material and the second conductive material may be the same conductive material, such as metallic aluminum, so that the n-electrode 17 and the p-electrode 18 are formed simultaneously.
The relaxed GeSn infrared avalanche photodetector and the manufacturing method thereof provided by the specific embodiment have the following advantages in three aspects: firstly, a GeSn material is adopted as an absorption layer, so that the method can be compatible with the existing CMOS process; secondly, compared with the traditional GeSn p-i-n type infrared photodetector, the specific implementation mode adopts a structure of an absorption charge multiplication separation avalanche photodetector, and has large photoelectric current amplification factor and high sensitivity; and thirdly, a buffer layer with defect density larger than a preset value is introduced between the charge multiplication structure and the absorption layer, so that the growth of a thick relaxation Ge buffer layer is avoided, and defect dislocation is limited in the buffer layer, thereby ensuring the growth of a high-quality relaxation GeSn absorption layer.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
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