CN110752187A - Preparation method of display substrate and display substrate - Google Patents

Abstract

The present application provides a preparation method of a display substrate and a display substrate. The preparation method includes: preparing an array substrate, the array substrate includes a plurality of display panel areas and peripheral areas arranged at intervals, and the peripheral area is provided with test areas corresponding to the plurality of display panel areas one-to-one; the display area of each display panel area is provided with There are a plurality of pixel electrodes, and each test area is provided with a conductive block corresponding to the plurality of pixel electrodes in the corresponding display area, and the conductive block and the corresponding pixel electrode are electrically connected through the connecting portion; For each pixel electrode, detect the total resistance value of the pixel electrode, the conductive block corresponding to the pixel electrode and the connection part corresponding to the pixel electrode; calculate the difference between the total resistance value and the corresponding standard resistance value; determine the difference value and the standard resistance value Whether the resistance ratio is within the threshold range; if it is determined that the ratio is not within the threshold range, it is determined that there is a conductive material on the pixel electrode; the conductive material on the pixel electrode is etched.

Description

Preparation method of display substrate and display substrate

technical field

The present application relates to the field of display technology, and in particular, to a method for preparing a display substrate and a display substrate.

Background technique

With the rapid development of electronic devices, users have higher and higher requirements for screen-to-body ratio, making the full-screen display of electronic devices attract more and more attention in the industry. Traditional electronic devices such as mobile phones, tablet computers, etc., need to integrate front cameras, earpieces, and infrared sensing elements, etc., generally by opening holes on the display screen, and setting cameras, earpieces, and infrared sensing elements in the opening area.

In the process of preparing the display screen, before punching the hole area, a protective film layer is generally formed on the pixel electrode of the pixel in the display screen, and the protective film layer is removed after the hole is opened to avoid damage to the display screen during the punching process. film layer. The protective film layer is generally a conductive material. If there is any residual conductive material on the pixel electrodes, adjacent pixel electrodes may be electrically connected, which affects the display effect of the display screen.

SUMMARY OF THE INVENTION

According to a first aspect of the embodiments of the present application, a method for preparing a display substrate is provided, the preparation method comprising:

Prepare an array substrate, the array substrate includes a plurality of display panel areas and peripheral areas arranged at intervals, the peripheral area is provided with a test area corresponding to the plurality of the display panel areas, and each of the display panel areas includes a display area and an opening area; each of the display areas is provided with a plurality of pixel electrodes, and each of the test areas is provided with a conductive block corresponding to the plurality of pixel electrodes of the display area; the The conductive block is electrically connected to the corresponding pixel electrode through a connecting portion;

For each pixel electrode in each of the display areas, detecting the total resistance of the pixel electrode, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode;

Calculate the difference between the total resistance value and the corresponding standard resistance value; the standard resistance value is the pixel electrode, the conductive block corresponding to the pixel electrode, and the pixel electrode when there is no conductive material on the pixel electrode. The sum of the resistance values of the connection parts corresponding to the pixel electrodes;

Judging whether the ratio of the difference to the standard resistance is within the threshold range;

If it is determined that the ratio is not within the threshold range, it is determined that there is a conductive material on the pixel electrode;

The conductive material on the pixel electrode is etched.

In one embodiment, the threshold range is greater than or equal to -50% and less than or equal to 50%;

Preferably, the threshold range is greater than or equal to -20% and less than or equal to 20%;

Preferably, the threshold range is greater than or equal to -15% and less than or equal to 15%. In this way, whether there is any conductive material remaining on the pixel electrode can be detected more accurately.

In one embodiment, the preparing the array substrate further includes:

A substrate is provided, the substrate includes a first area corresponding to a plurality of the display areas, a second area corresponding to a plurality of the test areas, and a one-to-one correspondence to the plurality of the opening areas the third district;

forming the pixel electrode on the substrate, and the projection of the pixel electrode on the substrate is located in the first region;

forming a conductive layer on the pixel electrode, and the projection of the conductive layer on the substrate covers the substrate;

Punch holes in the opening area;

etching the conductive layer to remove the conductive layer above the first region, and the conductive layer above the second region to form a plurality of the conductive blocks, the conductive material is the material remaining on the pixel electrode of the conductive layer.

In this way, the portion of the conductive layer located in the display area can protect other film layers above the display area during the punching process, so as to prevent damage to the film layers in the display area during the punching process. The conductive layer located in the test area can be used to prepare conductive blocks. That is, the film layer used for protection in the display area and the film layer used for preparing the conductive block in the test area are formed at the same time, which helps to reduce the complexity of the manufacturing process.

Preferably, the material of the conductive layer includes at least one of indium zinc oxide and indium tin oxide. When the material of the conductive layer is indium zinc oxide and indium tin oxide, the conductive layer can be easily removed. In addition, since the display substrate is generally produced in large quantities, when the material of the conductive layer is indium zinc oxide, it is more conducive to the mass production of the display panel.

Preferably, the connecting portion includes a wire and a metal block located under the wire, two ends of the wire are electrically connected to corresponding pixel electrodes and conductive blocks, respectively, and the metal block is electrically connected to the wire. connect. Compared with the solution in which the connection part only includes wiring, the setting of the metal block makes the resistance of the connection part smaller, thereby making the total resistance value of the pixel electrode, the corresponding connection part and the corresponding conductive block smaller, then the corresponding standard resistance value Also smaller. When the conductive material remains on the pixel electrode, the ratio of the total resistance value obtained by detection to the standard resistance value will be larger, which is helpful to improve the sensitivity. In addition, when the total resistance value of the pixel electrode, the corresponding connection portion and the corresponding conductive block is smaller, it is helpful to improve the detection accuracy when the total resistance value is detected by the four-probe detector.

Preferably, the array substrate further includes a pixel circuit corresponding to a plurality of the pixel electrodes one-to-one, the pixel circuit includes a transistor and a capacitor; the transistor includes a semiconductor layer, a gate electrode, a source electrode and a drain electrode, the The capacitor includes an upper plate and a lower plate; the wiring and the source electrode of the transistor are formed in the same process step. In this way, the formation of the traces does not add additional steps, which helps to reduce the complexity of the fabrication process.

Preferably, the metal block and the upper electrode plate are formed in the same process step. In this way, the formation of the metal block does not add additional steps, which helps to reduce the complexity of the fabrication process.

Preferably, the projection of the metal block on the substrate is located in the second area. In this way, the arrangement of the metal blocks will not increase the structural complexity of the display panel area.

In one embodiment, the size of the conductive block is the same as that of the corresponding pixel electrode; in this way, the resistance of the conductive block is approximately the same as the resistance of the pixel electrode, which can prevent the resistance of the conductive block from being too large and causing the pixel electrode to have a high resistance. When there is residual conductive material, the ratio of the calculated difference to the standard resistance value is small, which affects the accuracy of the judgment result for judging whether there is residual conductive material on the pixel electrode.

Preferably, the density of the plurality of pixel electrodes in the display panel area is the same as the density of the plurality of conductive blocks in the corresponding test area;

Preferably, among the plurality of display panel regions, the pixel electrodes corresponding to positions in different display panel regions have the same size, and the connection portions corresponding to the pixel electrodes corresponding to the positions have the same size. In this way, the standard resistance values corresponding to the pixel electrodes corresponding to the positions of different display areas are the same. Therefore, for pixel electrodes corresponding to positions in different display areas, it is only necessary to measure the standard resistance value of one pixel electrode.

In one embodiment, before etching the conductive material on the pixel electrode, the preparation method further includes:

Calculate the number of pixel electrodes with conductive material above each of the display areas;

Judging whether the number of the display area is greater than or equal to the specified value;

If the judgment result is yes, perform the step of etching the conductive material on the pixel electrode, and then return to the detection of the pixel electrode, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode. total resistance steps;

If it is determined that the structure is negative, a light emitting structure located above the pixel electrode and a common electrode located above the light emitting structure are formed, the light emitting structure and the common electrode cover the display area and the opening area, and The test area is not covered. In this way, if there is a small amount of conductive material remaining on the pixel electrodes in the display area, which has little influence on the display effect, the conductive material does not need to be processed, which also helps to simplify the complexity of the process. When the number of the pixel electrodes with the conductive material above the display area is greater than or equal to a specified value, the conductive material is etched, thereby reducing the residual of the conductive material.

Preferably, after forming the light-emitting structure above the pixel electrode and the common electrode above the light-emitting structure, the preparation method further includes:

The array substrate is cut along the boundary of the display panel area.

According to a second aspect of the embodiments of the present application, a display substrate is provided, the display substrate includes a plurality of display panel regions and a peripheral region arranged at intervals, the peripheral region is provided with a plurality of the display panel regions one by one The corresponding test area, each of the display panel areas includes a display area and an aperture area; each of the display areas is provided with a plurality of pixel electrodes, and each of the test areas is provided with the corresponding display area The plurality of pixel electrodes correspond to conductive blocks one-to-one; the conductive blocks are electrically connected with the corresponding pixel electrodes through the connecting portion.

In one embodiment, the connection part includes a wire and a metal block located under the wire, two ends of the wire are electrically connected to corresponding pixel electrodes and conductive blocks, respectively, and the metal block is connected to the Trace electrical connections. Compared with the solution in which the connection part only includes wiring, the setting of the metal block makes the resistance of the connection part smaller, thereby making the total resistance value of the pixel electrode, the corresponding connection part and the corresponding conductive block smaller, then the corresponding standard resistance value Also smaller. When the conductive material remains on the pixel electrode, the ratio of the total resistance value obtained by detection to the standard resistance value will be larger, which is helpful to improve the sensitivity. In addition, when the total resistance value of the pixel electrode, the corresponding connection portion and the corresponding conductive block is smaller, it is helpful to improve the detection accuracy when the total resistance value is detected by the four-probe detector.

In one embodiment, the display substrate further includes a pixel circuit corresponding to a plurality of the pixel electrodes one-to-one, the pixel circuit includes a transistor and a capacitor; the transistor includes a semiconductor layer, a gate electrode, a source electrode and a drain electrode , the pixel electrode is electrically connected to the drain electrode of the corresponding transistor; the capacitor includes an upper plate and a lower plate;

Preferably, the traces are made of the same material as the source electrodes of the transistors, and the traces and parts of the source electrodes of the transistors are located on the same layer. Since the material of the trace and the source electrode is the same, and the material of the source electrode and the trace are located in the same layer, the trace and the source electrode can be formed in the same process step, and the preparation of the trace will not add additional steps, which is helpful for Reduce the complexity of the preparation process.

Preferably, the metal block and the upper electrode plate are located on the same layer, and the material of the metal block and the upper electrode plate is the same. In this way, the metal block and the upper electrode plate of the capacitor can be formed in the same process step, and the preparation of the metal block does not add additional steps, which helps to reduce the complexity of the manufacturing process.

Preferably, the metal block is located in the test area. In this way, the arrangement of the metal blocks will not increase the structural complexity of the display panel area.

In one embodiment, the size of the conductive block is the same as that of the corresponding pixel electrode;

Preferably, the density of the plurality of pixel electrodes in the display panel area is the same as the density of the plurality of conductive blocks in the corresponding test area;

Preferably, in a plurality of the display panel regions, pixel electrodes corresponding to positions in different display panels have the same size, and the size of the connection parts corresponding to the pixel electrodes corresponding to the positions are the same.

In one embodiment, the display substrate further includes a light emitting structure located above the pixel electrode, and a common electrode located above the light emitting structure.

According to the method for manufacturing a display substrate and the display substrate provided by the embodiments of the present application, the display substrate includes a plurality of display panel areas arranged at intervals and test areas corresponding to the plurality of display panel areas one-to-one, and each display panel area is provided with a plurality of pixels Electrodes, each test area is provided with a plurality of conductive blocks corresponding to the corresponding display panel area one-to-one, and the conductive blocks are electrically connected with the corresponding pixel electrodes. By detecting the total resistance value of each pixel electrode, the conductive block corresponding to the pixel electrode, and the connecting portion corresponding to the pixel electrode, the total resistance value corresponding to the pixel electrode and the standard resistance value corresponding to the pixel electrode can be used to determine whether the pixel electrode has conductive material, so as to etch the conductive material when there is a conductive material on the pixel electrode. It can be seen that the preparation method of the display substrate and the display substrate provided by the embodiments of the present application can determine whether there is a conductive material on the pixel electrode, so as to remove the conductive material on the pixel electrode, so as to avoid the reflection of the light emitted by the pixels in the display area caused by the conductive material The efficiency is reduced, and adjacent pixel electrodes are prevented from being electrically connected due to residual material on the pixel electrode, so that when the pixel is controlled to emit light, two adjacent pixels can only emit light at the same time, which affects the display effect of the display screen.

Description of drawings

FIG. 1 is a flowchart of a method for preparing a display substrate provided by an embodiment of the present application;

FIG. 2 is a top view of a display substrate provided by an embodiment of the present application;

3 is a schematic diagram of a display panel area and a corresponding test area in the display substrate shown in FIG. 2;

4 is a partial cross-sectional view of a display substrate provided by an embodiment of the present application;

FIG. 5 is a flowchart of preparing an array substrate provided by an embodiment of the present application;

FIG. 6 is a schematic diagram of an intermediate structure of the display substrate shown in FIG. 4;

FIG. 7 is a flowchart of another method for manufacturing a display substrate according to an embodiment of the present application.

Detailed ways

Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. Where the following description refers to the drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the illustrative examples below are not intended to represent all implementations consistent with this application. Rather, they are merely examples of means consistent with some aspects of the present application as recited in the appended claims.

As mentioned in the background art, a protective film layer is formed over the pixel electrodes of the pixels in the display screen before opening the holes. After opening the holes, the protective film layer is removed. Generally, the protective film layer can be removed by wet etching. However, due to fluctuations in process conditions or a decrease in the concentration of the etchant in the later stage of etching, the protective film layer on the pixel electrode may remain, which reduces the pass rate of the display substrate.

In order to solve the above problems, the embodiments of the present application provide a method for manufacturing a display substrate and a display substrate, which can well solve the above problems.

The method for preparing the display substrate and the display substrate in the embodiments of the present application will be described in detail below with reference to the accompanying drawings. Features in the embodiments and implementations described below may complement each other or be combined with each other without conflict.

1 is a flowchart of a method for preparing a display substrate provided by an embodiment of the present application; FIG. 2 is a top view of a display substrate provided by an embodiment of the present application; FIG. 3 is a display panel area in the display substrate shown in FIG. 2 Fig. 4 is a partial cross-sectional view of the display substrate provided by the embodiment of the present application; Fig. 5 is a flowchart of the preparation of the array substrate provided by the embodiment of the present application; Fig. 6 is a schematic diagram of the display substrate shown in Fig. 4 A schematic diagram of an intermediate structure; FIG. 7 is a flowchart of another method for manufacturing a display substrate provided by an embodiment of the present application.

Embodiments of the present application provide a method for manufacturing a display substrate. Referring to FIG. 1 , the manufacturing method of the display substrate includes the following steps 110 to 160 .

In step 110, an array substrate is prepared.

Referring to FIG. 2 , the array substrate 100 includes a plurality of display panel regions 10 and peripheral regions 20 arranged at intervals, and the peripheral region 20 is provided with test areas 21 corresponding to the plurality of display panel regions 10 one-to-one. The peripheral area 20 may refer to other areas of the array substrate 100 other than the display panel area 10 , and the peripheral area 20 may include an edge area surrounding a plurality of display panels 10 , or may include an area between two adjacent display panel areas 10 . area between.

Each display panel area 10 includes a display area 11 and an aperture area 12 . The open area 12 can be used to place electronic components. The electronic components may include earpieces, optical devices, distance sensors, etc., wherein the optical devices include at least one of a front camera, an infrared sensor, an infrared lens, a flood light sensing element, an ambient light sensor, and a dot matrix projector.

Referring to FIG. 3 , each display area 11 is provided with a plurality of pixel electrodes 101 , and each test area 21 is provided with conductive blocks 201 corresponding to the plurality of pixel electrodes 101 of the corresponding display area 11 one-to-one. Each conductive block 201 in the test area 21 is electrically connected to the corresponding pixel electrode 101 through the connecting portion.

In one embodiment, referring to FIG. 4 , the array substrate 100 further includes a pixel circuit corresponding to the plurality of pixel electrodes 101 one-to-one, and the pixel circuit includes a transistor 102 and a capacitor 103 . The transistor 102 includes a semiconductor layer 124 , a gate electrode 121 , a source electrode 122 and a drain electrode 123 . The capacitor 103 includes an upper plate 132 and a lower plate 131 . Referring to FIG. 5 , the step 110 of preparing the array substrate includes the following steps 111 to 119 .

In step 111, a substrate is provided, the substrate includes a first area corresponding to a plurality of display areas, a second area corresponding to a plurality of test areas, and a third area corresponding to a plurality of opening areas Area.

In one embodiment, the substrate 31 may be a flexible substrate, and the material of the flexible substrate may be PI (Polyimide, polyimide) or the like. In other embodiments, the substrate 31 may be a rigid substrate, and the material of the rigid substrate may be, for example, glass, metal, plastic, or the like. The substrate 31 includes a plurality of first regions 311 corresponding to the display regions 12 one-to-one, a second region 312 corresponding to the plurality of test regions 21 one-to-one, and a third region 313 corresponding to the plurality of opening regions 11 one-to-one .

In one embodiment, after step 111 , the preparation method may further include: forming a buffer layer 32 on the substrate 31 . The material of the buffer layer 32 may be SiN _x or SiO ₂ , for example. The projection of the buffer layer 32 on the substrate 31 covers the substrate 31 .

In step 112, transistors and capacitors are formed on the substrate.

In one embodiment, step 112 may be accomplished through steps 1121 to 1124 as follows.

In step 1121, the semiconductor layer is formed on the substrate, and the projection of the semiconductor layer on the substrate is located in the first region.

Referring to FIG. 4 , the semiconductor layer 124 of the transistor 102 is located over the buffer layer 32 . The semiconductor layer 124 is located above the first region 311 , that is, the projection of the semiconductor layer 124 on the substrate 31 falls on the first region 311 .

In one embodiment, after step 1121 , the preparation method further includes: forming a gate insulating layer 33 over the semiconductor layer 124 . The projection of the gate insulating layer 33 on the substrate 31 covers the substrate 31 .

In step 1122, a gate electrode and a lower electrode plate are formed on the semiconductor layer, and the projections of the gate electrode and the lower electrode plate on the substrate are located in the first region.

The gate electrode 121 and the lower plate 131 are located above the gate insulating layer 33 , and the gate electrode 121 is located directly above the semiconductor layer 124 . The materials of the gate electrode 121 and the lower electrode plate 131 may be the same, and both may be formed in the same process step.

In one embodiment, after step 1122 , the preparation method may further include: forming a capacitor insulating layer 34 over the gate electrode 121 and the lower electrode plate 131 . The projection of the capacitive insulating layer 34 on the substrate 31 covers the substrate 31 .

In step 1123, an upper electrode plate is formed on the lower electrode plate, and the projection of the upper electrode plate on the substrate is located in the first region.

The upper electrode plate 132 is located above the capacitor insulating layer 34 and is opposite to the lower electrode plate 131 , so that the upper electrode plate 132 and the lower electrode plate 131 form a capacitor.

In one embodiment, after step 1123 , the preparation method may further include: forming an interlayer dielectric layer 35 over the upper electrode plate 132 . The projection of the interlayer dielectric layer 35 on the substrate 31 covers the substrate 31 .

In step 1124 , a source electrode and a drain electrode are formed, both of which are electrically connected to the semiconductor layer, and the projection of the source electrode and the drain electrode on the substrate is located in the first region 311 of the substrate 31 .

In one embodiment, before step 1124 , the preparation method may further include: forming a contact hole penetrating the interlayer dielectric layer 35 , the capacitor insulating layer 34 , and the gate insulating layer 33 , and the contact hole exposes part of the semiconductor layer 124 . Two contact holes are correspondingly disposed above each semiconductor layer 124 . The contact holes are filled while the source electrode 122 and the drain electrode 123 are prepared, so that the source electrode 122 and the drain electrode 123 are electrically connected to the semiconductor layer 124 .

After step 1124, the preparation method may further include: forming a planarization layer 36 over the source electrode 122 and the drain electrode 123, the projection of the planarization layer 36 on the substrate 31 covers the first region 311 and the third region 313, and does not The second area 312 is covered.

In step 113, a pixel electrode is formed on the transistor and the capacitor, and the projection of the pixel electrode on the substrate is located in the first region.

The pixel electrode is electrically connected to the drain electrode 123 of the transistor. The pixel electrode 101 is located above the planarization layer 36 , a contact hole may be formed on the planarization layer 36 , and the pixel electrode 101 is electrically connected to the drain electrode 123 through the contact hole on the planarization layer 36 .

After step 113 , the preparation method may further include: forming a pixel defining layer 37 over the pixel electrode 101 , and forming a support column 38 over the pixel defining layer 37 . The projections of the pixel defining layer 37 and the support pillars 38 on the substrate 31 are located in the first region 311 . The pixel defining layer 37 is provided with a pixel opening 371 for exposing a part of the pixel electrode 101 .

In step 114, a conductive layer is formed on the pixel electrode, and the projection of the conductive layer on the substrate covers the substrate.

In step 115, punching is performed at the position corresponding to the opening area.

The process of punching holes at the positions corresponding to the opening regions 11 includes: firstly removing the portion of the conductive layer 203 located directly above the third region 313 , and then removing the portion of the conductive layer 203 located in the opening region 11 by using a wet etching process. After that, punching is performed in the opening area 11 . In one embodiment, laser drilling may be used to etch away the portion of the substrate 31 located in the third region 313 and each film layer located directly above the third region 313 .

In step 116, the conductive layer is etched to remove the conductive layer above the first region, and the conductive layer above the second region forms a plurality of conductive blocks.

After step 116 is performed, the display substrate shown in FIG. 6 can be obtained.

In one embodiment, the conductive layer 203 over the first region 131 and over the second region 132 may be etched using a wet etching process.

The portion of the conductive layer 203 located in the display area 12 can protect other film layers above the display area 12 during the punching process, so as to prevent damage to the film layer of the display area 12 during the punching process. The conductive layer 203 located in the test area 21 can be used to prepare the conductive block 201 . That is, the film layer used for protection in the display area 12 and the film layer used for preparing the conductive block 201 in the test area 21 are formed at the same time, which helps to reduce the complexity of the manufacturing process. In other embodiments, the film layer used for protection in the display area 12 and the film layer used for preparing the conductive block 201 in the test area 21 may not be formed simultaneously.

When removing the conductive layer 203 above the first region 131, due to fluctuations in process conditions and the decrease in the concentration of the etchant in the later stage of the wet etching process, the conductive layer 203 may partially remain above the pixel electrode 101, and the conductive layer 203 is on the pixel electrode 101. The remaining portion on the electrode 101 is also the above-mentioned conductive material. When the conductive material remains above the pixel electrode 101 , the reflection of the light emitted by the pixel electrode 101 to the pixel will be reduced, thereby reducing the light emission brightness of the pixel. The conductive layer material remaining on the pixel electrode 101 may also electrically connect two adjacent pixel electrodes 101, so that when a pixel is controlled to emit light, the adjacent pixels will emit light at the same time, affecting the normal display of the display substrate.

In one embodiment, the connection portion 301 can be formed in the same process step as the source electrode 122 and the drain electrode 123 , so that the formation of the connection portion 301 does not add additional steps, which helps to reduce the fabrication cost.

In step 120, for each pixel electrode in each display area, the total resistance value of the pixel electrode, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode is detected.

The conductive block corresponding to the pixel electrode refers to the conductive block electrically connected to the pixel electrode, and the connection part corresponding to the pixel electrode refers to the connection part connected to the pixel electrode.

In one embodiment, a four-probe detector is used to detect the total resistance of the pixel electrode 101 , the conductive block 201 corresponding to the pixel electrode 101 , and the connecting portion 301 for connecting the two.

In step 130, the difference between the total resistance value and the corresponding standard resistance value is calculated; the standard resistance value is the resistance value of the pixel electrode, the conductive block corresponding to the pixel electrode and the connection part corresponding to the pixel electrode when there is no conductive material on the pixel electrode. sum of values.

In one embodiment, before step 130, the preparation method further includes: detecting the connection between the pixel electrode, the pixel electrode and the corresponding conductive block and the connection portion corresponding to the pixel electrode when no conductive material remains on each pixel electrode in each display area 12. The sum of the resistance values is the standard resistance value corresponding to the pixel electrode.

In one embodiment, the arrangement of the pixel electrodes in each display area is the same, the size of the pixel electrodes corresponding to the positions in different display areas is the same, the size of the conductive blocks corresponding to the pixel electrodes corresponding to the positions is the same, and the corresponding positions of the conductive blocks are the same. The size of the connection portion corresponding to the pixel electrode is the same. Wherein, the size of the connecting portion includes the length and width of the connecting portion. In this embodiment, "same" refers to substantially the same, including completely identical situations and situations where the difference is within a certain range. In this way, the standard resistance values corresponding to the pixel electrodes corresponding to the positions of different display areas are the same. Therefore, for pixel electrodes corresponding to positions in different display areas, it is only necessary to measure the standard resistance value of one pixel electrode.

In one embodiment, when detecting the standard resistance value of each pixel electrode in the display area, a test substrate can be prepared, and the test substrate is provided with a plurality of test electrodes and a plurality of test conductive blocks corresponding to the plurality of test electrodes one by one. The electrodes and the corresponding test conductive blocks are electrically connected through the test connection parts. The arrangement of the test electrodes in the test substrate is in one-to-one correspondence with the pixel electrodes in the display area, the plurality of test conductive blocks in the test substrate are in one-to-one correspondence with the plurality of conductive blocks in the display area, and the test electrodes correspond to the corresponding pixel electrodes The size of the test conductive block is the same as that of the corresponding conductive block, and the size of the test connection portion between the test electrode and the corresponding test conductive block is the same as that of the corresponding connection portion. In this way, the total resistance of the test electrode, the test conductive block corresponding to the test electrode, and the connection between the two is equal to the resistance of the pixel electrode corresponding to the test electrode, the conductive block corresponding to the pixel electrode, and the connection between the two. total resistance. The total resistance value of the test electrode, the test conductive block corresponding to the test electrode, and the connection between the two is the standard resistance value corresponding to the pixel electrode corresponding to the test electrode.

In one embodiment, the conductive block 201 is the same size as the corresponding pixel electrode 101 . In this embodiment, the same size of the conductive block 201 and the corresponding pixel electrode 101 means approximately the same, and the difference between the two sizes can be considered to be approximately the same within a certain range. In this way, the resistance of the conductive block 201 is approximately the same as the resistance of the pixel electrode 101 , which can prevent the resistance of the conductive block 201 from being too large, resulting in the ratio of the calculated difference to the standard resistance value when there is conductive material remaining on the pixel electrode 101 If the ratio is smaller, the ratio is within the threshold range, and the result of judging whether there is any conductive material remaining on the pixel electrode 101 is incorrect.

In one embodiment, the density of the plurality of pixel electrodes in the display panel area is the same as the density of the plurality of conductive blocks in the corresponding test area. Of course, in other embodiments, the densities of the plurality of pixel electrodes in the display panel area and the densities of the plurality of conductive blocks in the corresponding test area may also be different.

In step 140, it is determined whether the ratio of the difference value to the standard resistance value is within the threshold range.

In step 150, if it is determined that the ratio is not within the threshold range, it is determined that there is a conductive material on the pixel electrode.

When the conductive material remains in the pixel electrode 101 , there will be a certain deviation between the total resistance value and the standard resistance value. However, due to the process deviation, one or more of the size of the pixel electrode, the size of the conductive block and the size of the connecting portion will have a certain deviation, which will also lead to a certain difference between the total resistance value corresponding to the pixel electrode and the standard resistance value. deviation. Therefore, when it is determined that the ratio of the difference between the total resistance value and the standard resistance value to the standard resistance value is not within the threshold range, it is considered that there is a conductive material remaining on the pixel electrode.

In one embodiment, the threshold range may be greater than or equal to -50% and less than or equal to 50%, that is, the threshold range is [-50%, 50%]. That is, if the ratio of the difference between the total resistance value and the standard resistance value to the standard resistance value is less than -50%, or greater than 50%, it can be determined that the pixel electrode has conductive material remaining.

Further, the threshold range is greater than or equal to -20% and less than or equal to 20%, that is, the threshold range is [-20%, 20%].

Further, the threshold range is greater than or equal to -15% and less than or equal to 15%, that is, the threshold range is [-15%, 15%].

In this way, it can be detected more accurately whether the conductive material remains on the pixel electrode.

In step 160, the conductive material on the pixel electrode is etched.

In one embodiment, the residual conductive material may be etched using a wet etch process.

In one embodiment, referring to FIG. 7 , before etching the conductive material on the pixel electrode, the preparation method further includes the following steps 170 and 180 .

In step 170, the number of pixel electrodes with conductive material above each display area is counted.

In step 180, it is determined whether the number of display areas is greater than or equal to a specified value. If the determination result is yes, step 160 is performed, and after performing step 160 , the process returns to step 120 ; if the determination result is no, step 190 is performed.

If there is a small amount of conductive material remaining on the pixel electrodes in the display area, which has little influence on the display effect, it is not necessary to process the conductive material, which also helps to simplify the complexity of the process. In one embodiment, the specified value may be determined based on empirical values, eg, the specified value may be five, ten, etc.

After step 160 is performed, in the process of performing step 120, when detecting the total resistance value of each pixel electrode in each display area, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode, the result of the previous detection can be used. , for the pixel electrode that has no conductive material above it, no more detection is required, and only the total resistance value corresponding to the pixel electrode with conductive material above it determined in the last detection process can be detected. In this way, when step 120 is not performed for the first time, it is not necessary to detect the total resistance values corresponding to all pixel electrodes, which can simplify the complexity of the operation.

In step 190, a light emitting structure located above the pixel electrode and a common electrode located above the light emitting structure are formed. The light emitting structure and the common electrode cover the display area and the opening area, but do not cover the test area.

In this embodiment of the present application, the pixel electrode may be an anode, and the common electrode may be a cathode.

In one embodiment, after forming the light emitting structure above the pixel electrode and the common electrode above the light emitting structure, the preparation method may further include the following steps:

The array substrate is cut along the boundary of the display panel area.

Through this step, a plurality of finished products of display substrates can be obtained, and each film layer in a display panel area is cut to obtain a display substrate.

In one embodiment, the material of the conductive layer includes at least one of indium zinc oxide and indium tin oxide. When the material of the conductive layer is indium zinc oxide and indium tin oxide, the conductive layer can be easily removed. In addition, since the display substrate is generally produced in large quantities, when the material of the conductive layer is indium zinc oxide, it is more conducive to the mass production of the display panel.

In one embodiment, referring to FIG. 6 again, the connecting portion 301 includes a trace 311 and a metal block 312 located under the trace 311 . Two ends of the trace 311 are electrically connected to the corresponding pixel electrode 101 and the conductive block 201 respectively. The metal Block 312 is electrically connected to trace 311 . Correspondingly, the test connection portion also includes a trace 311 and a metal block 312 located under the trace 311 . In the illustrated embodiment, an interlayer dielectric layer 35 is provided between the traces 311 and the metal blocks 312 , the interlayer dielectric layer 35 is provided with through holes, and the traces 311 and the metal blocks 312 are electrically connected through the through holes of the interlayer dielectric layer 35 . connect.

Compared with the solution in which the connection portion 301 only includes the traces 311 , the arrangement of the metal block 312 makes the resistance of the connection portion 301 smaller, thereby making the total resistance of the pixel electrode 101 , the corresponding connection portion 301 and the corresponding conductive block 201 smaller. , the corresponding standard resistance value is also smaller. When the conductive material remains on the pixel electrode 101, the ratio of the detected total resistance value to the standard resistance value will be larger, which helps to improve the sensitivity. In addition, when the total resistance of the pixel electrode 101 , the corresponding connection portion 301 and the corresponding conductive block 201 is smaller, when the total resistance is detected by a four-probe detector, the detection accuracy can be improved.

In one embodiment, the traces 311 and the source electrode 122 and the drain electrode 123 of the transistor 102 are formed in the same process step. In this way, the formation of the traces 311 does not add additional steps, which helps to reduce the complexity of the fabrication process.

In one embodiment, the metal block 312 is formed in the same process step as the upper plate 132 . In this way, the formation of the metal block 312 does not add additional steps, which helps to reduce the complexity of the fabrication process.

In one embodiment, the projection of the metal block 312 on the substrate is located in the second region 312 . In this way, the arrangement of the metal blocks 312 will not increase the structural complexity of the display panel area.

In the method for manufacturing a display substrate provided by an embodiment of the present application, the array substrate includes a plurality of display panel regions arranged at intervals and a test region corresponding to the plurality of display panel regions one-to-one, each display panel region is provided with a plurality of pixel electrodes, and each display panel region is provided with a plurality of pixel electrodes, each A test area is provided with a plurality of conductive blocks corresponding to the corresponding display panel areas, and the conductive blocks are electrically connected to the corresponding pixel electrodes; by detecting each pixel electrode, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode According to the total resistance value corresponding to the pixel electrode and the standard resistance value corresponding to the pixel electrode, it can be determined whether there is a conductive material on the pixel electrode; when there is a conductive material on the pixel electrode, the conductive material is etched. It can be seen that the preparation method of the display substrate provided in the embodiment of the present application can make no conductive material remaining on the pixel electrode, avoid that the pixel electrode reduces the reflection efficiency of the light emitted by the pixel when the conductive material remains on the pixel electrode, and can also avoid the pixel electrode. The residual material on the surface leads to the electrical connection of adjacent pixel electrodes, so that when the pixel is controlled to emit light, two adjacent pixels can only emit light at the same time, which affects the display effect of the display screen.

Embodiments of the present application also provide a display substrate. Referring to FIG. 1 , FIG. 2 and FIG. 6 , the display substrate includes a plurality of display panel areas 10 and peripheral areas 20 arranged at intervals, and the peripheral area 20 is provided with test areas 21 corresponding to the plurality of display panel areas 10 one-to-one. Each display panel area 10 includes a display area 11 and an aperture area 12 . Each display area 11 is provided with a plurality of pixel electrodes 101 , and each test area 21 is provided with conductive blocks 201 corresponding to the plurality of pixel electrodes 101 of the corresponding display area 11 one-to-one. The conductive block 201 is electrically connected to the corresponding pixel electrode 101 through the connection portion 301 .

In the display substrate provided by the embodiment of the present application, the display substrate includes a plurality of display panel regions arranged at intervals and test regions corresponding to the plurality of display panel regions one-to-one, each display panel region is provided with a plurality of pixel electrodes, and each test region There are a plurality of conductive blocks corresponding to the corresponding display panel regions one-to-one, and the conductive blocks are electrically connected to the corresponding pixel electrodes. The display substrate provided in the embodiment of the present application can detect the total resistance value of each pixel electrode, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode, and determine whether there is any conductive material remaining on the pixel electrode according to the total resistance value, so as to avoid When there is a conductive material on the pixel electrode, the conductive material is etched, so as to avoid the residual conductive material on the pixel electrode, which will cause the pixel electrode to reduce the reflection efficiency of the light emitted by the pixel, and also prevent the residual material on the pixel electrode from causing adjacent pixels. The pixel electrodes are electrically connected, so that when the pixel is controlled to emit light, two adjacent pixels can only emit light at the same time, which affects the display effect of the display screen.

In one embodiment, the display substrate further includes pixel circuits corresponding to the plurality of pixel electrodes 101 one-to-one, and the pixel circuits include transistors 102 and capacitors 103 . The transistor 102 includes a semiconductor layer 124 , a gate electrode 121 , a source electrode 122 and a drain electrode 123 , and the pixel electrode 101 is electrically connected to the drain electrode 123 of the corresponding transistor 102 . The capacitor 103 includes an upper plate 132 and a lower plate 131 .

In one embodiment, the connecting portion 301 includes a trace 311 and a metal block 312 located under the trace 311 . Two ends of the trace 311 are electrically connected to the corresponding pixel electrode 101 and the conductive block 201 respectively, and the metal block 312 is connected to the trace. 311 Electrical connection.

In one embodiment, the trace 311 and the source electrode 122 of the transistor 102 are made of the same material, and the trace 311 and the portion of the source electrode 122 of the transistor 102 are located on the same layer. The trace 311 is located on the same layer as the upper portion of the source electrode 122 of the transistor 102 . Since the materials of the traces 311 and the source electrodes 122 are the same, and the material of the source electrodes 122 and the traces 311 are located in the same layer, the traces 311 and the source electrodes 122 can be formed in the same process step, and the preparation of the traces 311 will not increase Additional steps help reduce the complexity of the fabrication process.

In one embodiment, the metal block 312 and the upper electrode plate 132 of the capacitor 103 are located on the same layer, and the material of the metal block 312 and the upper electrode plate 132 is the same. In this way, the metal block 312 and the upper plate 132 of the capacitor 103 can be formed in the same process step, and the preparation of the metal block 312 does not add additional steps, which helps to reduce the complexity of the manufacturing process.

In one embodiment, the metal block 312 is located in the test area.

In one embodiment, the conductive block 201 is the same size as the corresponding pixel electrode 101 .

In one embodiment, the density of the plurality of pixel electrodes 101 in the display panel area 10 is the same as the density of the plurality of conductive blocks 201 in the corresponding test area 21 .

In one embodiment, among the plurality of display panel regions 10 , the pixel electrodes 101 corresponding to positions in different display panels 10 have the same size, and the connection portions 301 corresponding to the corresponding positions of the pixel electrodes 101 have the same size.

In one embodiment, the display substrate further includes a light emitting structure located above the pixel electrode 101, and a common electrode located above the light emitting structure.

As for the product examples, since they basically correspond to the examples of the preparation method, the description of the relevant details and beneficial effects may refer to the partial description of the preparation method examples, and will not be repeated here.

It should be noted that, in the drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or intervening layers may be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element, or more than one intervening layer or element may be present. In addition, it will also be understood that when a layer or element is referred to as being 'between' two layers or elements, it can be the only layer between the two layers or elements, or more than one intervening layer may also be present or element. Like reference numerals indicate like elements throughout.

In the present invention, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance. The term "plurality" refers to two or more, unless expressly limited otherwise.

Other embodiments of the invention will readily suggest themselves to those skilled in the art upon consideration of the specification and practice of the disclosure disclosed herein. The present invention is intended to cover any variations, uses or adaptations of the present invention which follow the general principles of the present invention and include common knowledge or conventional techniques in the technical field not disclosed by the present invention . The specification and examples are to be regarded as exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

It should be understood that the present invention is not limited to the precise structures described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from its scope. The scope of the present invention is limited only by the appended claims.

Claims (10)

1. A preparation method of a display substrate, wherein the preparation method comprises: Prepare an array substrate, the array substrate includes a plurality of display panel areas and peripheral areas arranged at intervals, the peripheral area is provided with a test area corresponding to the plurality of the display panel areas, and each of the display panel areas includes a display area and an opening area; each of the display areas is provided with a plurality of pixel electrodes, and each of the test areas is provided with a conductive block corresponding to the plurality of pixel electrodes of the display area; the The conductive block is electrically connected to the corresponding pixel electrode through a connecting portion; For each pixel electrode in each of the display areas, detecting the total resistance of the pixel electrode, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode; Calculate the difference between the total resistance value and the corresponding standard resistance value; the standard resistance value is the pixel electrode, the conductive block corresponding to the pixel electrode, and the pixel electrode when there is no conductive material on the pixel electrode. The sum of the resistance values of the connection parts corresponding to the pixel electrodes; Judging whether the ratio of the difference to the standard resistance is within the threshold range; If it is determined that the difference is not within the threshold range, determining that there is a conductive material on the pixel electrode; The conductive material on the pixel electrode is etched. 2 . The method for manufacturing a display substrate according to claim 1 , wherein the threshold range is greater than or equal to -50% and less than or equal to 50%; 3 . Preferably, the threshold range is greater than or equal to -15% and less than or equal to 15%. 3. The method for preparing a display substrate according to claim 1, wherein the preparing an array substrate further comprises: A substrate is provided, the substrate includes a first area corresponding to a plurality of the display areas, a second area corresponding to a plurality of the test areas, and a one-to-one correspondence to the plurality of the opening areas the third district; forming the pixel electrode on the substrate, and the projection of the pixel electrode on the substrate is located in the first region; forming a conductive layer on the pixel electrode, and the projection of the conductive layer on the substrate covers the substrate; Punch holes in the opening area; etching the conductive layer to remove the conductive layer above the first region, and the conductive layer above the second region to form a plurality of the conductive blocks, the conductive material is the residual material of the conductive layer on the pixel electrode; Preferably, the material of the conductive layer includes at least one of indium zinc oxide and indium tin oxide; Preferably, the connecting portion includes a wire and a metal block located under the wire, two ends of the wire are electrically connected to corresponding pixel electrodes and conductive blocks, respectively, and the metal block is electrically connected to the wire. connect; Preferably, the array substrate further includes a pixel circuit corresponding to a plurality of the pixel electrodes one-to-one, the pixel circuit includes a transistor and a capacitor; the transistor includes a semiconductor layer, a gate electrode, a source electrode and a drain electrode, the The capacitor includes an upper plate and a lower plate; the wiring and the source electrode of the transistor are formed in the same process step; Preferably, the metal block and the upper plate are formed in the same process step; Preferably, the projection of the metal block on the substrate is located in the second region. 4 . The method for manufacturing a display substrate according to claim 1 , wherein the conductive block and the corresponding pixel electrode have the same size; 5 . Preferably, the density of the plurality of pixel electrodes in the display panel area is the same as the density of the plurality of conductive blocks in the corresponding test area; Preferably, among the plurality of display panel regions, the pixel electrodes corresponding to positions in different display panel regions have the same size, and the connection portions corresponding to the pixel electrodes corresponding to the positions have the same size. 5 . The method for preparing a display substrate according to claim 1 , wherein, before etching the conductive material on the pixel electrode, the preparation method further comprises: 6 . Calculate the number of pixel electrodes with conductive material above each of the display areas; Judging whether the number of the display area is greater than or equal to the specified value; If the judgment result is yes, perform the step of etching the conductive material on the pixel electrode, and then return to the detection of the pixel electrode, the conductive block corresponding to the pixel electrode, and the connection portion corresponding to the pixel electrode. total resistance steps; If it is determined that the structure is negative, a light emitting structure located above the pixel electrode and a common electrode located above the light emitting structure are formed, the light emitting structure and the common electrode cover the display area and the opening area, and does not cover said test area; Preferably, after forming the light-emitting structure above the pixel electrode and the common electrode above the light-emitting structure, the preparation method further includes: The array substrate is cut along the boundary of the display panel area. 6. A display substrate, characterized in that the display substrate comprises a plurality of display panel areas and peripheral areas arranged at intervals, and the peripheral area is provided with a test area corresponding to a plurality of the display panel areas, each The display panel area includes a display area and an aperture area; each of the display areas is provided with a plurality of pixel electrodes, and each of the test areas is provided with a plurality of pixel electrodes corresponding to the display area A corresponding conductive block; the conductive block is electrically connected with the corresponding pixel electrode through a connecting portion. 7 . The display substrate according to claim 6 , wherein the connecting portion comprises a wire and a metal block located under the wire, and two ends of the wire are respectively connected to corresponding pixel electrodes and conductive blocks. 8 . Electrically connected, the metal block is electrically connected to the trace. 8 . The display substrate according to claim 7 , wherein the display substrate further comprises a pixel circuit corresponding to a plurality of the pixel electrodes one-to-one, the pixel circuit comprising a transistor and a capacitor; the transistor comprises a semiconductor layer, gate electrode, source electrode and drain electrode, the pixel electrode is electrically connected with the drain electrode of the corresponding transistor; the capacitor includes an upper plate and a lower plate; Preferably, the wire is made of the same material as the source electrode of the transistor, and the wire and part of the source electrode of the transistor are located on the same layer; Preferably, the metal block and the upper electrode plate are located on the same layer, and the metal block and the upper electrode plate are of the same material; Preferably, the metal block is located in the test area. 9 . The display substrate according to claim 6 , wherein the conductive block and the corresponding pixel electrode have the same size; 10 . Preferably, the density of the plurality of pixel electrodes in the display panel area is the same as the density of the plurality of conductive blocks in the corresponding test area; Preferably, in a plurality of the display panel regions, pixel electrodes corresponding to positions in different display panels have the same size, and the size of the connection parts corresponding to the pixel electrodes corresponding to the positions are the same. 10 . The display substrate of claim 6 , wherein the display substrate further comprises a light emitting structure located above the pixel electrode, and a common electrode located above the light emitting structure. 11 .

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