CN110751622B

CN110751622B - Method and device for detecting semiconductor structure

Info

Publication number: CN110751622B
Application number: CN201910837418.0A
Authority: CN
Inventors: 魏强民; 卢世峰; 夏志良; 周阳; 张正飞; 骆中伟; 何佳
Original assignee: Yangtze Memory Technologies Co Ltd
Current assignee: Yangtze Memory Technologies Co Ltd
Priority date: 2019-09-05
Filing date: 2019-09-05
Publication date: 2022-07-15
Anticipated expiration: 2039-09-05
Also published as: CN110751622A

Abstract

The application discloses a detection method and a detection device of a semiconductor structure. The detection method comprises the steps of obtaining a sectional image of the semiconductor structure output by a transmission electron microscope, wherein the sectional image comprises a sectional graph of at least one hole, and the plane of the sectional graph is perpendicular to the axial direction of the hole; identifying a plurality of boundary points of the hole, obtaining a plurality of boundary point coordinates corresponding to the boundary points, and obtaining a central point coordinate of the hole according to the boundary point coordinates; carrying out ellipse numerical fitting according to the boundary point coordinates; in the radial direction of the ellipse, obtaining the distance from the boundary point of the n holes to the boundary point of the fitted ellipse, and calculating the average value of the n distances, wherein the average value is used as the notch degree of the holes and is used for measuring the etching quality of the holes; and establishing a relation comparison table of the nicking degree and at least one electrical property parameter, and judging whether the hole meets the quality requirement according to the comparison table. The detection method achieves the purpose of quantifying the influence of the etching quality of the hole on the electrical performance.

Description

Method and device for detecting semiconductor structure

Technical Field

The present invention relates to semiconductor technology, and more particularly, to a method of testing a 3-dimensional semiconductor memory cell structure and a device for testing the same.

Background

As semiconductor devices are miniaturized, the critical dimension of the semiconductor devices has been reduced to the nanometer level, which means that the critical dimension will determine the performance of the semiconductor devices, and therefore, it has become an essential link to accurately measure the critical dimension and grasp the variation degree of the critical dimension on the nanometer level.

In the prior art, a general simple appearance of a semiconductor device or a single and large critical dimension of the semiconductor device can be measured by a measuring tool, but the measuring tool in the prior art cannot meet the requirement for a complex and small critical dimension structure (such as 3D NAND). For example, in a 3D NAND-critical deep hole etching process, a corrugated notch is generated along the circumferential direction of a hole, so that the shape of the hole is irregular, and the notch can seriously affect the electrical performance of a product, and how to establish a characterization method to accurately measure the change of an etched hole becomes a key for the successful development of a 3D NAND.

In addition, when the shape difference of the nicks is small, the difference degree is difficult to distinguish by manual observation. It is not possible in the prior art to quantify the severity of the scoring.

Therefore, it is desirable to further improve the inspection method of the semiconductor structure and the inspection apparatus thereof, thereby improving the measurement accuracy, efficiency, and reliability.

Disclosure of Invention

The invention aims to provide a novel detection method and a novel detection device for a semiconductor structure, and aims to solve the technical problem that the light and heavy degree of etching traces and the electrical performance of holes cannot be analyzed quantitatively in the prior art.

According to an aspect of the present invention, there is provided a method of inspecting a semiconductor structure, including: acquiring a section image of the semiconductor structure output by a transmission electron microscope, wherein the section image comprises a section pattern of at least one hole, and a plane of the section pattern is perpendicular to the axial direction of the hole; identifying a plurality of boundary points of the hole, obtaining a plurality of boundary point coordinates corresponding to the boundary points, and obtaining a center point coordinate of the hole according to the boundary point coordinates; carrying out ellipse numerical fitting according to the boundary point coordinates; in the radial direction of the ellipse, obtaining the distances from the boundary points of the n holes to the boundary points of the fitted ellipse, calculating the average value of the n distances, and taking the average value as the indentation degree of the holes for measuring the etching quality of the holes; and establishing a relation comparison table of the notch degree and at least one electrical property parameter, and judging whether the hole meets the quality requirement according to the comparison table, wherein n is an integer greater than 1.

Preferably, the step of establishing the relation comparison table comprises: testing the scoring of each of the wells as a sample and the corresponding electrical performance parameter; and establishing a relation between the notch degree and the electrical property parameter, and outputting a corresponding comparison map and/or a comparison table.

Preferably, the method further comprises the steps of respectively obtaining the score of each hole at different depths in the axial direction perpendicular to each hole, and outputting the corresponding relation between the depth of each hole and the score in the form of a chart.

Preferably, the method further comprises establishing a relationship between different depths of the same hole and corresponding electrical performance parameters according to the corresponding relationship between the depths of the holes and the notch degrees.

Preferably, the step of obtaining boundary point coordinates corresponding to the plurality of boundary points includes: performing second derivative processing on the section image; and obtaining a plurality of boundary point coordinates on the boundary based on the second derivative processing result.

Preferably, the step of performing second derivative processing on the sectional image includes: and carrying out pixel point translation on the section image, and obtaining a second derivative of the image, wherein the extreme value of the second derivative is used as a boundary point of the section image.

Preferably, before performing the second derivative processing on each image, performing high-frequency filtering processing on the image is further included.

According to another aspect of the present invention, there is provided an inspection apparatus for a semiconductor structure, comprising: the first establishing module is used for establishing a relation comparison table between the notching degree and at least one electrical performance parameter; the acquisition module is used for acquiring a section image of the semiconductor structure output by a transmission electron microscope, and comprises a section pattern of at least one hole, and the plane of the section pattern is perpendicular to the axial direction of the hole; the identification module is used for identifying a plurality of boundary points of the hole and obtaining boundary point coordinates corresponding to the boundary points; the fitting module is used for performing numerical fitting on the ellipse according to the boundary point coordinates and obtaining the center of the ellipse; the calculation module is used for obtaining the distances from the n boundary points to the boundary of the ellipse in the radial direction of the ellipse, calculating the average value of the n distances, and taking the average value as the notch degree of the hole to measure the etching quality of the hole; and the judging module is used for judging whether the holes meet the quality requirement according to the relation comparison table and the indentation degrees of the holes, wherein n is an integer larger than 1.

Preferably, the establishing module comprises: the sample testing unit is used for testing the electrical performance parameters corresponding to the scoring degrees of the holes serving as the samples; and the output unit is used for outputting the relationship between the notch degree and the electrical performance parameter in the form of a comparison chart and/or a comparison table.

Preferably, the device further comprises a second establishing module, which is used for respectively obtaining the scoring degrees of each hole at different depths in the axial direction perpendicular to each hole, and establishing the relationship between different depths and corresponding electrical performance parameters of the same hole according to the corresponding relationship between the depths of the holes and the scoring degrees.

Preferably, the identification module comprises: the processing unit is used for performing pixel point translation on the section image and obtaining a second derivative of the image; and the boundary point coordinate acquisition unit is used for acquiring a plurality of boundary point coordinates on the boundary according to the second derivative, wherein the polar value of the second derivative is used as the boundary point of the image.

Preferably, the identification module further comprises a frequency filtering unit for performing high-frequency filtering processing on the sectional image.

Preferably, the detection device is an automatic detection device.

According to the detection method and the detection device of the semiconductor structure, the detail characteristics of the semiconductor structure can be obtained by acquiring the section image of the semiconductor structure output by the transmission electron microscope, and the pixel size of the section image is generally from a few nanometers to dozens of nanometers and even below the nanometer level; identifying the boundary point coordinates of each hole profile image through the profile images and performing ellipse fitting; the distances from n boundary points to the boundary of the ellipse are obtained, and the average value of the distances is used as the evaluation standard of the indentation degree of the hole and is defined as the indentation degree, and the indentation degree can represent the light and heavy degree of the etching trace, so that the quantitative standard is provided for the quality of the weighing hole; by establishing the relationship between the notch degree and the electrical performance parameters, the purpose of quantitatively analyzing the influence of the etching trace degree of the hole on the electrical performance is achieved.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.

Fig. 1 shows a schematic step diagram of a method for inspecting a semiconductor structure according to an embodiment of the present invention.

Fig. 2 shows a schematic diagram of the step S01 in fig. 1.

Fig. 3 shows a schematic diagram of the step S03 in fig. 1.

Fig. 4 shows a schematic diagram of the step of S031 in fig. 3.

Fig. 5 shows a schematic view of sectional images taken at different heights along the same horizontal direction.

Fig. 6 shows a schematic cross-sectional view of a semiconductor structure according to an embodiment of the invention.

Fig. 7 shows a schematic diagram of the local gray matrix in fig. 6.

Fig. 8 shows a functional image diagram of fig. 7.

Fig. 9 shows a schematic diagram of the function image after high-frequency filtering of fig. 8.

Fig. 10 shows a schematic diagram of the function of fig. 9 after second derivative processing.

FIG. 11 shows a schematic diagram of a boundary image of an embodiment of the invention.

Fig. 12 shows a schematic diagram of the boundary point coordinates in fig. 11.

Figure 13 shows an ellipse fitting diagram.

Fig. 14a to 14c are schematic diagrams illustrating the step of calculating the distance of S05 in fig. 1.

FIG. 15 is a scatter plot of the score versus the number of measurements for an embodiment of the present invention.

FIG. 16 shows a schematic diagram of numbering a plurality of holes in accordance with an embodiment of the present invention.

Fig. 17 is a schematic structural diagram of a detection apparatus for a semiconductor structure according to an embodiment of the present invention.

Fig. 18 shows a schematic structural diagram of the first setup module in fig. 17.

Fig. 19 shows a schematic diagram of the structure of the identification module in fig. 17.

Detailed Description

The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not drawn to scale. Moreover, certain well-known elements may not be shown. For simplicity, the semiconductor structure obtained after several steps can be described in one figure.

It will be understood that when a layer or region is referred to as being "on" or "over" another layer or region in describing the structure of the device, it can be directly on the other layer or region or intervening layers or regions may also be present. And, if the device is turned over, one layer or region may be "under" or "beneath" another layer or region.

If, for the purpose of describing the situation directly above another layer, another region, the expression "directly above … …" or "above and adjacent to … …" will be used herein.

In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the device are described to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.

The present invention may be embodied in various forms, some examples of which are described below.

In step S01, a correlation map between the score and at least one electrical property parameter is established. The comparison table is the basis for quantitative analysis of the influence of the light and heavy degree of etching trace of the hole on the electrical performance, wherein the indentation degree is used for measuring the etching quality of the hole. As shown in fig. 2, the lookup table may be established by the following steps S011 to S012.

In step S011, the electrical property parameters of the corresponding wells are measured for the score of each well as the sample, wherein the process of measuring the score of each well can refer to the descriptions of steps S02 to S05, which will not be detailed herein.

In step S012, the relationship between the score and the electrical property parameter is output in the form of a comparison chart and/or a comparison table, so that the worker can clearly understand the relationship between the score and the electrical property parameter.

In step S02, a cross-sectional image of the semiconductor structure output by a Transmission Electron Microscope (TEM) is acquired.

In this step, sectional images are taken at different heights, for example, along the same horizontal direction of the semiconductor structure 100, as shown in fig. 5, along the AA line and the BB line, respectively, for example, and sectional patterns of different depths of the same hole 101 can be obtained. Wherein only one hole 101 is shown in figure 5 for clarity of presentation. However, embodiments of the present invention are not obvious to this end, and one skilled in the art can make other arrangements for the number of holes in a semiconductor as desired. The semiconductor structure is, for example, a 3D memory and may include a plurality of holes 101, which may be channel holes or other deep hole structures.

In this step, the sectional image is a gray scale image obtained directly or indirectly, and includes a sectional pattern of at least one hole, the plane of the sectional pattern being perpendicular to the axial direction of the hole, as shown in fig. 6. In practical applications, since the area of the wafer is larger than the viewing area of the transmission electron microscope, the hole profile image obtained by the transmission electron microscope is an image of a predetermined region of the wafer.

In step S03, a plurality of boundary points of the hole are identified, a plurality of boundary point coordinates corresponding to the plurality of boundary points of the hole are obtained, and center point coordinates of the hole are obtained from the plurality of boundary point coordinates. As the critical dimensions of semiconductor devices have been reduced to the nanometer level, an important step in measuring the critical dimensions of the devices is to obtain precise pattern boundaries of structures to provide accurate parameters for subsequent critical dimension measurements. As shown in fig. 3, the boundary coordinates of the graph may be obtained through the following steps S031 through S032.

In step S031, the second derivative processing result is obtained according to the gray-level value of each pixel in the profile image. The second derivative processing of the section image can highlight the abrupt change of the image gray level, and does not emphasize the area with slowly changing gray level, so that the boundary positioning capability is stronger. As shown in fig. 4, the second derivative processing result may be obtained by the following steps S031a through S031 c.

In step S031a, a plurality of functions of unit length and gray-level value are obtained according to the gray-level value of each row of pixels of the cross-sectional image. For clarity, the present embodiment only cuts a part of the cross-sectional image, the cut part is shown in the white dotted frame part in fig. 6, and the step of extracting the boundary of the graphics in the white dotted frame part will be described in detail in the following description.

As shown in fig. 7, the image of the white virtual frame portion is composed of m × n pixels, each pixel has a corresponding gray value, each line of gray values is scanned to obtain a plurality of functions of unit length and gray value, for example, a line of pixels in the virtual frame in fig. 7 is scanned to obtain a function as shown in fig. 8, wherein the unit of x is nm on the abscissa and y represents the gray value of the line of pixels corresponding to the unit length.

In some preferred embodiments, the pixel points may be translated or the gray values of each pixel may be expanded, for example, by the same factor, thereby expanding the difference between the corresponding gray values. However, the embodiment of the present invention is not limited to this, and those skilled in the art may perform different processing on the gray value corresponding to each pixel as needed, for example, perform inverse processing on the gray value, or expand the gray values of different regions by different multiples, so as to expand the difference between the corresponding gray values while preserving the graph characteristic curve, which is beneficial to improving the sensitivity.

In step S031b, high frequency filtering is performed for each function. In this step, the function in fig. 8 is, for example, high-frequency filtered to obtain the function shown in fig. 9. After high frequency filtering, noise in the image can be filtered out.

In step S031c, a second derivative process is performed on each of the functions to obtain a second derivative of each function, and boundary points of each row of pixels are identified based on the second derivative of each function. In this step, for example, the function in fig. 9 is first subjected to second derivative processing to obtain a second derivative as shown in fig. 10. And then acquiring preset parameters, and judging whether a plurality of derivative values of each second derivative are larger than the preset parameters or not, wherein pixels corresponding to the derivative values larger than the preset parameters are boundary points.

In this embodiment, the preset values can be adjusted accordingly as needed, and the number of the obtained boundary points is related to the setting of the preset values.

In step S032, a plurality of boundary point coordinates on the boundary are obtained based on the second derivative processing result. In this step, it is necessary to calculate the boundary point coordinates of each line of pixels, and a plurality of boundary point coordinates constitute a boundary curve of the figure. A boundary image is then obtained from each second derivative as shown in fig. 11. In this step, a plurality of derivative values in each derivative, each corresponding to a row of pixels, need to be converted into gray separately. Because the boundary 10 is composed of boundary points and has a large difference value with the gray values of the pixels on the two sides of the boundary, a clear and accurate graph boundary can be obtained according to the boundary image.

In this step, it is also necessary to output the boundary point coordinates in the form of a coordinate system, as shown in fig. 12, in which the horizontal and vertical coordinates are all in nm.

In step S04, an ellipse is numerically fitted based on the boundary point coordinates and the center point coordinates, as shown in fig. 13, wherein the fitted ellipse 21 corresponds to the irregular figure 22 composed of the boundary coordinates, and the ellipse 21 coincides with the center point of the hole. The horizontal and vertical axes in fig. 13 are all in nm.

In step S05, distances Δ R1 to Δ Rn from n boundary points to the boundary of the ellipse in the radial direction of the ellipse are obtained, and an average value of the plurality of distances is calculated as the score of the hole, where n is a natural number equal to or greater than 1.

The distance calculation process will be described in detail below with reference to fig. 14a to 14 c. In this step, taking one of the boundary points a as an example, the length D1 of the outlet segment OA is calculated from the coordinates of the center point O and the coordinates of the boundary point a, as shown in fig. 14 a. And the length D2 from the boundary of the ellipse to the center point O is calculated in the radial direction OA of the ellipse, as shown in fig. 14 b. The difference between length D1 and length D2 is calculated and the absolute value of the difference is taken as distance Δ R, as shown in fig. 14 c.

According to the method, n distances delta R1 to delta Rn are obtained respectively, and finally, an average value of the n distances delta R1 to delta Rn is obtained, and the average value is used as the notch degree of the hole to represent the light and heavy degree of the etching trace of the hole.

In this step, the corresponding relationship between different n values and the score can also be obtained and output in the form of a scatter diagram, as shown in fig. 15, by analyzing the value range of n through the scatter diagram, it can be seen that the calculated score of the hole decreases with the increase of the number n of the selected boundary points, and when n is greater than or equal to 200, the score remains substantially unchanged. Therefore, n can be set to 200, and the accurate score can be obtained, and the operation speed can be increased by reducing the amount of calculation. However, the embodiment is not limited thereto, and those skilled in the art may perform other settings on the value of n as needed.

After calculating the score of the wells as the sample, performing steps S011 through S012, wherein the electrical property parameters of the wells corresponding to the score of each well are required to be tested, and the relationship between the score and the electrical property parameters is established and output in the form of a comparison chart and/or a comparison table.

TABLE 1 relationship of degree of notching to electrical properties of the holes

Degree of scoring	Feature(s)
		Greater than 1.2nm	Too large notches deteriorate the electrical properties
1 to 1.2nm	Clear and distinct etching trace, improved electrical properties, but not reaching the requirement
		0.9 to 1nm	Etching traces can be observed in part of the holes, the electrical properties are changed, and improvement is needed
Less than 0.9nm	No etching trace can be observed by naked eyes, the electrical property is good, and the requirement is met

As can be seen from table 1, when the notch degree is less than 0.9nm, the electrical properties of the hole are good, and when the notch degree is greater than 0.9nm, the etching process of the hole needs to be improved, so as to provide a quantitative standard for improving the etching process.

However, the embodiments of the present invention are not limited thereto, and those skilled in the art can perform other settings on the electrical parameters, such as current, power, etc., as needed.

In step S06, it is determined whether the electrical property parameter corresponding to the hole satisfies a reasonable range according to the relationship chart and the score of the hole.

When a plurality of holes exist in the semiconductor structure, each hole may be numbered, the score of each hole may be automatically measured in a batch as shown in fig. 16, and then the score of each hole may be output, for example, in a table form.

TABLE 2 measurement of the degree of indentation of each well

As can be seen from table 2, the score of each of the labeled wells in fig. 16 was evaluated in combination with table 1 to determine the electrical properties of each well. For example, the hole with the number 0 has a notch degree smaller than 0.9nm and good electrical property, and the holes with the numbers 1 to 17 have notch degrees larger than 0.9nm, and an etching process needs to be improved, and in a specific etching process, the process parameters of etching can be adjusted according to tables 1 and 2, including: one or more of reaction pressure, reaction time, reaction temperature, reaction speed, radio frequency power, gas or liquid flow rate, etc., thereby reducing the score of each hole and further optimizing electrical properties.

In step S07, the correspondence of the depth of the hole to the score is obtained from a plurality of scores in the axial direction of each hole. Since the sectional images are taken at different heights in the same horizontal direction of the semiconductor structure in step S01, sectional patterns of different depths of the same hole 101 are obtained. The scoring degree of the same hole at different depths can be obtained by processing each sectional image through the above steps S02 to S05, and for example, the correspondence between the different depths of the hole and the scoring degrees is output in the form of a scatter diagram.

In step S08, it is determined whether the electrical property parameters corresponding to different depths of the same hole satisfy a reasonable range according to the corresponding relationship between the depth of the hole and the notch degree.

In this step, it is necessary to perform an all-round analysis of the holes in the horizontal and vertical directions in combination with table 1, and further to provide a quantitative standard for improving the etching process.

Fig. 17 shows a schematic structural diagram of a method for detecting a semiconductor structure according to an embodiment of the present invention, fig. 18 shows a schematic structural diagram of a first building block in fig. 17, and fig. 19 shows a schematic structural diagram of an identification block in fig. 17.

As shown in fig. 17 to 19, the testing apparatus for a semiconductor structure according to an embodiment of the present invention includes: a first establishing module 110, an obtaining module 120, a recognizing module 130, a fitting module 140, a calculating module 150, a judging module 160 and a second establishing module 170.

The first building module 110 is configured to build a map and/or a look-up table of the relationship between the score and the at least one electrical performance parameter. The obtaining module 120 is configured to obtain a cross-sectional image of the semiconductor structure output by the transmission electron microscope, where the cross-sectional image includes a cross-sectional view of at least one hole, and a plane of the cross-sectional view is perpendicular to an axial direction of the hole. The identification module 130 is configured to identify a plurality of boundary points of the hole, and obtain boundary point coordinates corresponding to the plurality of boundary points. The fitting module 140 is configured to perform a numerical fitting of the ellipse according to the boundary point coordinates, and obtain a center of the ellipse. The calculation module 150 is configured to obtain distances from the n boundary points to the boundary of the ellipse in the radial direction of the ellipse, and calculate an average value of the n distances, and use the average value as the score of the hole. The judging module 160 is used for judging whether the wells meet the quality requirements according to the relationship comparison table and the nicking degrees of the wells. The second establishing module 170 is configured to obtain notch degrees of each hole at different depths in an axial direction perpendicular to each hole, and establish a relationship between different depths of the same hole and corresponding electrical performance parameters according to a corresponding relationship between the depths of the holes and the notch degrees.

The first setup module 110 includes a sample testing unit 111 and an output unit 112. The sample testing unit 111 is used for testing the electrical property parameters of the holes corresponding to the score of each hole as a sample. The output unit 112 is used for outputting the relationship between the notch degree and the electrical performance parameter in the form of a comparison chart and/or a comparison table.

The recognition module 130 includes a processing unit 131, a frequency filtering unit 132, and a coordinate acquiring unit 133. The processing unit 131 is configured to perform pixel point translation on the cross-sectional image and obtain a second derivative of the image. The frequency filtering unit 132 is used for performing high-frequency filtering processing on the sectional image. The coordinate obtaining unit 133 is configured to obtain a plurality of boundary point coordinates on the boundary according to the second derivative, where a polar value of the second derivative is used as the boundary point of the image.

The semiconductor structure is automatically checked by the testing device of the semiconductor structure of the embodiment of the invention, so that the detection method is realized, and details are not repeated here.

According to the detection method and the detection device of the semiconductor structure, the detail characteristics of the semiconductor structure can be obtained by acquiring the section image of the semiconductor structure output by the transmission electron microscope, and the pixel size of the section image is generally from a few nanometers to dozens of nanometers and even below the nanometer level; recognizing the boundary point coordinates of the profile image of each hole through the profile image and performing ellipse fitting to ensure that the center of the ellipse is superposed with the center of the hole; the method comprises the steps of obtaining the distances from n boundary points to the boundary of an ellipse, and taking the average value of the n distances as the score of a hole, wherein the score can represent the light and heavy degree of etching traces, so that the light and heavy degree of the etching traces of the hole is quantized; by establishing a relation comparison table between the indentation degree and at least one electrical performance parameter and judging whether the electrical performance parameter corresponding to the hole is in a reasonable range according to the relation comparison table and the indentation degree of the hole, the purpose of quantitatively analyzing the influence of the etching trace degree of the hole on the electrical performance is achieved.

Because the detection device of the semiconductor structure automatically detects the semiconductor structure, the efficiency and the reliability of measurement are improved.

In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. Further, although the embodiments are described separately above, this does not mean that the measures in the respective embodiments cannot be used advantageously in combination.

The embodiments of the present invention have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the invention, and these alternatives and modifications are intended to fall within the scope of the invention.

Claims

1. A method of inspecting a semiconductor structure, comprising:

acquiring a section image of the semiconductor structure output by a transmission electron microscope, wherein the section image comprises a section pattern of at least one hole, and a plane of the section pattern is perpendicular to the axial direction of the hole;

identifying a plurality of boundary points of the hole, obtaining a plurality of boundary point coordinates corresponding to the boundary points, and obtaining a center point coordinate of the hole according to the boundary point coordinates;

carrying out ellipse numerical fitting according to the boundary point coordinates;

in the radial direction of the ellipse, obtaining the distances from the boundary points of the n holes to the boundary points of the fitted ellipse, calculating the average value of the n distances, and taking the average value as the notch degree of the hole for measuring the etching quality of the hole; and

establishing a relation comparison table of the nicking degree and at least one electrical property parameter, and judging whether the hole meets the quality requirement according to the comparison table,

wherein n is an integer greater than 1.

2. The method of claim 1, wherein the step of establishing the relational mapping table comprises:

testing the scoring of each of said wells as a sample and the corresponding electrical performance parameter;

and establishing a relation between the notch degree and the electrical property parameter, and outputting a corresponding comparison map and/or a comparison table.

3. The detection method according to claim 2, further comprising obtaining the score of each hole at different depths in the axial direction perpendicular to each hole, and outputting the corresponding relationship between the depth of each hole and the score in the form of a graph.

4. The method of claim 3, further comprising establishing a relationship between different depths of the same well and corresponding electrical performance parameters based on the correspondence between the depths of the wells and the score.

5. The method according to any one of claims 1 to 4, wherein the step of obtaining boundary point coordinates corresponding to the plurality of boundary points comprises:

performing second derivative processing on the section image; and

obtaining a plurality of boundary point coordinates on a boundary based on the second derivative processing result.

6. The detection method according to claim 5, wherein the step of performing second derivative processing on the sectional image comprises:

performing pixel translation on the section image, and obtaining a second derivative of the image,

and the extreme value of the second derivative is used as the boundary point of the section image.

7. The detection method according to claim 6, wherein before performing the second derivative processing on each image, further comprising performing a high frequency filtering processing on the image.

8. An apparatus for inspecting a semiconductor structure, comprising:

the first establishing module is used for establishing a relation comparison table between the notch degree and at least one electrical performance parameter;

the acquisition module is used for acquiring a section image of the semiconductor structure output by a transmission electron microscope, and comprises a section pattern of at least one hole, wherein the plane of the section pattern is perpendicular to the axial direction of the hole;

the identification module is used for identifying a plurality of boundary points of the hole and obtaining boundary point coordinates corresponding to the boundary points;

the fitting module is used for carrying out ellipse numerical fitting according to the boundary point coordinates and obtaining the center of the ellipse;

the calculation module is used for obtaining the distances from the n boundary points to the boundary of the ellipse in the radial direction of the ellipse, calculating the average value of the n distances, and taking the average value as the notch degree of the hole to measure the etching quality of the hole; and

a judging module for judging whether the hole meets the quality requirement according to the relation comparison table and the nicking degree of the hole,

wherein n is an integer greater than 1.

9. The detection apparatus according to claim 8, wherein the establishing module comprises:

the sample testing unit is used for testing the electrical performance parameters corresponding to the nicking degree of each hole as a sample; and

and the output unit is used for outputting the relationship between the notch degree and the electrical property parameter in the form of a comparison chart and/or a comparison table.

10. The detecting device according to claim 9, further comprising a second establishing module, configured to obtain a score of each hole at different depths in an axial direction perpendicular to each hole, respectively, and establish a relationship between different depths and corresponding electrical performance parameters of the same hole according to a corresponding relationship between the depths of the holes and the scores.

11. The detection apparatus according to claim 10, wherein the identification module comprises:

the processing unit is used for carrying out pixel point translation on the section image and obtaining a second derivative of the image; and

a boundary point coordinate obtaining unit for obtaining a plurality of boundary point coordinates on the boundary according to the second derivative,

and the polar value of the second derivative is used as the boundary point of the image.

12. The detection apparatus according to claim 11, wherein the identification module further comprises a frequency filtering unit configured to perform a high-frequency filtering process on the cross-sectional image.

13. A testing device according to any of claims 8 to 12 wherein the testing device is an automatic testing device.