CN110737607B

CN110737607B - Method and device for managing HMB memory, computer equipment and storage medium

Info

Publication number: CN110737607B
Application number: CN201910947374.7A
Authority: CN
Inventors: 吴娴; 韩道静; 王庆
Original assignee: Shenzhen Union Memory Information System Co Ltd
Current assignee: Shenzhen Union Memory Information System Co Ltd
Priority date: 2019-09-30
Filing date: 2019-09-30
Publication date: 2021-09-14
Anticipated expiration: 2039-09-30
Also published as: CN110737607A; WO2021062982A1

Abstract

The invention relates to a method and a device for managing an HMB memory, computer equipment and a storage medium, wherein the method comprises the following steps: acquiring a mapping unit to be written in a complete mapping table to obtain attribute information of the mapping unit; screening the management units with the same offset as the mapping unit according to the attribute information to obtain an initial set; judging whether an idle management unit exists in the initial set; if yes, selecting an idle management unit to obtain a target management unit; if not, acquiring a management unit with the largest Age value as a target management unit; writing the attribute information of the mapping unit into a target management unit to form management information; and writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information. According to the invention, the HMB is divided into a plurality of segments, and the mapping units with the same offset are correspondingly stored, so that the hot data hit rate of the HMB is greatly increased, and the utilization rate of the HMB is further improved.

Description

Method and device for managing HMB memory, computer equipment and storage medium

Technical Field

The present invention relates to the field of SSD mapping table management, and more particularly, to a method and apparatus for managing an HMB memory, a computer device, and a storage medium.

Background

The NVMe (non Volatile Memory express) protocol defines a Host Memory Buffer (HMB) function, which means that a Solid State Disk (SSD) supporting the NVMe protocol can use a Host Memory (DRAM) which is specially allocated to the solid state disk by a Host, so that the solid state disk does not need to be equipped with the DRAM by itself, and the cost and the power consumption can be greatly reduced.

The solid state disk master control supporting the HMB function can obtain the use right of a part of host memory, and the size of the host memory is negotiated by the host and the solid state disk according to respective capabilities and is not fixed. Here, it is assumed that the size of the HMB is 256MB and is used for caching the temporary mapping table, for a solid state disk with a capacity of 1TG, only a part of the mapping table can be cached in the memory, the complete mapping table still needs to be stored in the flash memory, the master control of the solid state disk is responsible for managing the temporary mapping table in the HMB, and the firmware of the solid state disk is responsible for managing the complete mapping table in the flash memory.

When a host initiates a read command, the master firstly judges whether the mapping information of each LBA is in the HMB according to the management information, if so, the mapping information (data) is read from the HMB to the SSD master through the PCIe bus, the mainstream third generation PCIe bus can provide 1GB/s bus bandwidth, 4us is only needed for transmitting 4KB data, the speed is quite high, if the mapping information is not in the HMB, the SSD master can only read the mapping information from the flash memory of the SSD, the time for reading one physical page is about 80us, the speed is relatively slow, and then the mapping information also needs to be cached in the HMB, because the mapping information is Hot (frequently updated data).

The existing master design has proposed a method for managing HMB memory, which divides the full mapping table in SSD into n parts (segments) according to the HMB size, where n is the full mapping table size/HMB size, the master's cache (SRAM) allocates management information for each 4KB memory in HMB, and those 4KB mapping units with the same offset in different segments in the full mapping table compete for the management unit with offset in the master SRAM and the 4KB memory with offset in HMB, and implement the competition principle that new data overwrites old data. As shown in fig. 1, where n is 3 in this example, it can be seen that the size of each segment is equal to the HMB size, we define an offset (offset) for each 4KB grain in the segment, with a maximum offset of 3 (0-3) in this example.

When a new 4KB map unit needs to be stored in the HMB, the controller stores segment _ idx and offset _ idx of the 4KB map unit provided by the firmware into the management information with the offset equal to offset _ idx, transfers the 4KB map unit data to the 4KB host memory with the offset of offset _ idx in the HMB, and then validates the valid location.

In the method for managing HMB memory in the prior art, in order to pursue extreme query efficiency, mapping units with the same offset in all segments compete for a management unit in a master (corresponding to 4KB memory space in an HMB), so that hot data is easily lost. For example, five pieces of thermal data [ segment0, offset0], [ segment0, offset2], [ segment1, offset0], [ segment2, offset0], [ segment1, offset2] are written, and only [ segment2, offset0] and [ segment1, offset2] are finally cached in the HMB, and in addition, three pieces of data are all lost, so that the usage rate of the HMB is low, and the resource waste of the HMB is caused.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provides the method.

In order to achieve the purpose, the invention adopts the following technical scheme: a method for managing HMB memory comprises the following steps:

acquiring a mapping unit to be written in a complete mapping table to obtain attribute information of the mapping unit;

screening the management units with the same offset as the mapping unit according to the attribute information to obtain an initial set;

judging whether an idle management unit exists in the initial set;

if the idle management unit exists, selecting the idle management unit to obtain a target management unit;

if no idle management unit exists, acquiring a management unit with the largest Age value as a target management unit;

writing the attribute information of the mapping unit into a target management unit to form management information;

setting the Valid value of the target management unit to be 1, setting the Age value to be 0, and setting the Age values of other management units except the target management unit in the initial set to be added with 1;

and writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information.

Further, before the step of obtaining the mapping unit to be written in the complete mapping table to obtain the attribute information of the mapping unit, the method further includes:

applying for allocating a memory space as an HMB to the host for storing the mapping unit;

dividing the HMB into N segments to obtain segment sizes;

according to the size of the segment, dividing a complete mapping table in the flash memory into M subsections equally, wherein the segment and the subsection have the same size;

dividing the segment into S segment memory spaces, and dividing the sub-segment into S mapping units, wherein the segment memory spaces and the mapping units have the same size;

defining a segmented memory space for storing the mapping unit in the same offset, and storing the attribute information of the mapping unit as management information in a target management unit with the same offset;

n, M, and S, both represent natural numbers greater than 0.

Further, after the step of writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information, the method further includes:

acquiring a mapping unit reading command;

analyzing the mapping unit reading command to obtain attribute information of the mapping unit to be read;

inquiring the management unit according to the attribute information to obtain the management unit with the same attribute information;

and reading the mapping unit data of the corresponding position on the HMB according to the management information of the management unit.

Further, after the step of writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information, the method includes:

and storing the management units belonging to the same initial collection in SRAM sections with continuous physical addresses.

The invention also adopts the following technical scheme: an apparatus for managing HMB memory, comprising:

the attribute obtaining unit is used for obtaining a mapping unit to be written in the complete mapping table so as to obtain attribute information of the mapping unit;

the screening set unit screens the management units with the same offset as the mapping unit according to the attribute information to obtain an initial set;

the idle judging unit is used for judging whether an idle management unit exists in the initial set or not, if the idle management unit exists, the idle management unit is selected to obtain a target management unit, and if the idle management unit does not exist, the management unit with the largest Age value is obtained to serve as the target management unit;

an information writing unit for writing the attribute information of the mapping unit into the target management unit to form management information;

the assignment unit is used for setting the Valid value of the target management unit to be 1 and the Age value to be 0, and setting the Age values of other management units except the target management unit in the initial set to be added with 1;

and the mapping writing unit is used for writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information.

The HMB setting unit comprises a memory application subunit, a segmentation subunit, a division subunit, a segmentation subunit and a definition subunit;

the memory application subunit is configured to apply for allocating a memory space to the host as an HMB for storing the mapping unit;

the segmentation subunit is configured to divide the HMB equally into N segments to obtain segment sizes;

the subsection subunit is used for equally dividing the complete mapping table in the flash memory into M subsections according to the subsection size, and the subsection size is equal to the subsection size;

the segmentation subunit segments the segment into S segmented memory spaces, segments the subsection into S mapping units, and the segmented memory spaces and the mapping units have the same size;

the definition subunit is used for defining the segmented memory space for storing the mapping unit in the same offset, and the attribute information of the mapping unit is stored in the target management unit with the same offset as the management information;

n, M, and S, both represent natural numbers greater than 0.

The system further comprises a data reading unit, wherein the data reading unit comprises a command acquisition subunit, an attribute analysis subunit, an attribute query subunit and a data reading subunit;

the command acquisition subunit is used for acquiring a mapping unit reading command;

the attribute analysis subunit is used for analyzing the mapping unit reading command to obtain the attribute information of the mapping unit to be read;

the attribute inquiry subunit is used for inquiring the management unit according to the attribute information to obtain the management unit with the same attribute information;

and the data reading subunit is used for reading the mapping unit data at the corresponding position on the HMB according to the management information of the management unit.

Furthermore, the system also comprises an address adjusting unit which is used for storing the management units belonging to the same initial collection in the SRAM section with continuous physical addresses.

The invention also adopts the following technical scheme: a computer device comprising a memory having stored thereon a computer program and a processor implementing a method of managing HMB memory as described in any one of the above when the computer program is executed by the processor.

The invention also adopts the following technical scheme: a storage medium storing a computer program which, when executed by a processor, implements a method of managing HMB memory as described in any one of the above.

Compared with the prior art, the invention has the beneficial effects that: according to the method, the HMB is divided into a plurality of segments, and the mapping units with the same offset are correspondingly stored, so that the hot data hit rate of the HMB is greatly increased, and the utilization rate of the HMB is further improved; the management units with the same offset in the main control are mapped to the continuous physical address field of the SRAM, and the parallel implementation of a hardware circuit is matched, so that the query time is shortened, and the data query efficiency is improved.

The invention is further described below with reference to the accompanying drawings and specific embodiments.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram illustrating an application of a conventional method for managing an HMB memory;

fig. 2 is a flowchart illustrating a method for managing an HMB memory according to an embodiment of the present invention;

fig. 3 is a schematic flow chart of an HMB setting sub-process of a method for managing an HMB memory according to an embodiment of the present invention;

fig. 4 is a schematic diagram illustrating a sub-flow of reading a mapping unit of a method for managing an HMB memory according to an embodiment of the present invention;

fig. 5 is a flowchart illustrating a method for managing an HMB memory according to another embodiment of the present invention;

fig. 6 is an application schematic diagram of a method for managing an HMB memory according to an embodiment of the present invention;

fig. 7 is an application schematic diagram of a method for managing an HMB memory according to an embodiment of the present invention;

fig. 8 is a schematic block diagram of an apparatus for managing HMB memory according to an embodiment of the present invention;

fig. 9 is a schematic block diagram of an HMB configuration unit of an apparatus for managing an HMB memory according to an embodiment of the present invention;

fig. 10 is a schematic block diagram of an apparatus for managing HMB memory according to another embodiment of the present invention;

fig. 11 is a schematic block diagram of a data reading unit of an apparatus for managing an HMB memory according to another embodiment of the present invention;

FIG. 12 is a schematic block diagram of a computer device provided by an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

Fig. 2 is a schematic flowchart of a method for managing an HMB memory according to an embodiment of the present invention. The method for managing the HMB memory is applied to the SSD, and the SSD and a host carry out data interaction.

Fig. 2 is a flowchart illustrating a method for managing an HMB memory according to an embodiment of the present invention. As shown in fig. 2, the method includes the following steps S110 to S180.

S110, obtaining a mapping unit to be written in the complete mapping table to obtain attribute information of the mapping unit.

In this embodiment, the complete mapping table may be divided into a plurality of mapping units, each having a size KB, each of which is written with corresponding attribute information, where the attribute information includes offset information and belonging branch information. For example, the mapping unit [ segment _ x, offset _ y ] represents that the offset information is offset _ y, the belonging part information is segment _ x, and the attribute information of the mapping unit includes the offset information offset _ y and the belonging part information is segment _ x.

Fig. 3 is a schematic flow chart of an HMB setting sub-process, and referring to fig. 3, the method for managing an HMB memory according to the embodiment further includes an HMB setting process before step S110, and the HMB setting process includes steps S210 to S250.

S210, applying for allocating a memory space as an HMB to the host for storing the mapping unit.

In this embodiment, the SSD initially applies for a part of the Memory space to the host as an hmb (host Memory buffer), so that the SSD (solid state disk) supporting the NVMe protocol can use the host Memory (DRAM) applied from the host, and thus the solid state disk does not need to be equipped with the DRAM, which can greatly reduce the cost and power consumption.

S220, dividing the HMB into N segments equally to obtain segment sizes.

And S230, dividing the complete mapping table in the flash memory into M subsections equally according to the sizes of the subsections, wherein the sizes of the subsections are equal to that of the subsections.

And S240, dividing the segment into S segment memory spaces, dividing the subsection into S mapping units, wherein the segment memory spaces and the mapping units have the same size.

In this embodiment, for steps S220-S240, it is distinguished from the existing method that the full map on the flash memory is cut into n parts (segments) according to the size of the whole HMB, where n is the size of the full map/the size of the HMB. The invention firstly divides the whole HMB into N Segments (SET), then divides the complete mapping table according to the segment size to obtain M segments (segment), and further divides the segment into S segment memory spaces, and divides the segments into S mapping units, wherein the segment memory spaces and the mapping units have the same size, in the embodiment, the sizes of the segment memory spaces and the mapping units are both 4 KB.

As shown in fig. 6, in this example, the size of the HMB is 24KB, N is 3, the HMB is divided into 3 segments, each segment has a size of 8KB, each segment includes 2 segmented memory spaces of 4KB, and the HMB includes 6 segmented memory spaces in total; the size of the complete mapping table is 48KB, the complete mapping table is divided into 6 parts according to a segment size of 8KB, M is 6, each part is 8KB, each part comprises 2 mapping units of 4KB, and a total of 12 mapping units, the SRAM controlled by the SSD has 6 management units for correspondingly and correlatively managing 6 segment memory spaces, and the management units are used for correspondingly storing the attribute information of the mapping units written into the segment memory spaces as management information, including segment values and offset values.

S250, defining the segmented memory space for storing the mapping units in the same offset, and storing the attribute information of the mapping units as management information in target management units with the same offset.

In this embodiment, the mapping units and the segmented memory space are 4KB, and the mapping units with the same offset (offset) defined by the present invention can be stored in the segmented memory space with the same offset. Specifically, M mapping units with offset equal to x in the complete mapping table may compete together and are finally stored in N segmented memory spaces with offset equal to x, and compared with the prior art in which multiple mapping units with offset equal to x compete for one segmented memory space with offset equal to x, the present solution can store multiple mapping units with the same offset simultaneously, so that the memory space of the HMB is better utilized, and the hit rate of the HMB is improved.

As shown in fig. 6, the mapping unit with offset equal to x in 6 segments divided by the complete mapping table competes for the memory space with offset equal to x in 3 SETs in the HMB, where x is 0 or 1, so that the HMB can store N (3) mapping units with the same offset equal to x.

Specifically, N, M and S both represent natural numbers greater than 0.

S120, screening the management units with the same offset as the mapping unit according to the attribute information to obtain an initial set.

In this embodiment, the offset information in the attribute information is obtained according to the obtained attribute information, all the management units with the same offset are screened out according to the offset information, and all the management units are used as an initial set to further determine the management units in the initial set, and determine a target management unit for writing the management information.

S130, judging whether the initial set has an idle management unit.

S140, if the idle management unit exists, the idle management unit is selected to obtain the target management unit.

S150, if no idle management unit exists, acquiring the management unit with the largest Age value as a target management unit.

In this embodiment, the initial set includes management units with the same offset attribute, and before the mapping unit writes the offset into the segmented memory space corresponding to the offset, it needs to determine whether there is a free segmented memory space for writing, so it needs to determine whether there is a free management unit in the initial set, and there are two cases at this time. If one type is a management unit with an idle state, the mapping unit can be directly written into the corresponding segmented memory space, which represents that the segmented memory space without the mapping unit written therein exists, and the idle management unit needs to be further selected to obtain a target management unit; in addition, an idle management unit does not exist, a segmented memory space in which a mapping unit is written needs to be eliminated and written into a new mapping unit, and at this time, the management unit with the largest Age value needs to be acquired as a target management unit.

Specifically, the method adopts an LRU (Least recently Used) algorithm, introduces an Age value into the management units, the Age value represents the freshness of data in a corresponding segmented memory space, the value is 0 and 1 … N-1, the smaller the value is, the newer the data is, each management unit carries the Age value, and the management unit with the largest Age value (N-1) in the initial set is the oldest management unit and is Used as a target management unit for data elimination and writing in a new mapping unit.

And S160, writing the attribute information of the mapping unit into the target management unit to form management information.

In this embodiment, the attribute information is written into the target management unit to form management information, which is used to subsequently query the corresponding mapping unit according to the attribute information and download the corresponding mapping data.

S170, setting the Valid value of the target management unit to be 1, setting the Age value to be 0, and setting the Age values of other management units except the target management unit in the initial set to be added with 1.

In this embodiment, Valid indicates whether the management information is Valid, a value of 1 indicates that the management information of the management unit is Valid, a value of 0 indicates that the management information of the management unit is invalid, and a value of 1 indicates that the management information in the management unit is Valid when the Valid value of the target management unit is set. The Age value newly written into the mapping unit is set to be 0, and the Age values of other management units except the target management unit in the initial set are added with 1, namely the Age values in the other management units which are not eliminated are correspondingly added with 1 each time a new mapping unit is written, so that the Age value corresponding to the management unit corresponding to the mapping unit which is written first is always larger than the Age value corresponding to the management unit corresponding to the mapping unit which is written later, and the oldest management unit can be screened out through the Age values and eliminated.

For example, five mapping units are written in firmware [ segment0, offset0], [ segment0, offset1], [ segment1, offset0], [ segment2, offset0], [ segment1, and offset1], and three pieces of thermal data with final offset equal to 0 are buffered in the HMB according to the above writing and erasing rules. Assuming that the subsequent firmware is written into the mapping unit [ segment5, offset0], the management unit #1 with more elimination rule is eliminated, as shown in FIG. 6.

And S180, writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information.

In this embodiment, according to the offset information in the management information, mapping units are written into the segmented memory space with the same offset in the HMB, for example, all mapping units with an offset equal to 0 are correspondingly written into the segmented memory space with an offset equal to 0, so as to ensure that a plurality of mapping units with the same offset can be stored, thereby better utilizing the memory space of the HMB and improving the hit rate of the HMB.

Referring to fig. 5, in an embodiment, step S190 is further included after step S180.

And S190, storing the management units belonging to the same initial collection in SRAM sections with continuous physical addresses.

In one embodiment, since the HMB is divided into multiple segments, the master needs to query the address segments of multiple SRAMs when querying the management unit, which slightly increases the query time. As shown in fig. 7, in the present invention, by storing the management units belonging to the same initial collection in the SRAM segments with consecutive physical addresses, when the hardware circuit of the main control query algorithm is implemented, the query of the SRAM (initial address plus query length) can be started only once, which can effectively shorten the query time and improve the query efficiency.

Fig. 4 is a flowchart illustrating a sub-process of reading the mapping unit, and referring to fig. 4, the method for managing the HMB memory according to this embodiment further includes a process of reading the mapping information (data) after step S180, and the process of reading the mapping information (data) includes steps S310 to S340.

S310, obtaining a mapping unit reading command.

S320, analyzing the mapping unit reading command to obtain the attribute information of the mapping unit to be read.

S330, inquiring the management unit according to the attribute information to obtain the management unit with the same attribute information.

S340, reading the mapping unit data of the corresponding position on the HMB according to the management information of the management unit.

In an embodiment, when reading the mapping unit data, the mapping unit reading command is obtained, the mapping unit reading command is analyzed to obtain the attribute information of the mapping unit to be read, the management unit is queried according to the attribute information to obtain the management unit with the same attribute information, and the mapping unit data at the corresponding position on the HMB is read according to the management information of the management unit.

For example, if the query mapping unit [ segment1, offset0] is in the HMB, the master directly queries whether a segment1 unit exists in the management unit whose offset is 0, and if so, the corresponding HMB data is sent to the firmware, otherwise, the HMB data is not hit, and in this example, the result is a hit in the HMB #3 memory.

Fig. 8 is a schematic block diagram of an apparatus for managing HMB memory according to an embodiment of the present invention. As shown in fig. 8, the present invention also provides a device for managing an HMB memory, corresponding to the above method for managing an HMB memory. The apparatus for managing HMB memory, which includes means for performing the above-described method for managing HMB memory, may be configured in a desktop computer, a tablet computer, a portable computer, or the like. Specifically, referring to fig. 8, the apparatus for managing an HMB memory includes an attribute obtaining unit 10, a filter collecting unit 20, a vacancy judging unit 30, an information writing unit 40, an assigning unit 50, a mapping writing unit 60, and an HMB setting unit 70.

An attribute obtaining unit 10, configured to obtain a mapping unit to be written in the complete mapping table, so as to obtain attribute information of the mapping unit.

The screening aggregation unit 20 screens the management units having the same offset as the mapping unit according to the attribute information to obtain an initial aggregation.

And the idle judging unit 30 is configured to judge whether an idle management unit exists in the initial set, select the idle management unit if an idle management unit exists, to obtain a target management unit, and acquire the management unit with the largest Age value as the target management unit if an idle management unit does not exist.

An information writing unit 40 for writing the attribute information of the mapping unit to the target management unit to form the management information.

And the assigning unit 50 is configured to set the Valid value of the target management unit to 1, set the Age value of the target management unit to 0, and set the Age values of the other management units except the target management unit in the initial set plus 1.

And a mapping writing unit 60, configured to write the mapping unit into the segmented memory space with the same offset in the HMB according to the management information.

Referring to fig. 9, in this embodiment, the apparatus for managing an HMB memory further includes an HMB setting unit 70, where the HMB setting unit 70 includes a memory application subunit 71, a segmentation subunit 72, a division subunit 73, a split subunit 74, and a definition subunit 75.

The memory application subunit 71 is configured to apply for allocating a memory space to the host as an HMB for storing the mapping unit.

A segmentation subunit 72, configured to divide the HMB into N segments equally to obtain the segment size.

And the part subunit 73 is configured to divide the complete mapping table in the flash memory into M parts, where the size of each part is equal to that of each segment.

The segmentation subunit 74 segments the segment into S segmented memory spaces, segments the segment into S mapping units, and the segmented memory spaces and the mapping units have the same size.

In the present embodiment, the segmentation subunit 72, the partition subunit 73, and the splitting subunit 74 are different from the existing method of splitting the full map on the flash memory into n partitions (segments) according to the size of the whole HMB, where n is the size of the full map/the size of the HMB. The invention firstly divides the whole HMB into N Segments (SET), then divides the complete mapping table according to the segment size to obtain M segments (segment), and further divides the segment into S segment memory spaces, and divides the segments into S mapping units, wherein the segment memory spaces and the mapping units have the same size, in the embodiment, the sizes of the segment memory spaces and the mapping units are both 4 KB.

And a defining subunit 75, configured to define a segmented memory space for storing the mapping unit in the same offset, where the attribute information of the mapping unit is stored as management information in a target management unit with the same offset.

Specifically, N, M and S both represent natural numbers greater than 0.

Fig. 10 is a schematic block diagram of an apparatus for managing HMB memory according to another embodiment of the present invention. As shown in fig. 10, the apparatus for managing an HMB memory of the present embodiment is added with an address adjustment unit 80 and a data reading unit 90 on the basis of the above embodiments.

And an address adjusting unit 80, configured to store the management units belonging to the same initial collection in SRAM segments with consecutive physical addresses.

As shown in fig. 11, the data reading unit 90 includes a command acquisition sub-unit 91, an attribute parsing sub-unit 92, an attribute querying sub-unit 93, and a data reading sub-unit 94.

A command obtaining subunit 91, configured to obtain a mapping unit read command.

And the attribute analyzing subunit 92 is configured to analyze the mapping unit reading command to obtain the attribute information of the mapping unit to be read.

And an attribute query subunit 93, configured to query the management unit according to the attribute information to obtain the management units with the same attribute information.

And a data reading sub-unit 94, configured to read mapping unit data at a corresponding position on the HMB according to the management information of the management unit.

It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation process of the apparatus for managing an HMB memory and each unit may refer to the corresponding description in the foregoing method embodiment, and for convenience and conciseness of description, no further description is provided herein.

Referring to fig. 12, fig. 12 is a schematic block diagram of a computer device according to an embodiment of the present application. The computer device 500 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of a plurality of servers.

Referring to fig. 12, the computer device 500 includes a processor 502, memory, and a network interface 505 connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.

The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer programs 5032 comprise program instructions that, when executed, cause the processor 502 to perform a method of managing HMB memory.

The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.

The memory 504 provides an environment for the execution of the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 may be caused to perform a method for managing HMB memory.

The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 12 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer device 500 to which the present application may be applied, and that a particular computer device 500 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

Wherein the processor 502 is adapted to run a computer program 5032 stored in the memory.

It should be understood that in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.

Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium.

The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.

The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.

While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for managing an HMB memory is characterized by comprising the following steps:

judging whether an idle management unit exists in the initial set;

writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information; before the step of obtaining the mapping unit to be written in the complete mapping table to obtain the attribute information of the mapping unit, the method further includes:

dividing the HMB into N segments to obtain segment sizes;

n, M, and S, both represent natural numbers greater than 0.

2. The method according to claim 1, wherein after the step of writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information, the method further comprises:

acquiring a mapping unit reading command;

3. The method according to claim 1, wherein the step of writing the mapping unit into the segmented memory space with the same offset in the HMB according to the management information is followed by:

4. An apparatus for managing HMB memory, comprising:

5. The apparatus of claim 4, further comprising an HMB setup unit, wherein the HMB setup unit comprises a memory application subunit, a segmentation subunit, a division subunit, a split subunit, and a definition subunit;

the definition subunit is used for defining the segmented memory space for storing the mapping unit in the same offset, and the attribute information of the mapping unit is stored in the target management unit with the same offset as the management information; n, M, and S, both represent natural numbers greater than 0.

6. The apparatus for managing an HMB memory of claim 4, further comprising a data reading unit, wherein the data reading unit comprises a command obtaining subunit, an attribute parsing subunit, an attribute querying subunit, and a data reading subunit;

7. The apparatus of claim 4, further comprising an address adjustment unit for storing management units belonging to the same initial set in SRAM segments with consecutive physical addresses.

8. A computer device, characterized in that the computer device comprises a memory on which a computer program is stored and a processor which, when executing the computer program, implements the method of managing HMB memory according to any one of claims 1 to 3.

9. A storage medium, characterized in that it stores a computer program which, when executed by a processor, implements the method of managing HMB memory according to any one of claims 1 to 3.