CN110707056B - 封装组件及其制造方法、以及降压型变换器的封装组件 - Google Patents
封装组件及其制造方法、以及降压型变换器的封装组件 Download PDFInfo
- Publication number
- CN110707056B CN110707056B CN201910927320.4A CN201910927320A CN110707056B CN 110707056 B CN110707056 B CN 110707056B CN 201910927320 A CN201910927320 A CN 201910927320A CN 110707056 B CN110707056 B CN 110707056B
- Authority
- CN
- China
- Prior art keywords
- heat dissipation
- package assembly
- package
- wafer
- die
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1582—Buck-boost converters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Materials Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims (47)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910927320.4A CN110707056B (zh) | 2019-09-27 | 2019-09-27 | 封装组件及其制造方法、以及降压型变换器的封装组件 |
US17/025,106 US11302595B2 (en) | 2019-09-27 | 2020-09-18 | Package assembly and method for manufacturing the same, package assembly of buck converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910927320.4A CN110707056B (zh) | 2019-09-27 | 2019-09-27 | 封装组件及其制造方法、以及降压型变换器的封装组件 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110707056A CN110707056A (zh) | 2020-01-17 |
CN110707056B true CN110707056B (zh) | 2021-06-15 |
Family
ID=69197107
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910927320.4A Active CN110707056B (zh) | 2019-09-27 | 2019-09-27 | 封装组件及其制造方法、以及降压型变换器的封装组件 |
Country Status (2)
Country | Link |
---|---|
US (1) | US11302595B2 (zh) |
CN (1) | CN110707056B (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111384044A (zh) * | 2020-04-26 | 2020-07-07 | 无锡中微高科电子有限公司 | 芯片3d封装组合堆叠结构及其封装方法 |
US11908767B2 (en) * | 2021-01-13 | 2024-02-20 | Mediatek Inc. | Semiconductor package structure |
CN117200575A (zh) * | 2022-05-30 | 2023-12-08 | 华为技术有限公司 | 一种非隔离dcdc变换器、供电电源及通信设备 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101450761B1 (ko) * | 2013-04-29 | 2014-10-16 | 에스티에스반도체통신 주식회사 | 반도체 패키지, 적층형 반도체 패키지 및 반도체 패키지의 제조방법 |
CN108022899A (zh) * | 2016-10-28 | 2018-05-11 | 台达电子工业股份有限公司 | 具有引线部件的电源模块及其制造方法 |
CN109256363A (zh) * | 2018-11-07 | 2019-01-22 | 珠海格力电器股份有限公司 | 一种芯片及移动终端 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8063472B2 (en) | 2008-01-28 | 2011-11-22 | Fairchild Semiconductor Corporation | Semiconductor package with stacked dice for a buck converter |
US20100019362A1 (en) * | 2008-07-23 | 2010-01-28 | Manolito Galera | Isolated stacked die semiconductor packages |
US20120299173A1 (en) * | 2011-05-26 | 2012-11-29 | Futurewei Technologies, Inc. | Thermally Enhanced Stacked Package and Method |
US9088215B2 (en) | 2011-06-08 | 2015-07-21 | Futurewei Technologies, Inc. | Power converter package structure and method |
US9159703B2 (en) | 2012-10-18 | 2015-10-13 | International Rectifier Corporation | Power converter package including vertically stacked driver IC |
US8860194B2 (en) | 2012-11-01 | 2014-10-14 | International Rectifier Corporation | Buck converter power package |
CN105849897B (zh) * | 2014-10-17 | 2019-09-27 | 华为技术有限公司 | 散热屏蔽结构及通信产品 |
JP6770331B2 (ja) * | 2016-05-02 | 2020-10-14 | ローム株式会社 | 電子部品およびその製造方法 |
US11276667B2 (en) * | 2016-12-31 | 2022-03-15 | Intel Corporation | Heat removal between top and bottom die interface |
US10566261B2 (en) * | 2017-11-15 | 2020-02-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated fan-out packages with embedded heat dissipation structure |
-
2019
- 2019-09-27 CN CN201910927320.4A patent/CN110707056B/zh active Active
-
2020
- 2020-09-18 US US17/025,106 patent/US11302595B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101450761B1 (ko) * | 2013-04-29 | 2014-10-16 | 에스티에스반도체통신 주식회사 | 반도체 패키지, 적층형 반도체 패키지 및 반도체 패키지의 제조방법 |
CN108022899A (zh) * | 2016-10-28 | 2018-05-11 | 台达电子工业股份有限公司 | 具有引线部件的电源模块及其制造方法 |
CN109256363A (zh) * | 2018-11-07 | 2019-01-22 | 珠海格力电器股份有限公司 | 一种芯片及移动终端 |
Also Published As
Publication number | Publication date |
---|---|
US20210098329A1 (en) | 2021-04-01 |
CN110707056A (zh) | 2020-01-17 |
US11302595B2 (en) | 2022-04-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN108447857B (zh) | 三维空间封装结构及其制造方法 | |
US9780081B2 (en) | Chip package structure and manufacturing method therefor | |
US11134570B2 (en) | Electronic module with a magnetic device | |
US9734944B2 (en) | Electronic package structure comprising a magnetic body and an inductive element and method for making the same | |
CN112997407B (zh) | 采用引线框架和薄介电层掩膜焊垫限定的低电感激光驱动器封装 | |
US20190115330A1 (en) | Method for fabricating electronic package | |
US20160027711A1 (en) | Semiconductor module | |
CN110707056B (zh) | 封装组件及其制造方法、以及降压型变换器的封装组件 | |
US20130181332A1 (en) | Package leadframe for dual side assembly | |
US9275983B2 (en) | Integrated circuit package | |
US9324633B2 (en) | Multi-level package assembly having conductive vias coupled to chip carrier for each level and method for manufacturing the same | |
US10777491B2 (en) | Package comprising carrier with chip and component mounted via opening | |
US9362238B2 (en) | Semiconductor device | |
CN113764385B (zh) | 电子部件 | |
CN105990268B (zh) | 电子封装结构及其制法 | |
US9655265B2 (en) | Electronic module | |
CN104934398A (zh) | 电子部件和引线框架 | |
TWI681414B (zh) | 電子模組 | |
US12027572B2 (en) | Integrated semiconductor device isolation package | |
CN104347550A (zh) | 一种无基板器件及其制造方法 | |
US11404360B2 (en) | Power module with enhanced heat dissipation | |
CN104377186A (zh) | 具有复合基材的电子系统 | |
CN118099152A (zh) | 一种GaN器件封装结构及其封装方法 | |
JP2007012731A (ja) | 回路装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20200305 Address after: 210042 302, Xuanwu Road, 7, Xuanwu Road, Xuanwu District, Nanjing, Jiangsu, China, 7 Applicant after: Silergy Semiconductor Technology (Hangzhou) Ltd. Address before: 310051 No. 6 Lianhui Street, Xixing Street, Binjiang District, Hangzhou City, Zhejiang Province Applicant before: Silergy Semiconductor Technology (Hangzhou) Ltd. |
|
CB02 | Change of applicant information | ||
CB02 | Change of applicant information |
Address after: 210042 302, Xuanwu Road, 7, Xuanwu Road, Xuanwu District, Nanjing, Jiangsu, China, 7 Applicant after: Nanjing Sili Microelectronics Technology Co., Ltd Address before: 210042 302, Xuanwu Road, 7, Xuanwu Road, Xuanwu District, Nanjing, Jiangsu, China, 7 Applicant before: Silergy Semiconductor Technology (Hangzhou) Ltd. |
|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20211220 Address after: 230088 Jisi space 1 368, software park, No. 10 Tiantong Road, high tech Zone, Hefei, Anhui Patentee after: Hefei silijie Semiconductor Technology Co.,Ltd. Address before: 210042 Room 302, building 7, 699-27 Xuanwu Avenue, Xuanwu District, Nanjing City, Jiangsu Province Patentee before: Nanjing Sili Microelectronics Technology Co.,Ltd. |