CN110704006A

CN110704006A - Multi-screen image display method and device, terminal equipment and storage medium

Info

Publication number: CN110704006A
Application number: CN201910931724.0A
Authority: CN
Inventors: 鞠成; 梅健挺
Original assignee: TP Link Technologies Co Ltd
Current assignee: TP Link Technologies Co Ltd
Priority date: 2019-09-29
Filing date: 2019-09-29
Publication date: 2020-01-17
Anticipated expiration: 2039-09-29
Also published as: CN110704006B

Abstract

The application is suitable for the technical field of video transmission, and provides a multi-screen picture display method, a multi-screen picture display device, terminal equipment and a storage medium, wherein the method is used for calculating reference current under the current resistance value according to the path resistance from a video output module to a target screen by adjusting the driving capability of the video output module, outputting corresponding driving current and meeting the requirement that video output is displayed on a plurality of screens. Compared with an active driving shunt way, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, the corresponding reference current is obtained by depending on the resistance value of the obtaining circuit, and the cost advantage is very obvious.

Description

Multi-screen image display method and device, terminal equipment and storage medium

Technical Field

The application belongs to the technical field of video transmission, and particularly relates to a multi-screen image display method and device, terminal equipment and a storage medium.

Background

The homologous multi-screen display means that one video output picture can be displayed on a plurality of video input devices, and pictures on a plurality of display devices are homologous. For example, in a security system, a video recorder device has a scene in which multiple displays play the same video at the same time, and at this time, it is necessary to transmit a video signal to multiple display screens through a shunting technology from an original single video output of a master control. In the prior art, the master video output is not directly connected to the display, but is first output to an active driving unit, and then connected to a plurality of displays through the active driving unit to play the same source video signal. Although the active driving circuit is added to make the display voltage normal, the picture display effect normal, and the picture display conform to the Video Graphics Array (VGA), an additional driving circuit part is required, which increases the device cost, and the stability of the added circuit part also affects the stability of the whole display system.

In conclusion, the existing homologous multi-screen display has the problems of complex system structure and unstable display system.

Disclosure of Invention

The embodiment of the application provides a multi-screen image display method, a multi-screen image display device, terminal equipment and a storage medium, and can solve the problems of complex system structure and unstable display system of homologous multi-screen display.

In a first aspect, an embodiment of the present application provides a multi-screen image display method, including:

transmitting the video signal to a target screen;

acquiring a path resistance between the video signal and the target screen from the video output module;

adjusting the reference current according to the resistance value of the path resistor;

and outputting the corresponding driving current to the target screen.

In one embodiment, before the step of transmitting the video signal to the target screen, the method includes:

establishing an output path between the target screen and the target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single incidence relation;

acquiring a screen access signal transmitted by the first path; wherein the screen access signal is used for determining that the target screen has accessed the video output module;

and transmitting the RGB video signal to a target screen through the second path.

In one embodiment, the first path includes a detection unit, the detection unit is connected with an insertion pin;

the step of obtaining the screen access signal transmitted by the first path includes:

acquiring the level state of the inserted pin;

if the level state is a high level state, judging that the inserting pin is not connected with the target screen;

and if the level state is a low level state, judging that the inserting pin is connected with the target screen, and receiving a screen access signal sent by the detection unit.

In one embodiment, the obtaining the path resistance between the video signal from the video output module to the target screen includes:

acquiring a video output resistor built in the video output module;

acquiring a screen matching resistor built in the target screen; the video output resistor is connected with the screen matching resistor in parallel;

calculating a first final resistance value according to the video output resistor and the screen matching resistor; and the first final resistance value is the resistance value of the path resistor.

In one embodiment, the target screens have N, where N is a positive integer greater than 1, and the screen matching resistors in the N target screens are connected in parallel with each other;

the method comprises the following steps of obtaining a screen matching resistor built in the target screen, wherein the steps comprise:

acquiring all built-in screen matching resistors of the target screen;

calculating second final resistance values of all the screen matching resistors in a parallel state; and the second final resistance value is the screen matching resistance of all the target screens.

In one embodiment, one of the target screens is connected to one of the plug-in pins;

the step of calculating the second final resistance values of all the screen matching resistors in the parallel state includes:

acquiring the level states of all the inserted pins at preset time intervals;

determining the number of the target screens accessed according to the level state;

and calculating a second final resistance value of all the screen matching resistors in the parallel state according to the number of the target screens.

In an embodiment, the step of adjusting the reference current according to the resistance of the path resistor includes:

and calculating the value of the reference current under the current resistance value of the path resistor according to a video transmission standard protocol.

In a second aspect, an embodiment of the present application provides a multi-screen display apparatus, including:

the first transmission module is used for transmitting the video signal to a target screen;

the first acquisition module is used for acquiring the path resistance between the video signal and the target screen from the video output module;

the second acquisition module is used for adjusting the reference current according to the resistance value of the path resistor;

and the output module is used for outputting the corresponding driving current to the target screen.

In a third aspect, an embodiment of the present application provides a terminal device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor, when executing the computer program, implements the multi-screen display method according to any one of the first aspects.

In a fourth aspect, the present application provides a computer-readable storage medium, where a computer program is stored, and when executed by a processor, the computer program implements the multi-screen display method according to any one of the first aspect.

In a fifth aspect, an embodiment of the present application provides a computer program product, which, when run on a terminal device, causes the terminal device to execute the multi-screen display method according to any one of the first aspects.

It is understood that the beneficial effects of the second aspect to the fifth aspect can be referred to the related description of the first aspect, and are not described herein again.

Compared with the prior art, the embodiment of the application has the advantages that: according to the method and the device, the driving capability of the video output module is adjusted, the reference current under the current resistance value is calculated according to the video output module and the path resistance between the target screens, the corresponding driving current is output, and the requirement that the video output is displayed on the plurality of screens is met. Compared with an active driving shunt way, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, the corresponding reference current is obtained by depending on the resistance value of the obtaining circuit, and the cost advantage is very obvious.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

FIG. 1 is a flowchart illustrating an implementation of a multi-screen display method according to an embodiment of the present disclosure;

FIG. 2 is a schematic flowchart illustrating another implementation of a multi-screen display method according to an embodiment of the present disclosure;

FIG. 3 is a schematic structural diagram of a multi-screen display apparatus according to an embodiment of the present disclosure;

FIG. 4 is a schematic diagram illustrating another exemplary configuration of a multi-screen display apparatus according to an embodiment of the disclosure;

FIG. 5 is an illustration of an annotation view of a VGA interface in a multi-screen display device according to an embodiment of the disclosure;

FIG. 6 is a flowchart illustrating yet another implementation of a multi-screen display method according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram illustrating a partial structure of a multi-screen display apparatus according to an embodiment of the present application;

FIG. 8 is a flowchart illustrating a further implementation of a multi-screen display method according to an embodiment of the present disclosure;

FIG. 9 is a schematic diagram illustrating a simplified structure of parallel connection in a multi-screen display method according to an embodiment of the present application;

FIG. 10 is a schematic diagram illustrating a simple structure of serial connections in a multi-screen display method according to an embodiment of the present application;

FIG. 11 is a schematic diagram illustrating another exemplary structure of a multi-screen display apparatus according to an embodiment of the disclosure;

fig. 12 is a schematic structural diagram of a terminal device according to an embodiment of the present application.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

The main execution body of the process in the application is a video output module, and the video output module can be specifically applied to devices such as a DVD player, a computer device, a tablet computer, a smart phone and the like, and is not limited thereto. Fig. 1 is a flowchart illustrating an implementation of a multi-screen display method according to embodiment 1 of the present invention, which is detailed as follows:

and S101, transmitting the video signal to a target screen.

In the present embodiment, the video signals include, but are not limited to, three primary color (RGB) signals, luminance (Y) signals, composite video signals (CVBS), radio frequency signals (RF), etc., the video signals used in the present application are RGB video signals, specifically, each color of RGB (red, green, and blue) can represent the intensity of red, green, and blue by three variables, and is used for recording and displaying a color image, and the RGB video signals are output to a target screen so as to display a color image on the target screen.

The target screen includes, but is not limited to, a computer monitor, a television monitor, a camera display screen, etc. and is used for establishing a connection with the video output module, receiving RGB video signals transmitted by the video output module, and displaying a corresponding picture on the display screen, which is not limited thereto.

S102, acquiring a path resistance between the video signal and the target screen from the video output module.

In application, the path resistance is all resistances between the RGB video signals output by the video output module and the target screen, and may also be considered as all resistances through which the current output by the video output module flows into the target screen, which is not limited herein. The output of the video output module described above contains a display standard digital-to-analog converter (VGADAC) using analog signals, where VGA is the video transmission indicator and DAC is a device that converts digital signals into analog signals (in the form of current, voltage or charge), which can be converted into analog signals so that they can be recognized by the outside world (non-digital systems). In this application, VGADAC is used to output standard RGB video signals to a target screen, and the resistance values of the path resistors passing through the path resistors of the RGB video signals may be different according to the number of screens flowing into the target screen, which is not limited herein.

And S103, adjusting the reference current according to the resistance value of the path resistor.

In application, the video output module comprises a current type video output module and a voltage type video output module, wherein the current type video output module is used for outputting a certain current. If under normal conditions, the magnitude of the reference current value output by the current type output module is not changed, that is, when a change instruction is not received, the magnitude of the maximum value of the current output by the current type output module is not changed, but after the current type output module receives the change instruction, when the current type output module detects that the magnitude of the reference current needs to be changed, the magnitude of the reference current is changed, the voltage type output module is used for outputting a certain voltage, and the magnitude of the reference voltage value of the voltage type output module can be adjusted.

In application, the current mode output module is adopted in the application, because the current mode signal is not affected by the voltage drop of the transmission line, and if the voltage signal is transmitted, the input impedance of the current mode output module is very large (in order to reduce the influence of the resistance on the transmission line), and the voltage division on the line is not small. In normal operation, the driving current is output to make the display image quality of the target screen conform to the VGA standard protocol, and when the number of the target screens is changed, or the resistance value of the resistance of the target screen is changed, namely the resistance value of the path resistance is changed, the video output module can adjust the corresponding reference current according to the actual resistance value of the path resistance, for example, the value of the reference current is increased, and then if the resistance value of the path resistance is not changed, the reference current under the condition is maintained to be unchanged.

And step S104, outputting corresponding driving current to the target screen.

In application, the driving current is a current magnitude output by the output terminal of the video output module, i.e. VGADAC is also used for outputting the driving current signal. The VGADAC can be automatically adjusted according to the value of the reference current, the size of the reference current is calculated according to the obtained path resistance, when the path resistance is changed, the reference current is changed, the output driving current is correspondingly changed, the voltage amplitude of a screen end signal formed by the current received by all target screens meets the VGA protocol standard, and the output effect of the target screen pictures is consistent.

In this embodiment, the driving capability of the video output module is adjusted, and the reference current at the current resistance value is calculated according to the path resistance from the video output module to the target screen, and the corresponding driving current is output, so as to meet the requirement that the video output is displayed on a plurality of screens. Compared with an active driving shunt way, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, the corresponding reference current is obtained by depending on the resistance value of the obtaining circuit, and the cost advantage is very obvious.

Referring to fig. 2, fig. 2 is another flowchart of a multi-screen display method according to embodiment 2 of the present application, which is specifically as follows:

before step S101, the method includes:

s201, establishing an output path between the target screen and a target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single association relationship.

In application, the resistance value of the output path corresponds to the resistance value of the path resistor, the single-to-single correlation relationship is an output path established between a target screen and a screen output module, only one output path is arranged between one target screen and the screen output module, and one output path only comprises a first path and a second path.

S202, acquiring a screen access signal transmitted by the first path; wherein the screen access signal is used to determine that the target screen has accessed the video output module.

In application, the first path is used for acquiring a screen access signal transmitted by the first path when the video output module is connected with a target screen. The first path has a detection circuit, and the detection circuit is configured to detect whether a target screen is connected to obtain a resistance value of a corresponding path resistor, so as to correspondingly adjust a reference current of VGADAC and output a corresponding driving current, as shown in fig. 3.

And S203, transmitting the video signal to a target screen through the second path.

The second path is used for transmitting the RGB video signals and the current signals output by the screen output module. Specifically, the second path is from a VGADAC port of the video output module to output one path of RGB video signals to an RGB video signal receiving port of the target screen through an electrostatic discharge (ESD) protection circuit, where the electrostatic protection circuit is used to prevent all components between the video output module and the target screen from being damaged by electrostatic discharge, as shown in fig. 3 and 4.

In application, the ESD may be specifically considered as a circuit inside the video output module, the ESD is connected to the target screen through a VGA connection line, that is, the ESD is inside the video output module, the VGADAC output RGB video signals inside the video output module first pass through the video output resistor, then pass through the ESD, and finally are located at a VGA interface of the video output module, the target screen has a corresponding VGA interface, the two VGA interfaces are connected through a VGA connection line, and are used for the video output module to output the corresponding RGB video signals to the target screen, a specific connection diagram is shown in fig. 4, and fig. 4 shows a schematic connection structure diagram of one path of the video output module and the target screen. The specific numeric meaning of each pin of the VGA interface is specifically shown in fig. 5, and the pin has detailed comments and functional description thereon, which are not described in detail. In fig. 3, the RGB video signals include R video signals, G video signals, and B video signals, and correspondingly, VGADAC has an output port of R (R character on right side of VGADAC in fig. 3), an output port of G (G character on right side of VGADAC in fig. 3), and an output port of B (B character on right side of VGADAC in fig. 3) for outputting corresponding video signals, and the target screen has an access port of R (R character in target screen in fig. 3), an access port of G (G character in target screen in fig. 3), and an access port of B (B character in target screen in fig. 3) for accessing corresponding video signals.

Referring to fig. 6, fig. 6 is a flowchart illustrating a multi-screen display method according to embodiment 3 of the present application, which includes the following steps:

the first path comprises a detection unit, and the detection unit is connected with an insertion pin; s202 comprises the following steps:

s301, acquiring the level state of the inserted pin.

S302, if the level state is a high level state, it is determined that the plug-in pin is not connected with the target screen.

And S303, if the level state is a low level state, determining that the plug-in pin is connected with the target screen, and receiving a screen access signal sent by the detection unit.

In application, the detection unit may be a device of a main chip in the video output module, or may be a component connected to the main chip, and the detection unit may be in a connection relationship with the insertion pin, or the insertion pin may be a part of the detection unit, which is not limited to this.

In this embodiment, an insertion pin connection detection unit is defined, the detection unit is a part of a main chip in the video output module, and in addition, VGADAC is also a part of the main chip in the video output module.

In application, the detection unit in the first path is arranged on a main chip in the video output module. Specifically, the VGA interface of the video output module is connected to the VGA interface of the target screen end through a VGA connection line, as shown in fig. 4, and referring to fig. 5, the VGA interface of the video output module has 15 pins in total, and the pin definitions are shown in the table in fig. 5. Referring to fig. 7, the pins specifically referred to in this embodiment are 1(R), 2(G), 3(B), 6(RGND), 7(GGND), and 8(BGND), one end of 6(RGND) in the VGA interface of the video output module is connected to an idle IO port (not shown in the figure) of the detection unit in the main chip, and 7(GGND) and 8(BGND) in the VGA interface of the video output module are grounded. Referring to fig. 4, a pull-up resistor R1 is added to the other end of RGND in the VGA interface of the video output module to a high level VCC, and the RGND can be connected to RGND in the target screen through an insertion pin (pin 6 on the right side of the VGA connection line in fig. 4), and the RGND in the target screen is always connected to ground. In other embodiments, any two of RGND, GGND and BGND are grounded, and the other is connected to the plug-in pin, which is not limited. When the external target screen is not connected, the plug-in pin is at a high level, when the external target screen is connected, because the RGND at the target screen end is connected to the ground, the plug-in pin can be pulled to a low level, the detection unit in the main chip detects that the plug-in pin is at the low level, namely, the plug-in pin is judged to be connected with the target screen, a screen access signal is sent to the main chip, and the current output capability of the VGADAC is adjusted, so that the current amplitude at the target screen end can accord with the VGA protocol standard.

In this embodiment, the connection circuit with the added simple plug-in pins is connected with the IO port inside the video output module, so as to detect the number of the connected target screens, adjust the reference current in time, and meet the requirement of displaying the video output on a plurality of screens.

Referring to fig. 8, fig. 8 is a further flowchart of a multi-screen display method according to embodiment 4 of the present application, which includes the following steps: step S102 includes:

s401, acquiring a video output resistor built in the video output module.

S402, acquiring a screen matching resistor built in the target screen; the video output resistor is connected with the screen matching resistor in parallel.

S403, calculating a first final resistance value according to the video output resistor and the screen matching resistor; and the first final resistance value is the resistance value of the path resistor.

In application, referring to fig. 9, the video output module is a current-mode video output module, and one end of the video output resistor R2 inside the video output module is connected to the B video output signal of VGADAC, and the other end is also connected to ground. Similarly, the screen matching resistor R3 has one end connected to the B video input signal (not shown) of the target screen and the other end connected to ground, and the B video signal output interface of VGADAC is connected to the B video signal input interface of the target screen, i.e. the video output resistor R2 is connected to the screen matching resistor R3 in parallel, the ground is not shown in fig. 3 and 4, and refer to fig. 9 specifically, and the screen output resistor R2 is shown outside the video output module for convenience of explanation.

In other embodiments, if the video output module is a voltage-type video output module, one end of the video output resistor R2 inside the video output module is connected to the video signal output interface B in the video output module, and the other end is directly connected to the screen matching resistor R3, so that the video output resistor R2 is connected to the screen matching resistor R3 in series, which can be referred to fig. 10. Different connection modes and resistance calculation methods are adopted for different video output modules, and the resistance values of the screen matching resistor and the video output resistor can be the same or different, and are not limited. The video output resistor and the screen matching resistor in the parallel state are calculated according to a parallel resistor calculation formula and are preset in a main chip in the video output module.

In this embodiment, the reference current of the VGADAC is calculated and adjusted according to the VGA protocol standard by calculating the first final resistance value of the video output resistor and the screen matching resistor, so that the reference current obtained by the target screen conforms to the VGA protocol standard, and the picture display effect is normal.

In one embodiment, the target screens have N, where N is a positive integer greater than 1, and the screen matching resistors in the N target screens are connected in parallel, and the step S402 includes:

and acquiring all built-in screen matching resistors of the target screen.

In the application, the number of the target screens may be one or multiple, the multiple target screens are connected with the video output module through different paths, the connection modes include, but are not limited to, transmitting RGB video signals by means of a baseband, transmitting RGB video signals by means of a frequency band, directly transmitting RGB analog signals by means of a VGA connection line, transmitting video signals by means of a carrier, and the like.

In application, the screen matching resistors of the target screens of different paths are connected in parallel. Specifically, as shown in fig. 3, the second path is formed by a VGADAC port of the video output module, and after outputting one path of RGB video signal, the RGB video signal also passes through a matching load, the corresponding matching load is a video output resistor in the video output module, the RGB video signal is directly divided into multiple paths of RGB video signals in a physical layer after being connected to the matching load, each path of RGB video signal is correspondingly connected to one target screen, the video output module obtains the screen matching resistor of each target screen, and calculates the second final resistance value of all the target screens according to a parallel resistor calculation formula.

In this embodiment, the RGB video signals may be divided into multiple paths of RGB video signals by a passive splitting method, which is different from an active splitting method, in which the master control video output module is not directly connected to a target screen, but is first output to an active driving unit, and then connected to multiple target screens through the active driving unit to play the same source RGB video signals.

In one embodiment, one of the target screens is connected to one of the plug-in pins; the step of calculating the second final resistance values of all the screen matching resistors in the parallel state includes:

and acquiring the level states of all the inserting pins at preset time intervals.

The target screen is connected with the inserting pin without adding an additional connecting device. The preset time includes, but is not limited to, a preset time preset by the video output module, and a preset time input by a user, and if the preset time is 1S, the level state of each inserted pin is queried every 1S, which is not limited herein.

when the level state is a low level state, the detection unit can judge that the plug-in pin is connected with the target screen, the detection unit can send a screen access signal to a main chip in the video output module, the video output module judges that a target screen is accessed, the number of the received screen access signals is counted, and then the number of the accessed target screens can be known.

Specifically, the resistance value of the screen matching resistor of each target screen may be consistent or inconsistent, and the resistance value of the screen matching resistor is preset in the video output module.

In other applications, the second final resistance value may also be obtained according to other manners, and if the resistance values of the video output resistors of multiple target screens are different, the unique identification number of the target screen is obtained, each unique identification number corresponds to one target screen, the screen matching resistance value associated with each unique identification number is obtained, and the second final resistance value is calculated according to all the obtained screen matching resistance values.

In this embodiment, the resistance values of all the target screens are consistent, so that the second final resistance value can be calculated by detecting the number of the target screens, and the detection device is simple and has certain cost advantage.

In one embodiment, step S103 includes:

In application, the video transmission standard protocol is that the video output module outputs a certain current, and a certain voltage value is finally formed on R, G, B three-path signals at the end of the target screen through the impedance of the self device and the target screen, wherein the voltage value needs to meet 0mV-700mV, and the corresponding RGB voltage signals can ensure that the bright color of the picture meets the requirements.

In specific application, the screen matching resistor and the video output resistor have the same resistance value, and the resistance values are both 75 omega. Specifically, assume that the video output resistor at the output terminal of VGADAC is Rout75 ohms, the screen matching resistor of screen 1 is Rin1, the screen matching resistor built in screen 2 is Rin2, and the screen matching resistor of screen N is Rin. When one screen is connected, the reference current of VGADAC (taking a current-mode DAC as an example) is I1(mA), when two screens are connected, the reference current is I2(mA), and when N screens are connected, the reference current is IN, and when the screen outputs white, the maximum value of the drive current output by VGADAC is equal to the reference current value, and then the constraint conditions to be satisfied are as follows:

I1*(Rout//Rin1)＝700mV；

I2*(Rout//Rin1//Rin2)＝700mV；

……；

IN*(Rout//Rin1//Rin2//…//RinN)＝700mV；

wherein, Rout// Rin1 represents the video output resistor in parallel with the screen matching resistor.

In one embodiment, the VGADAC includes a driving current, and the magnitude of the driving current is adjusted when the path resistance changes to cause a change in the reference current. Specifically, assume that the VGA DAC is N bits, and its binary code word is D_ND_N-1…D₂D, then there are:

VGADAC output drive current ═ reference current × [ (D)_N*2^N-1+D_N-1*2^N-2+…+D1)/2^N]；

When VGADAC carries out the output, binary code word valid bit is all 1, for satisfying VGA protocol standard, then has:

700 mV-drive current R-reference current (2)^N-1+2^N-2+…+2+1)/2^N*R；

Then 700mV ≈ reference current ≈ R with multi-bit VGADAC;

it is considered that the reference current of VGADAC is adjusted according to the path resistance R, and the driving current of VGADAC output is changed after the reference current is changed.

In this embodiment, the driving capability of the video output module is adjusted, and the reference current at the current resistance value is calculated according to the path resistance from the video output module to the target screen, and the corresponding driving current is output, so as to meet the requirement of displaying the video output on multiple screens. Compared with an active driving shunt way, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, the corresponding reference current is obtained by depending on the resistance value of the obtaining circuit, and the cost advantage is very obvious.

As shown in fig. 11, the present embodiment provides a multi-screen display apparatus 100, comprising:

a first transmission module 10, configured to transmit a video signal to a target screen;

a first obtaining module 20, configured to obtain a path resistance between the video signal from the video output module to the target screen;

a second obtaining module 30, configured to adjust the reference current according to the resistance value of the path resistor;

and the output module 40 is used for outputting the corresponding driving current to the target screen.

In one embodiment, the multi-screen display apparatus 100 further includes:

the establishing module is used for establishing an output path with a target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single incidence relation;

the third acquisition module is used for acquiring the screen access signal transmitted by the first path; wherein the screen access signal is used for determining that the target screen has accessed the video output module;

and the second transmission module is used for transmitting the video signal to a target screen through the second path.

In one embodiment, the first path includes a detection unit, the detection unit is connected with an insertion pin; the third obtaining module is further configured to:

acquiring the level state of the inserted pin;

In an embodiment, the first obtaining module 20 is further configured to:

acquiring a video output resistor built in the video output module;

In one embodiment, the target screens have N, where N is a positive integer greater than 1, and the screen matching resistors in the N target screens are connected in parallel with each other; the first obtaining module 20 is further configured to:

acquiring all built-in screen matching resistors of the target screen;

In one embodiment, one of the target screens is connected to one of the plug-in pins; the first obtaining module 20 is further configured to:

acquiring the level states of all the inserted pins at preset time intervals;

In an embodiment, the second obtaining module 30 is further configured to:

An embodiment of the present application provides a terminal device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the multi-screen display method according to any one of the above first aspects when executing the computer program.

Fig. 12 is a schematic diagram of a terminal device 80 according to an embodiment of the present application. As shown in fig. 12, the terminal device 80 of this embodiment includes: a processor 803, a memory 801 and a computer program 802 stored in the memory 801 and executable on the processor 803. The processor 803 implements the steps in the various method embodiments described above, such as the steps S101 to S103 shown in fig. 1, when executing the computer program 802. Alternatively, the processor 803 realizes the functions of the modules/units in the above-described device embodiments when executing the computer program 802.

An embodiment of the present application provides a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the multi-screen display method according to any one of the first aspect is implemented.

An embodiment of the present application provides a computer program product, which, when running on a terminal device, enables the terminal device to execute the multi-screen image display method according to any one of the above-mentioned first aspects.

Illustratively, the computer program 802 may be partitioned into one or more modules/units that are stored in the memory 801 and executed by the processor 803 to accomplish the present application. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 802 in the terminal device 80. For example, the computer program 802 may be divided into a first transmission module, a first acquisition module, a second acquisition module, and an output module, and each module has the following specific functions:

the first acquisition module is used for acquiring the path resistance of the video signal from the video output module to the target screen;

The terminal device 80 may be a desktop computer, a notebook, a palm computer, a cloud server, or other computing devices. The terminal device may include, but is not limited to, a processor 803 and a memory 801. Those skilled in the art will appreciate that fig. 12 is merely an example of a terminal device 80 and does not constitute a limitation of terminal device 80 and may include more or fewer components than shown, or some components may be combined, or different components, e.g., the terminal device may also include input-output devices, network access devices, buses, etc.

The Processor 803 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The storage 801 may be an internal storage unit of the terminal device 80, such as a hard disk or a memory of the terminal device 80. The memory 801 may also be an external storage device of the terminal device 80, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, provided on the terminal device 80. In one embodiment, the memory 801 may also include both internal and external memory units of the terminal device 80. The memory 801 is used to store the computer programs and other programs and data required by the terminal device. The memory 801 may also be used to temporarily store data that has been output or is to be output.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus/communication terminal and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/communication terminal are merely illustrative, and for example, the division of the modules or units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated modules/units, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow in the method of the embodiments described above can be realized by a computer program, which can be stored in a computer-readable storage medium and can realize the steps of the embodiments of the methods described above when the computer program is executed by a processor. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims

1. A multi-screen image display method is applied to a video output module, and comprises the following steps:

transmitting the video signal to a target screen;

and outputting the corresponding driving current to the target screen.

2. A multi-screen display method as recited in claim 1, wherein prior to the step of transmitting the video signal to the target screen, comprising:

and transmitting the video signal to a target screen through the second path.

3. A multi-screen display method as recited in claim 2, wherein the first path includes a detection cell, the detection cell being coupled to an insertion pin;

acquiring the level state of the inserted pin;

4. A multi-screen display method as recited in claim 1, wherein the obtaining a path resistance between the video signal from the video output module to the target screen comprises:

acquiring a video output resistor built in the video output module;

5. A multi-screen display method as recited in claim 4, wherein the target screen has N, where N is a positive integer greater than 1, and the screen matching resistors in the N target screens are connected in parallel with each other;

acquiring all built-in screen matching resistors of the target screen;

6. A multi-screen display method as recited in claim 5, wherein one of the target screens is coupled to an insert pin;

acquiring the level states of all the inserted pins at preset time intervals;

7. A multi-screen display method as recited in claim 1, wherein the step of adjusting the reference current according to the resistance of the path resistor comprises:

8. A multi-screen display apparatus, comprising:

9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the method according to any of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1 to 7.