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CN110676287A - Monolithic integrated radio frequency device, preparation method and integrated circuit system - Google Patents

Monolithic integrated radio frequency device, preparation method and integrated circuit system Download PDF

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CN110676287A
CN110676287A CN201910796290.8A CN201910796290A CN110676287A CN 110676287 A CN110676287 A CN 110676287A CN 201910796290 A CN201910796290 A CN 201910796290A CN 110676287 A CN110676287 A CN 110676287A
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electrode
layer
radio frequency
substrate
electronic device
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李国强
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Guangzhou Everbright Technology Co., Ltd
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Heyuan Zhongtuo Photoelectric Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N39/00Integrated devices, or assemblies of multiple devices, comprising at least one piezoelectric, electrostrictive or magnetostrictive element covered by groups H10N30/00 – H10N35/00
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders or supports
    • H03H9/0538Constructional combinations of supports or holders with electromechanical or other electronic elements
    • H03H9/0547Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a vertical arrangement
    • H03H9/0561Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a vertical arrangement consisting of a multilayered structure
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/171Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
    • H03H9/172Means for mounting on a substrate, i.e. means constituting the material interface confining the waves to a volume
    • H03H9/173Air-gaps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/07Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/071Mounting of piezoelectric or electrostrictive parts together with semiconductor elements, or other circuit elements, on a common substrate

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  • Acoustics & Sound (AREA)
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Abstract

本发明提供一种单片集成的射频器件、制备方法以及集成电路系统,制备方法包括:在第一基板上生成外延层;将外延层加工为至少一个电子器件,并在电子器件远离第一基层的一侧形成具有至少一个通孔的钝化层;在第二基板上依次形成压电薄膜、金属电极以及布拉格反射层,并形成贯穿布拉格反射层的电极互连孔;将布拉格反射层与钝化层键合连接,去除第二基板,在压电薄膜上形成顶电极以及电极接触点,顶电极与电极接触点通过电极互连孔与电子器件连接。本发明能够将射频前端模块上不同类型的多个电子器件集成在同一个芯片中,避免了需要额外设计线路的问题,减少了电气连接损失,降低了装配复杂性,减少了射频前端模块的尺寸和成本。

Figure 201910796290

The invention provides a monolithic integrated radio frequency device, a preparation method and an integrated circuit system. The preparation method includes: generating an epitaxial layer on a first substrate; processing the epitaxial layer into at least one electronic device, and placing the electronic device away from the first base layer A passivation layer with at least one through hole is formed on one side of the substrate; a piezoelectric film, a metal electrode and a Bragg reflection layer are formed in sequence on the second substrate, and an electrode interconnection hole passing through the Bragg reflection layer is formed; the Bragg reflection layer and the passivation layer are formed. The chemical layer is bonded and connected, the second substrate is removed, and a top electrode and an electrode contact point are formed on the piezoelectric film, and the top electrode and the electrode contact point are connected to the electronic device through the electrode interconnection hole. The invention can integrate multiple electronic devices of different types on the radio frequency front-end module into the same chip, avoids the problem of requiring additional circuit design, reduces electrical connection loss, reduces assembly complexity, and reduces the size of the radio frequency front-end module and cost.

Figure 201910796290

Description

单片集成射频器件、制备方法以及集成电路系统Monolithic integrated radio frequency device, preparation method and integrated circuit system

技术领域technical field

本发明涉及电子通讯装置技术领域,尤其涉及一种单片集成的射频器件、制备方法以及集成电路系统。The present invention relates to the technical field of electronic communication devices, in particular to a monolithic integrated radio frequency device, a preparation method and an integrated circuit system.

背景技术Background technique

无线通信终端已在全球成功广泛部署。全球每年会生产包括手机和智能手机在内的无线通信终端设备超过10亿台,而且数量还在逐年增加。随着4G/LTE 的应用普及,以及移动数据流量的激增,大数据时代也正在推动无线通信手机市场的增长,预计未来几年将达到每年20亿台。因此,为了应对这个巨大的市场和用户不断提高的要求,无线通讯终端的功能也变得越来越多功能化。Wireless communication terminals have been successfully and widely deployed around the world. The world produces more than 1 billion wireless communication terminal equipment including mobile phones and smart phones every year, and the number is increasing year by year. With the popularity of 4G/LTE applications and the surge in mobile data traffic, the era of big data is also driving the growth of the wireless communication mobile phone market, which is expected to reach 2 billion units per year in the next few years. Therefore, in order to respond to this huge market and the ever-increasing demands of users, the functions of wireless communication terminals have become more and more multifunctional.

相应的,无线通讯终端的多功能化发展对无线通讯终端的射频前端模块提出了微型化、高频率、高性能、低功耗、低成本等高技术要求。Correspondingly, the multi-functional development of wireless communication terminals puts forward high technical requirements such as miniaturization, high frequency, high performance, low power consumption, and low cost for the radio frequency front-end modules of wireless communication terminals.

为了满足这些技术要求,现有的射频前端模块采取的方式是将多个分立的芯片组装在单个层压板或PC板上,但是这种方式具有的缺点是需要额外设计线路以将不同芯片互联在一起,而通过线路连接不同的芯片会导致电气连接损失以及增加装配复杂性、增加了射频前端模块的尺寸和成本。In order to meet these technical requirements, the existing RF front-end module adopts the method of assembling multiple discrete chips on a single laminate or PC board, but this method has the disadvantage of requiring additional design of circuits to interconnect different chips on the Together, wiring different chips through wires results in electrical connection losses as well as increased assembly complexity, size and cost of RF front-end modules.

发明内容SUMMARY OF THE INVENTION

为了克服现有技术的不足,本发明提出一种单片集成的射频器件、制备方法以及集成电路,能够将射频前端模块上不同类型的多个电子器件集成在同一个芯片中,避免了需要额外设计线路的问题,减少了电气连接损失,降低了装配复杂性,减少了射频前端模块的尺寸和成本。In order to overcome the deficiencies of the prior art, the present invention proposes a monolithic integrated radio frequency device, a preparation method and an integrated circuit, which can integrate multiple electronic devices of different types on the radio frequency front-end module into the same chip, avoiding the need for additional Design wiring issues, reduce electrical connection losses, reduce assembly complexity, and reduce the size and cost of RF front-end modules.

为解决上述问题,本发明采用的一个技术方案为:一种单片集成的射频器件制备方法,所述射频器件用于射频前端模块,所述制备方法包括:S1:在第一基板上生成外延层,所述外延层包括依次叠置的第一缓冲层、第二单晶层以及第三单晶层;S2:将所述外延层加工为至少一个电子器件,并在所述电子器件远离所述第一基层的一侧形成具有至少一个通孔的钝化层,所述电子器件包括功率放大器、噪声放大器以及开关中的至少一种;S3:在第二基板上依次形成压电薄膜、金属电极以及布拉格反射层,并形成贯穿所述布拉格反射层的电极互连孔;S4:将所述布拉格反射层与所述钝化层键合连接,使所述电极互连孔和所述通孔电连接,并去除第二基板,在所述压电薄膜远离所述金属电极的一侧依次形成顶电极以及电极接触点,所述顶电极与所述电极接触点通过所述电极互连孔与所述电子器件连接。In order to solve the above problem, a technical solution adopted in the present invention is: a method for preparing a monolithic integrated radio frequency device, the radio frequency device is used for a radio frequency front-end module, and the preparation method includes: S1: generating an epitaxy on a first substrate layer, the epitaxial layer includes a first buffer layer, a second single crystal layer and a third single crystal layer stacked in sequence; S2: Process the epitaxial layer into at least one electronic device, and place the electronic device away from all the electronic devices. A passivation layer with at least one through hole is formed on one side of the first base layer, and the electronic device includes at least one of a power amplifier, a noise amplifier and a switch; S3: sequentially forming a piezoelectric film, a metal electrodes and a Bragg reflection layer, and forming electrode interconnection holes through the Bragg reflection layer; S4: bonding the Bragg reflection layer and the passivation layer to connect the electrode interconnection holes and the through holes Electrically connected, and the second substrate is removed, and a top electrode and an electrode contact point are sequentially formed on the side of the piezoelectric film away from the metal electrode, and the top electrode and the electrode contact point are connected to each other through the electrode interconnection hole. The electronics are connected.

进一步地,所述通孔的数量为三个,且所述通孔分别与所述电子器件的源极、漏极、栅极连接。Further, the number of the through holes is three, and the through holes are respectively connected with the source electrode, the drain electrode and the gate electrode of the electronic device.

进一步地,所述电极互连孔的数量为三个,每个电极互连孔贯穿的对象不完全相同,并分别不同所述通孔相对并电连接。Further, the number of the electrode interconnection holes is three, the objects penetrated by each electrode interconnection hole are not completely the same, and the through holes are opposite and electrically connected to each other.

进一步地,所述顶电极部分覆盖所述压电薄膜远离所述金属电极一侧,通过其中一个所述电极互连孔与所述栅极连接。Further, the top electrode partially covers the side of the piezoelectric film away from the metal electrode, and is connected to the gate through one of the electrode interconnection holes.

进一步地,所述电极接触点设置于所述压电薄膜远离所述金属电极一侧未设置所述顶电极的区域,包括第一电极接触点、第二电极接触点、第三电极接触点,其中,第一电极接触点、所述第三电极接触点通过所述电极互连孔分别与栅极、漏极连接,所述第二电极接触点与所述顶电极连接。Further, the electrode contact point is disposed in the area where the top electrode is not disposed on the side of the piezoelectric film away from the metal electrode, including a first electrode contact point, a second electrode contact point, and a third electrode contact point, The first electrode contact point and the third electrode contact point are respectively connected to the gate electrode and the drain electrode through the electrode interconnection hole, and the second electrode contact point is connected to the top electrode.

进一步地,所述金属电极部分覆盖所述压电薄膜,所述布拉格反射层覆盖所述金属电极以及所属压电薄膜设置金属电极一侧未被所述金属电极覆盖的部分。Further, the metal electrode partially covers the piezoelectric film, the Bragg reflection layer covers the metal electrode and the part of the piezoelectric film on the side where the metal electrode is not covered by the metal electrode.

进一步地,所述布拉格反射层包括交替叠置的第一材料层、第二材料层,所述第一材料层与所述第二材料层的数量相同均为至少两层,且第一材料层与第二材料层的声阻抗不同。Further, the Bragg reflection layer includes alternately stacked first material layers and second material layers, the number of the first material layers and the second material layers are equal to at least two layers, and the first material layers are at least two layers. Different from the acoustic impedance of the second material layer.

进一步地,所述布拉格反射层远离所述压电薄膜层的一侧还设置有第一钝化层,所述第一钝化层设置于所述布拉格反射层的凹陷区域,通过所述第一钝化层平整所述布拉格反射层。Further, a first passivation layer is further provided on the side of the Bragg reflection layer away from the piezoelectric thin film layer, and the first passivation layer is arranged in the concave area of the Bragg reflection layer. The passivation layer flattens the Bragg reflection layer.

基于相同的发明构思,本发明还提出一种单片集成的射频器件,其中,所述射频器件通过如上所述的单片集成的射频器件制备方法得到。Based on the same inventive concept, the present invention also proposes a monolithically integrated radio frequency device, wherein the radio frequency device is obtained by the above-mentioned preparation method of a monolithically integrated radio frequency device.

基于相同的发明构思,本发明又提出一种集成电路系统,所述集成电路系统包括放大器、双工器、滤波器以及收发开关,所述双工器、滤波器与所述放大器、收发开关耦合连接,所述放大器包括功率放大器、低噪声放大器中的至少一个,所述放大器、双工器、滤波器以及收发开关中的至少两个设置在如上所述的单片集成的射频器件中。Based on the same inventive concept, the present invention further proposes an integrated circuit system, the integrated circuit system includes an amplifier, a duplexer, a filter, and a transceiver switch, and the duplexer and filter are coupled to the amplifier and the transceiver switch. connected, the amplifier includes at least one of a power amplifier and a low noise amplifier, and at least two of the amplifier, a duplexer, a filter and a transceiver switch are provided in the monolithically integrated radio frequency device as described above.

相比现有技术,本发明的有益效果在于:本发明在第一基板上制备功率放大器、噪声放大器以及开关等电子器件,在第二基板上制备相应的滤波器,并将第二基板倒装键合在第一基板上,并将第一基板上的电子器件与第二基板上的滤波器键合连接,能够将射频前端模块上不同类型的多个电子器件集成在同一个芯片中,避免了需要额外设计线路的问题,减少了电气连接损失,降低了装配复杂性,减少了射频前端模块的尺寸和成本。Compared with the prior art, the beneficial effects of the present invention are: the present invention prepares electronic devices such as power amplifiers, noise amplifiers and switches on the first substrate, prepares corresponding filters on the second substrate, and flips the second substrate It is bonded on the first substrate, and the electronic device on the first substrate is bonded and connected with the filter on the second substrate, which can integrate multiple electronic devices of different types on the RF front-end module into the same chip, avoiding It eliminates the problem of requiring additional design lines, reduces electrical connection losses, reduces assembly complexity, and reduces the size and cost of RF front-end modules.

附图说明Description of drawings

图1为本发明单片集成的射频器件制备方法一实施例的流程图;1 is a flowchart of an embodiment of a method for manufacturing a monolithically integrated radio frequency device of the present invention;

图2a为本发明单片集成的射频器件制备方法中单片集成的射频器件一实施例的剖面图;2a is a cross-sectional view of an embodiment of a monolithically integrated radio frequency device in a method for preparing a monolithically integrated radio frequency device of the present invention;

图2b本发明单片集成的射频器件制备方法中单片集成的射频器件一实施例的俯视图;2b is a top view of an embodiment of a monolithically integrated radio frequency device in the method for preparing a monolithically integrated radio frequency device of the present invention;

图3为本发明单片集成的射频器件制备方法中在第一基板上生成外延层一实施例的结构图;3 is a structural diagram of an embodiment of generating an epitaxial layer on a first substrate in a method for manufacturing a monolithically integrated radio frequency device according to the present invention;

图4为本发明单片集成的射频器件制备方法中对外延层加工形成的电子器件一实施例的结构图;4 is a structural diagram of an embodiment of an electronic device formed by epitaxial layer processing in the method for preparing a monolithically integrated radio frequency device according to the present invention;

图5为本发明单片集成的射频器件制备方法中在电子器件上形成钝化层一实施例的结构图;5 is a structural diagram of an embodiment of forming a passivation layer on an electronic device in a method for preparing a monolithically integrated radio frequency device of the present invention;

图6为本发明单片集成的射频器件制备方法中在钝化层上形成通孔一实施例的结构图;6 is a structural diagram of an embodiment of forming a through hole on a passivation layer in a method for preparing a monolithically integrated radio frequency device according to the present invention;

图7为本发明单片集成的射频器件制备方法中在第二基板上形成压电薄膜一实施例的结构图;7 is a structural diagram of an embodiment of forming a piezoelectric thin film on a second substrate in a method for manufacturing a monolithically integrated radio frequency device according to the present invention;

图8为本发明单片集成的射频器件制备方法中在压电薄膜上形成金属电极一实施例的结构图;8 is a structural diagram of an embodiment of forming a metal electrode on a piezoelectric film in a method for preparing a monolithically integrated radio frequency device according to the present invention;

图9为本发明单片集成的射频器件制备方法中形成电极互连孔一实施例的结构图;9 is a structural diagram of an embodiment of forming electrode interconnection holes in a method for manufacturing a monolithically integrated radio frequency device according to the present invention;

图10为本发明单片集成的射频器件制备方法中将布拉格反射层与钝化层键合一实施例的结构图;10 is a structural diagram of an embodiment of bonding a Bragg reflection layer and a passivation layer in a method for preparing a monolithically integrated radio frequency device of the present invention;

图11为本发明单片集成的射频器件制备方法中去除第二基板一实施例的结构图;11 is a structural diagram of an embodiment of removing the second substrate in the method for manufacturing a monolithically integrated radio frequency device according to the present invention;

图12为本发明单片集成的射频器件制备方法中形成顶电极一实施例的结构图;12 is a structural diagram of an embodiment of forming a top electrode in a method for manufacturing a monolithically integrated radio frequency device according to the present invention;

图13为本发明单片集成的射频器件制备方法中形成电极接触点一实施例的结构图;13 is a structural diagram of an embodiment of forming an electrode contact point in a method for manufacturing a monolithically integrated radio frequency device of the present invention;

图14为本发明单片集成的射频器件制备方法中形成的射频器件一实施例的结构图;14 is a structural diagram of an embodiment of a radio frequency device formed in a method for manufacturing a monolithically integrated radio frequency device of the present invention;

图15为本发明集成电路系统一实施例的结构图。FIG. 15 is a structural diagram of an embodiment of an integrated circuit system of the present invention.

图中:120、电子器件;110、滤波器;119、电极接触点;135、顶电极;112、压电薄膜;113、金属电极;114、第一材料层;116、第二材料层;115、第一电极互连孔;117、第二电极互连孔;118、第一钝化层;129、钝化层;124、第三单晶层;123、第二单晶层;122、第一缓冲层;130、通孔;121、第一基板; 111、第二基板;128、第一芯片切割道;131、第一金属层;125、源极;126、栅极;127、漏极;140、第二芯片切割道;141、LNA;142、PA;143、双工器、滤波器;144、TX/RX开关。In the figure: 120, electronic device; 110, filter; 119, electrode contact point; 135, top electrode; 112, piezoelectric film; 113, metal electrode; 114, first material layer; 116, second material layer; 115 117, the second electrode interconnection hole; 118, the first passivation layer; 129, the passivation layer; 124, the third single crystal layer; 123, the second single crystal layer; 122, the first a buffer layer; 130, a through hole; 121, a first substrate; 111, a second substrate; 128, a first chip dicing line; 131, a first metal layer; 125, a source electrode; 126, a gate electrode; 127, a drain electrode ; 140, the second chip cutting line; 141, LNA; 142, PA; 143, duplexer, filter; 144, TX/RX switch.

具体实施方式Detailed ways

下面,结合附图以及具体实施方式,对本发明做进一步描述,需要说明的是,在不相冲突的前提下,以下描述的各实施例之间或各技术特征之间可以任意组合形成新的实施例。The present invention will be further described below with reference to the accompanying drawings and specific embodiments. It should be noted that, on the premise of no conflict, the embodiments or technical features described below can be combined arbitrarily to form new embodiments. .

请参阅图1-14,其中,图1为本发明单片集成的射频器件制备方法一实施例的流程图;图2a为本发明单片集成的射频器件制备方法中单片集成的射频器件一实施例的剖面图;图2b本发明单片集成的射频器件制备方法中单片集成的射频器件一实施例的俯视图;图3为本发明单片集成的射频器件制备方法中在第一基板上生成外延层一实施例的结构图;图4为本发明单片集成的射频器件制备方法中对外延层加工形成的电子器件一实施例的结构图;图5为本发明单片集成的射频器件制备方法中在电子器件上形成钝化层一实施例的结构图;图6 为本发明单片集成的射频器件制备方法中在钝化层上形成通孔一实施例的结构图;图7为本发明单片集成的射频器件制备方法中在第二基板上形成压电薄膜一实施例的结构图;图8为本发明单片集成的射频器件制备方法中在压电薄膜上形成金属电极一实施例的结构图;图9为本发明单片集成的射频器件制备方法中形成电极互连孔一实施例的结构图;图10为本发明单片集成的射频器件制备方法中将布拉格反射层与钝化层键合一实施例的结构图;图11为本发明单片集成的射频器件制备方法中去除第二基板一实施例的结构图;图12为本发明单片集成的射频器件制备方法中形成顶电极一实施例的结构图;图13为本发明单片集成的射频器件制备方法中形成电极接触点一实施例的结构图;图14为本发明单片集成的射频器件制备方法中形成的射频器件一实施例的结构图。Please refer to FIGS. 1-14 , wherein FIG. 1 is a flowchart of an embodiment of a method for manufacturing a monolithically integrated radio frequency device according to the present invention; FIG. 2a is a monolithic integrated radio frequency device one in the method for manufacturing a monolithically integrated radio frequency device of the present invention. A cross-sectional view of an embodiment; Figure 2b is a top view of an embodiment of a monolithically integrated radio frequency device in a method for preparing a monolithically integrated radio frequency device of the present invention; Figure 3 is a first substrate in the method for preparing a monolithically integrated radio frequency device of the present invention A structural diagram of an embodiment of generating an epitaxial layer; FIG. 4 is a structural diagram of an embodiment of an electronic device formed by processing an epitaxial layer in a method for preparing a monolithically integrated radio frequency device of the present invention; FIG. 5 is a monolithic integrated radio frequency device of the present invention. A structural diagram of an embodiment of forming a passivation layer on an electronic device in the preparation method; FIG. 6 is a structural diagram of an embodiment of forming a through hole on the passivation layer in the preparation method of a monolithic integrated radio frequency device of the present invention; FIG. 7 is a A structural diagram of an embodiment of forming a piezoelectric thin film on the second substrate in the method for preparing a monolithically integrated radio frequency device of the present invention; FIG. 8 is a diagram illustrating the formation of a metal electrode on the piezoelectric thin film in the method for preparing a monolithic integrated radio frequency device of the present invention. A structural diagram of an embodiment; FIG. 9 is a structural diagram of an embodiment of forming electrode interconnection holes in a method for preparing a monolithically integrated radio frequency device of the present invention; FIG. A structural diagram of an embodiment of bonding with a passivation layer; FIG. 11 is a structural diagram of an embodiment of removing the second substrate in the method for preparing a monolithically integrated radio frequency device of the present invention; FIG. 12 is a monolithic integrated radio frequency device preparation of the present invention. A structural diagram of an embodiment of forming a top electrode in the method; FIG. 13 is a structural diagram of an embodiment of forming an electrode contact point in a monolithic integrated radio frequency device manufacturing method of the present invention; FIG. 14 is a monolithic integrated radio frequency device manufacturing method of the present invention. A structural diagram of an embodiment of a radio frequency device formed in .

本发明在说明书附图中为了作图简便,滤波器部分仅画出一个FBAR谐振器表示,放大器、开关等仅画了一个晶体管来表示,实际制备中可以由多个FBAR 谐振器构成滤波器,多个晶体管来构成放大器、开关等器件,都在本发明专利的保护范围之内,其中,附图中的虚线为被遮挡的结构。结合图1-14对本发明的单片集成的射频器件制备方法做详细说明。In the drawings of the present invention, for the convenience of drawing, only one FBAR resonator is drawn in the filter part, and only one transistor is drawn for the amplifier and switch. Multiple transistors to form devices such as amplifiers and switches are within the protection scope of the patent of the present invention, and the dotted lines in the accompanying drawings are structures that are blocked. The method for fabricating the monolithically integrated radio frequency device of the present invention will be described in detail with reference to FIGS. 1-14 .

在本实施例中,用于射频前端模块的电子器件120的单片集成包括至少一个滤波器110、至少一个电子器件120。电子器件120包括功率放大器、噪声放大器以及开关中的至少一种。滤波器110包括压电薄膜112、金属电极113、布拉格反射层、顶电极135以及电极接触点119。电极接触点119、顶电极135设置在滤波器110的一侧。电子器件120与滤波器110未设置顶电极135的一侧键合连接。金属电极113设置在压电薄膜112靠近电子器件120的一侧,布拉格反射层设置在金属电极113远离压电薄膜112的一侧。在压电薄膜112上设置有贯穿布拉格反射层的电极互连孔。滤波器110与电子器件120通过电极互连孔电连接连接。电子器件120包括按远离滤波器110的方向依次叠置的第三单晶层124、第二单晶层123、第一缓冲层122,第三单晶层124远离第二单晶层 123的一侧设置有钝化层129,钝化层129与布拉格反射层键合连接,钝化层129 上设置有至少一个电连接滤波器110与电子器件120的通孔130,电子器件120 通过对第三单晶层124、第二单晶层123、第一缓冲层122的加工形成。In this embodiment, the monolithic integration of the electronic device 120 for the RF front-end module includes at least one filter 110 and at least one electronic device 120 . The electronic device 120 includes at least one of a power amplifier, a noise amplifier, and a switch. The filter 110 includes a piezoelectric film 112 , a metal electrode 113 , a Bragg reflector, a top electrode 135 , and an electrode contact point 119 . The electrode contact point 119 and the top electrode 135 are arranged on one side of the filter 110 . The electronic device 120 is bonded to the side of the filter 110 where the top electrode 135 is not provided. The metal electrode 113 is arranged on the side of the piezoelectric film 112 close to the electronic device 120 , and the Bragg reflection layer is arranged on the side of the metal electrode 113 away from the piezoelectric film 112 . Electrode interconnection holes penetrating the Bragg reflection layer are provided on the piezoelectric thin film 112 . The filter 110 and the electronic device 120 are electrically connected through electrode interconnection holes. The electronic device 120 includes a third single crystal layer 124 , a second single crystal layer 123 , and a first buffer layer 122 stacked in sequence in a direction away from the filter 110 . A passivation layer 129 is provided on the side, and the passivation layer 129 is bonded and connected to the Bragg reflection layer. The single crystal layer 124 , the second single crystal layer 123 , and the first buffer layer 122 are formed by processing.

在本实施例中,滤波器110包括单晶或多晶SMR谐振器器件、单晶或多晶滤波器器件的至少一种。In this embodiment, the filter 110 includes at least one of a single crystal or polycrystalline SMR resonator device, and a single crystal or polycrystalline filter device.

在本实施例中,电子器件120包括功率放大器、低噪声放大器、开关以及其他具有与类似结构的器件。In this embodiment, the electronic device 120 includes a power amplifier, a low noise amplifier, a switch, and other devices having similar structures.

在本实施例中,本发明单片集成的射频器件制备方法包括如下步骤:In this embodiment, the method for preparing a monolithically integrated radio frequency device of the present invention includes the following steps:

S1:在第一基板上生成外延层,外延层包括依次叠置的第一缓冲层、第二单晶层以及第三单晶层。S1: An epitaxial layer is formed on the first substrate, and the epitaxial layer includes a first buffer layer, a second single crystal layer and a third single crystal layer stacked in sequence.

在本实施例中,第一基板121作为外延层的生长衬底,该第一基板121可以为硅基板、蓝宝石基板、碳化硅基板,氮化镓基板、氮化铝基板、AlxGa1-xN 缓冲层基板中的至少一种,在其他实施例中,也可以为其他可用于作为外延层衬底的基板,在此不做限定。In this embodiment, the first substrate 121 is used as a growth substrate for the epitaxial layer, and the first substrate 121 can be a silicon substrate, a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, an aluminum nitride substrate, or an AlxGa1-xN buffer layer At least one of the substrates, in other embodiments, may also be other substrates that can be used as epitaxial layer substrates, which are not limited herein.

覆盖第一基板121的第一缓冲层122可以由氮化铝构成,其厚度根据时间、成本取最优值,不做限定,任意厚度均在本发明的保护范围内。The first buffer layer 122 covering the first substrate 121 may be made of aluminum nitride, and its thickness is optimal according to time and cost, which is not limited, and any thickness is within the protection scope of the present invention.

在本实施例中,当形成的电子器件120为单晶体结构时,第一缓冲层122 可以为单晶AlN、SiC、AlxGa1-xN以及其他单晶半导体材料所制成的超晶格缓冲结构。In this embodiment, when the formed electronic device 120 has a single crystal structure, the first buffer layer 122 may be a superlattice buffer structure made of single crystal AlN, SiC, AlxGa1-xN and other single crystal semiconductor materials.

第二单晶层123与第三单晶层124为GaN,AlN,AlxGa1-xN中的两种或三种材料组成多层单晶结构,其中,AlxGa1-xN中0<x<1,第二单晶层123的厚度与第三单晶层124的厚度均在1纳米到1500纳米之间。The second single crystal layer 123 and the third single crystal layer 124 are composed of two or three materials of GaN, AlN, and AlxGa1-xN to form a multi-layer single crystal structure, wherein 0<x<1 in AlxGa1-xN, the second The thickness of the single crystal layer 123 and the thickness of the third single crystal layer 124 are both between 1 nm and 1500 nm.

在一个具体的实施例中,第二单晶层123与第三单晶层124的厚度之和在100纳米至2000纳米之间。In a specific embodiment, the sum of the thicknesses of the second single crystal layer 123 and the third single crystal layer 124 is between 100 nanometers and 2000 nanometers.

S2:将外延层加工为至少一个电子器件,并在电子器件远离第一基层的一侧形成具有至少一个通孔的钝化层,电子器件包括功率放大器、噪声放大器以及开关中的至少一种。S2: Process the epitaxial layer into at least one electronic device, and form a passivation layer with at least one through hole on the side of the electronic device away from the first base layer, where the electronic device includes at least one of a power amplifier, a noise amplifier and a switch.

对形成外延层的第一缓冲层122、第二单晶层123以及第三单晶层124进行芯片级加工形成至少一个电子器件120。附图以加工形成的电子器件120为晶体管为例进行说明,其中,晶体管的源极125、栅极126、漏极127依次设置在第三单晶层124上。At least one electronic device 120 is formed by chip-level processing on the first buffer layer 122 , the second single crystal layer 123 and the third single crystal layer 124 forming the epitaxial layers. The drawings are described by taking the processed electronic device 120 as a transistor as an example, wherein the source electrode 125 , the gate electrode 126 , and the drain electrode 127 of the transistor are sequentially arranged on the third single crystal layer 124 .

在本实施例中,第一基板121上可以形成多个电子器件120,每个电子器件 120之间设有第一芯片切割道128,通过第一芯片切割道128分隔电子器件120。第一基板121上形成的电子器件120可单独工作,也可以多个级联组成功率放大器、低噪声放大器、开关以及其他射频前端模块所需的器件。In this embodiment, a plurality of electronic devices 120 can be formed on the first substrate 121, and a first chip dicing lane 128 is provided between each electronic device 120, and the electronic devices 120 are separated by the first chip dicing lane 128. The electronic device 120 formed on the first substrate 121 can work alone, or can be cascaded to form a power amplifier, a low-noise amplifier, a switch, and other devices required for a radio frequency front-end module.

钝化层129通过沉积的方式形成与电子器件120远离第一基板121的一侧,该钝化层129可以为AlN、GaN、SiO2等高介电常数的材料,厚度可以在2纳米到3微米之间。The passivation layer 129 is formed by deposition on the side away from the first substrate 121 from the electronic device 120. The passivation layer 129 can be made of high dielectric constant materials such as AlN, GaN, SiO2, and the thickness can be 2 nanometers to 3 micrometers. between.

钝化层129上的通孔130通过干法或湿法蚀刻形成,通孔130的孔径大小在在几十纳米到几十微米范围内,根据实际需求作调整,在此不做限定。The through holes 130 on the passivation layer 129 are formed by dry or wet etching, and the pore size of the through holes 130 is in the range of tens of nanometers to tens of micrometers, which can be adjusted according to actual needs, which is not limited herein.

在本实施例中,通孔130内设置有第一金属层131,第一金属层131通过电镀或蒸镀形成,形成第一金属层131的金属可以为金、银、铝等导电性良好的金属,通过该第一金属层131将通孔130与电子器件120电连接形成电极上引通孔。In this embodiment, the through hole 130 is provided with a first metal layer 131, the first metal layer 131 is formed by electroplating or evaporation, and the metal forming the first metal layer 131 may be gold, silver, aluminum, etc. with good conductivity Metal, through the first metal layer 131 to electrically connect the through hole 130 to the electronic device 120 to form a lead through hole on the electrode.

在一个具体的实施例中,形成的电子器件120为晶体管,通孔130的数量为3个,该晶体管的源极125、栅极126、漏极127分别与一个通孔130电连接。In a specific embodiment, the formed electronic device 120 is a transistor, the number of through holes 130 is three, and the source electrode 125 , the gate electrode 126 and the drain electrode 127 of the transistor are electrically connected to one through hole 130 respectively.

S3:在第二基板上依次形成压电薄膜、金属电极以及布拉格反射层,并形成贯穿布拉格反射层的电极互连孔。S3: forming a piezoelectric thin film, a metal electrode, and a Bragg reflection layer in sequence on the second substrate, and forming an electrode interconnection hole penetrating the Bragg reflection layer.

在本实施例中,第二基板111为硅基板、蓝宝石基板、碳化硅基板,氮化镓基板、氮化铝基板、AlxGa1-xN缓冲层基板中的至少一种,在其他实施例中,也可以为其他可用于作为压电薄膜112外延生长衬底的基板,在此不做限定。In this embodiment, the second substrate 111 is at least one of a silicon substrate, a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, an aluminum nitride substrate, and an AlxGa1-xN buffer layer substrate. It can be other substrates that can be used as substrates for epitaxial growth of the piezoelectric thin film 112 , which is not limited here.

压电薄膜112包括单晶AlN、溅射得到的多晶AlN、ZnO、PZT中的任一种,其厚度为0.01微米至10微米。The piezoelectric thin film 112 includes any one of single crystal AlN, polycrystalline AlN obtained by sputtering, ZnO, and PZT, and its thickness is 0.01 micrometers to 10 micrometers.

金属电极113通过电子束剥离法或磁控溅射法形成在压电薄膜112远离第二基板111的一侧,部分覆盖压电薄膜112,其中,金属电极113厚度在0.1纳米至500纳米之间,形成金属电极113的材料可以为钼、铝、钌、钨或钛材料及其组合。The metal electrode 113 is formed on the side of the piezoelectric film 112 away from the second substrate 111 by an electron beam lift-off method or a magnetron sputtering method, partially covering the piezoelectric film 112, wherein the thickness of the metal electrode 113 is between 0.1 nm and 500 nm , the material for forming the metal electrode 113 may be molybdenum, aluminum, ruthenium, tungsten or titanium materials and combinations thereof.

在压电薄膜112上形成金属电极113后,再在金属电极113和压电薄膜112 上形成布拉格反射层,布拉格反射层覆盖金属电极113以及压电薄膜112设置金属电极113一侧未被金属电极113覆盖的部分布拉格反射层包括交替叠置的第一材料层114、第二材料层116,第一材料层114与第二材料层116的数量相同均为至少两层,且第一材料层114与第二材料层的声阻抗116不同。其中,第一材料层114与第二材料层116之间的声阻抗差异大,二者的声阻抗具体差值可根据实际需要进行设置,在此不做限定。After the metal electrode 113 is formed on the piezoelectric film 112, a Bragg reflection layer is formed on the metal electrode 113 and the piezoelectric film 112. The Bragg reflection layer covers the metal electrode 113 and the side of the piezoelectric film 112 where the metal electrode 113 is provided is not covered by the metal electrode. The part of the Bragg reflection layer covered by 113 includes alternately stacked first material layers 114 and second material layers 116 . The number of the first material layers 114 and the second material layers 116 is the same and both are at least two layers, and the first material layers 114 Different from the acoustic impedance 116 of the second material layer. The difference in acoustic impedance between the first material layer 114 and the second material layer 116 is large, and the specific difference in acoustic impedance between the two can be set according to actual needs, which is not limited herein.

布拉格反射层远离压电薄膜112的一侧还设置有第一钝化层118,第一钝化层118设置于布拉格反射层的凹陷区域,通过第一钝化层118平整布拉格反射层远离压电薄膜112的一侧,以便于与滤波器110与电子器件120键合连接。A first passivation layer 118 is also provided on the side of the Bragg reflection layer away from the piezoelectric film 112. The first passivation layer 118 is arranged in the recessed area of the Bragg reflection layer, and the Bragg reflection layer is flattened by the first passivation layer 118 and away from the piezoelectric One side of the film 112 is used for bonding connection with the filter 110 and the electronic device 120 .

在一个具体的实施例中,电极互连孔的数量为三个,每个电极互连孔贯穿的对象不完全相同,并分别不同的通孔130相对并电连接。其中,电极互连孔包括两个第一电极互连孔115、一个第二电极互连孔117,第一电极互连孔115 与第二电极互连孔117彼此间隔设置。第二电极互连孔117贯穿布拉格反射层与金属电极113电连接,靠近第二电极互连孔117的第一电极互连孔115贯穿布拉格反射层、金属电极113、压电薄膜112,另一个第一电极互连孔115贯穿布拉格反射层、第一钝化层118以及压电薄膜112。In a specific embodiment, the number of electrode interconnection holes is three, the objects penetrating each electrode interconnection hole are not completely the same, and different through holes 130 are opposed to each other and electrically connected. The electrode interconnection holes include two first electrode interconnection holes 115 and one second electrode interconnection hole 117 , and the first electrode interconnection holes 115 and the second electrode interconnection holes 117 are spaced apart from each other. The second electrode interconnection hole 117 is electrically connected to the metal electrode 113 through the Bragg reflection layer, and the first electrode interconnection hole 115 close to the second electrode interconnection hole 117 penetrates the Bragg reflection layer, the metal electrode 113, the piezoelectric film 112, and the other The first electrode interconnection hole 115 penetrates the Bragg reflection layer, the first passivation layer 118 and the piezoelectric thin film 112 .

该第二基板111上的滤波器110可以单独工作,也可以多个级联组成任意目前应用及未应用频段的滤波器110。The filters 110 on the second substrate 111 can work alone, or multiple filters 110 can be cascaded to form filters 110 in any currently applied and unapplied frequency bands.

S4:将布拉格反射层与钝化层键合连接,使滤波器与电子器件通过电极互连孔和通孔电连接,并去除第二基板,在压电薄膜远离金属电极的一侧依次形成顶电极以及电极接触点,顶电极与电极接触点通过电极互连孔与电子器件连接。S4: Bonding and connecting the Bragg reflection layer and the passivation layer, so that the filter and the electronic device are electrically connected through the electrode interconnection holes and through holes, and the second substrate is removed, and a top is formed on the side of the piezoelectric film away from the metal electrode in turn. The electrode and the electrode contact point, the top electrode and the electrode contact point are connected with the electronic device through the electrode interconnection hole.

将钝化层129与布拉格反射层以及第一钝化层118键合连接。其中,钝化层129与布拉格反射层键合的方式可以是本领域可以用到的所有键合方式,在此不做限定。The passivation layer 129 is bonded to the Bragg reflection layer and the first passivation layer 118 . The bonding method between the passivation layer 129 and the Bragg reflection layer may be any bonding method available in the art, which is not limited herein.

在本实施例中,去除第二基板111的方式可以为激光剥离法、机械减薄结合干法蚀刻以及湿法腐蚀中的任一种。In this embodiment, the method of removing the second substrate 111 may be any one of laser lift-off method, mechanical thinning combined with dry etching and wet etching.

在本实施例中,顶电极135部分覆盖压电薄膜112远离第一基板121的一侧,制备顶电极135的方法包括电子束蒸发剥离法、磁控溅射金属电极层结合干法蚀刻以及湿法刻蚀中的任一种,顶电极135的厚度在10纳米到500纳米之间,电极接触点119设置在压电薄膜112未设置顶电极135的区域。In this embodiment, the top electrode 135 partially covers the side of the piezoelectric film 112 away from the first substrate 121 , and the method for preparing the top electrode 135 includes electron beam evaporation lift-off method, magnetron sputtering metal electrode layer combined with dry etching and wet etching. In any of the etching methods, the thickness of the top electrode 135 is between 10 nanometers and 500 nanometers, and the electrode contact point 119 is provided in the area of the piezoelectric film 112 where the top electrode 135 is not provided.

在本实施例中,顶电极135的材料类型可以为钼、铝、钌、钨或钛金属材料及其组合,也可以为石墨烯等导电材料。In this embodiment, the material type of the top electrode 135 may be molybdenum, aluminum, ruthenium, tungsten, or titanium metal materials and combinations thereof, and may also be conductive materials such as graphene.

在一个具体的实施例中,电极接触点119包括第一电极接触点、第二电极接触点、第三电极接触点,其中,第一电极接触点、所述第三电极接触点通过第一电极互连孔115分别与栅极126、漏极127连接,第二电极接触点与顶电极 135连接。In a specific embodiment, the electrode contact points 119 include a first electrode contact point, a second electrode contact point, and a third electrode contact point, wherein the first electrode contact point and the third electrode contact point pass through the first electrode contact point. The interconnection holes 115 are respectively connected with the gate electrode 126 and the drain electrode 127 , and the second electrode contact point is connected with the top electrode 135 .

压电薄膜112、布拉格反射层、第一钝化层118、金属电极113、顶电极135 以及电极接触点119构成滤波器110。滤波器110与电子器件120通过通孔130 连接,形成单片集成的射频器件。The piezoelectric film 112 , the Bragg reflection layer, the first passivation layer 118 , the metal electrode 113 , the top electrode 135 and the electrode contact point 119 constitute the filter 110 . The filter 110 is connected with the electronic device 120 through the through hole 130 to form a monolithic integrated radio frequency device.

在本实施例中,形成的射频器件为薄膜体声波谐振器(FBAR),薄膜体声波谐振器技术是近年来随着加工工艺技术水平的提高和现代无线通信技术的快速发展而出现的一种性能更加优越的射频器件。它具有极高的品质因数Q值(1000 以上)和可集成于IC芯片上的优点,并能与互补金属氧化物半导体 (Complementary Metal Oxide Semiconductor,CMOS)工艺兼容,有效地避免了声表面波谐振器和介质谐振器无法与CMOS工艺兼容的缺点。In this embodiment, the formed radio frequency device is a thin film bulk acoustic resonator (FBAR). The thin film bulk acoustic resonator technology is a kind of technology that has emerged in recent years with the improvement of the processing technology level and the rapid development of modern wireless communication technology. RF devices with better performance. It has a very high quality factor Q value (above 1000) and the advantages of being integrated on an IC chip, and is compatible with the Complementary Metal Oxide Semiconductor (CMOS) process, effectively avoiding SAW resonance. The disadvantage of the incompatibility of the CMOS process with the dielectric resonator and the dielectric resonator.

在本实施例中,同一块第一基板121上的单片集成装置之间通过第二芯片切割道140分隔开。In this embodiment, the monolithic integrated devices on the same first substrate 121 are separated by the second chip dicing lanes 140 .

在一个具体的实施例中,第二基板111上的布拉格反射层与第一基板121 上的钝化层129键合在一起,去除第二基板111后,第一基板121上的晶体管的源极125与压电薄膜112上的金属电极113连接,晶体管的漏极127与压电薄膜112上的一个电极接触点119连接。In a specific embodiment, the Bragg reflection layer on the second substrate 111 and the passivation layer 129 on the first substrate 121 are bonded together. After the second substrate 111 is removed, the source electrodes of the transistors on the first substrate 121 125 is connected to the metal electrode 113 on the piezoelectric film 112 , and the drain 127 of the transistor is connected to an electrode contact point 119 on the piezoelectric film 112 .

有益效果:本发明在第一基板上制备功率放大器、噪声放大器以及开关等电子器件,在第二基板上制备相应的滤波器,并将第二基板倒装键合在第一基板上,并将第一基板上的电子器件与第二基板上的滤波器键合连接,能够将射频前端模块上不同类型的多个电子器件集成在同一个芯片中,避免了需要额外设计线路的问题,减少了电气连接损失,降低了装配复杂性,减少了射频前端模块的尺寸和成本。Beneficial effects: the present invention prepares electronic devices such as power amplifiers, noise amplifiers and switches on the first substrate, prepares corresponding filters on the second substrate, flip-chips the second substrate to bond the first substrate, and combines The electronic devices on the first substrate are bonded and connected to the filters on the second substrate, which can integrate multiple electronic devices of different types on the RF front-end module into the same chip, avoiding the problem of requiring additional circuit design and reducing the Electrical connection losses, reducing assembly complexity, reducing RF front-end module size and cost.

基于相同的发明构思,本发明还提出了一种单片集成的射频器件,其中,该单片集成的射频器件通过如上述实施例所述的单片集成的射频器件制备方法得到,在此不做赘述。Based on the same inventive concept, the present invention also proposes a monolithically integrated radio frequency device, wherein the monolithically integrated radio frequency device is obtained by the method for fabricating the monolithic integrated radio frequency device as described in the above-mentioned embodiments. Do repeat.

基于相同的发明构思,本发明还提出了一种集成电路系统,请参阅图15,图15是本发明集成电路系统一实施例的结构示意图,该集成电路系统包括放大器、双工器、滤波器以及收发开关,其中,在附图中将双工器、放在同一个方框中用标号143进行表示,收发开关用TX/RX开关144进行表示,放大器包括功率放大器、低噪声放大器中的至少一个,功率放大器用PA142进行表示,低噪声放大器用LNA141进行表示。Based on the same inventive concept, the present invention also proposes an integrated circuit system. Please refer to FIG. 15. FIG. 15 is a schematic structural diagram of an embodiment of the integrated circuit system of the present invention. The integrated circuit system includes an amplifier, a duplexer, and a filter. and a transceiver switch, wherein, in the drawings, the duplexer is placed in the same block and denoted by reference numeral 143, the transceiver switch is denoted by TX/RX switch 144, and the amplifier includes at least one of a power amplifier and a low-noise amplifier. One, the power amplifier is represented by PA142, and the low noise amplifier is represented by LNA141.

在本实施例中,双工器、滤波器与放大器、收发开关耦合连接,放大器、双工器、滤波器以及收发开关中的至少两个设置在如上所述的单片集成的射频器件上,在此不做详述。In this embodiment, the duplexer and the filter are coupled and connected to the amplifier and the transceiver switch, and at least two of the amplifier, the duplexer, the filter and the transceiver switch are arranged on the monolithically integrated radio frequency device as described above, It will not be described in detail here.

在本实施例中,功率放大器的一端与收发器连接,另一端与双工器、滤波器连接,收发开关未与双工器、滤波器连接的另一端与天线连接。In this embodiment, one end of the power amplifier is connected to the transceiver, the other end is connected to the duplexer and the filter, and the other end of the transceiver switch that is not connected to the duplexer and the filter is connected to the antenna.

在本实施例中,功率放大器的一端还与电源管理系统连接。In this embodiment, one end of the power amplifier is also connected to the power management system.

在本发明所提供的几个实施例中,应该理解到,所揭露的系统,装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施方式仅仅是示意性的,例如,所述模块或的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或的间接耦合或通信连接,可以是电性,机械或其它的形式。In the several embodiments provided by the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the device implementations described above are only illustrative. For example, the division of modules or components is only a logical function division. In actual implementation, there may be other divisions. For example, multiple or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, devices or indirect coupling or communication connection, which may be in electrical, mechanical or other forms.

所述作为分离部件说明的可以是或者也可以不是物理上分开的,作为显示的部件可以是或者也可以不是物理,即可以位于一个地方,或者也可以分布到多个网络上。可以根据实际的需要选择其中的部分或者全部来实现本实施方式方案的目的。The components described as separate components may or may not be physically separated, and components shown as components may or may not be physical, that is, they may be located in one place, or may be distributed on multiple networks. Some or all of them can be selected according to actual needs to achieve the purpose of the solution in this implementation manner.

上述实施方式仅为本发明的优选实施方式,不能以此来限定本发明保护的范围,本领域的技术人员在本发明的基础上所做的任何非实质性的变化及替换均属于本发明所要求保护的范围。The above-mentioned embodiments are only preferred embodiments of the present invention, and cannot be used to limit the scope of protection of the present invention. Any insubstantial changes and substitutions made by those skilled in the art on the basis of the present invention belong to the scope of the present invention. Scope of protection claimed.

Claims (10)

1. A method for preparing a monolithically integrated radio frequency device, wherein the radio frequency device is used for a radio frequency front end module, the method comprising:
s1: generating an epitaxial layer on a first substrate, wherein the epitaxial layer comprises a first buffer layer, a second single crystal layer and a third single crystal layer which are sequentially stacked;
s2: processing the epitaxial layer into at least one electronic device, and forming a passivation layer with at least one through hole on one side of the electronic device far away from the first base layer, wherein the electronic device comprises at least one of a power amplifier, a noise amplifier and a switch;
s3: sequentially forming a piezoelectric film, a metal electrode and a Bragg reflection layer on a second substrate, and forming an electrode interconnection hole penetrating through the Bragg reflection layer;
s4: and bonding and connecting the Bragg reflection layer with the passivation layer to electrically connect the electrode interconnection hole and the through hole, removing the second substrate, sequentially forming a top electrode and an electrode contact point on one side of the piezoelectric film, which is far away from the metal electrode, and connecting the top electrode and the electrode contact point with the electronic device through the electrode interconnection hole.
2. The method of claim 1, wherein the number of the through holes is three, and the through holes are respectively connected to a source, a drain, and a gate of the electronic device.
3. The method of claim 2, wherein the number of the electrode interconnection holes is three, and the objects through which each electrode interconnection hole passes are not identical, and are respectively opposite to and electrically connected to different ones of the through holes.
4. The method of claim 3 wherein said top electrode partially covers a side of said piezoelectric film remote from said metal electrodes and is connected to said gate electrode through one of said electrode interconnect holes.
5. The method for manufacturing a monolithically integrated radio frequency device according to claim 3, wherein the electrode contact is disposed in a region of the piezoelectric film away from the metal electrode where the top electrode is not disposed, and includes a first electrode contact, a second electrode contact, and a third electrode contact, wherein the first electrode contact and the third electrode contact are connected to the gate electrode and the drain electrode through the electrode interconnection hole, respectively, and the second electrode contact is connected to the top electrode.
6. The method of claim 1, wherein the metal electrode partially covers the piezoelectric film, the bragg reflector covers the metal electrode, and a portion of the piezoelectric film on a side where the metal electrode is disposed is not covered by the metal electrode.
7. The method of claim 1, wherein the bragg reflector layer comprises a first material layer and a second material layer stacked alternately, the first material layer and the second material layer are at least two layers in the same number, and the acoustic impedance of the first material layer is different from that of the second material layer.
8. The method for fabricating a monolithically integrated rf device as claimed in claim 1, wherein a first passivation layer is further disposed on a side of the bragg reflector layer away from the piezoelectric film, the first passivation layer is disposed in a recessed region of the bragg reflector layer, and the bragg reflector layer is planarized by the first passivation layer.
9. A monolithically integrated radio frequency device, characterized in that said monolithic integration is obtained by a monolithically integrated radio frequency device manufacturing method according to any of claims 1-8.
10. An integrated circuit system, comprising an amplifier, a duplexer, a filter, and a transmit/receive switch, the duplexer, the filter, and the amplifier and the transmit/receive switch coupled together, the amplifier comprising at least one of a power amplifier and a low noise amplifier, at least two of the amplifier, the duplexer, the filter, and the transmit/receive switch being disposed in the monolithically integrated rf device of claim 9.
CN201910796290.8A 2019-08-27 2019-08-27 Monolithic integrated radio frequency device, preparation method and integrated circuit system Pending CN110676287A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111541436A (en) * 2020-04-26 2020-08-14 深圳市信维通信股份有限公司 Forming method of filtering device
CN113078893A (en) * 2021-03-22 2021-07-06 电子科技大学 Monolithic integrated broadband switch filter bank and preparation method thereof
CN113381782A (en) * 2021-05-07 2021-09-10 清华大学 Radio frequency front-end module, method and device for preparing antenna and filter
CN115188656A (en) * 2022-06-10 2022-10-14 华南理工大学 A kind of monolithic integrated material and preparation method thereof
CN115602684A (en) * 2022-08-12 2023-01-13 东科半导体(安徽)股份有限公司(Cn) Integrated structure and preparation method thereof
US11955950B2 (en) 2020-04-26 2024-04-09 Shenzhen Sunway Communication Co., Ltd. Formation method of filter device
WO2024164767A1 (en) * 2023-02-08 2024-08-15 华为技术有限公司 Composite substrate, radio frequency integrated device, and preparation method and apparatus

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060202779A1 (en) * 2005-03-14 2006-09-14 Fazzio R S Monolithic vertical integration of an acoustic resonator and electronic circuitry
US20070001183A1 (en) * 2005-07-01 2007-01-04 Shi-Ming Chen Light-emitting diode
CN203118998U (en) * 2013-01-08 2013-08-07 聚灿光电科技(苏州)有限公司 Package substrate based on flip chip and LED chip comprising package substrate
CN105703733A (en) * 2016-01-18 2016-06-22 佛山市艾佛光通科技有限公司 Method for preparing solid assembled film bulk acoustic wave resonator
CN106098687A (en) * 2016-08-03 2016-11-09 贵州大学 A kind of three-dimensional power VDMOSFET device and integrated approach thereof
JP2018085705A (en) * 2016-11-25 2018-05-31 太陽誘電株式会社 Electronic component and manufacturing method of the same
CN210467842U (en) * 2019-08-27 2020-05-05 广州市艾佛光通科技有限公司 Monolithic integrated radio frequency device and integrated circuit system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060202779A1 (en) * 2005-03-14 2006-09-14 Fazzio R S Monolithic vertical integration of an acoustic resonator and electronic circuitry
US20070001183A1 (en) * 2005-07-01 2007-01-04 Shi-Ming Chen Light-emitting diode
CN203118998U (en) * 2013-01-08 2013-08-07 聚灿光电科技(苏州)有限公司 Package substrate based on flip chip and LED chip comprising package substrate
CN105703733A (en) * 2016-01-18 2016-06-22 佛山市艾佛光通科技有限公司 Method for preparing solid assembled film bulk acoustic wave resonator
CN106098687A (en) * 2016-08-03 2016-11-09 贵州大学 A kind of three-dimensional power VDMOSFET device and integrated approach thereof
JP2018085705A (en) * 2016-11-25 2018-05-31 太陽誘電株式会社 Electronic component and manufacturing method of the same
CN210467842U (en) * 2019-08-27 2020-05-05 广州市艾佛光通科技有限公司 Monolithic integrated radio frequency device and integrated circuit system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111541436A (en) * 2020-04-26 2020-08-14 深圳市信维通信股份有限公司 Forming method of filtering device
WO2021217748A1 (en) * 2020-04-26 2021-11-04 深圳市信维通信股份有限公司 Method for forming filtering device
US11955950B2 (en) 2020-04-26 2024-04-09 Shenzhen Sunway Communication Co., Ltd. Formation method of filter device
CN113078893A (en) * 2021-03-22 2021-07-06 电子科技大学 Monolithic integrated broadband switch filter bank and preparation method thereof
CN113381782A (en) * 2021-05-07 2021-09-10 清华大学 Radio frequency front-end module, method and device for preparing antenna and filter
CN115188656A (en) * 2022-06-10 2022-10-14 华南理工大学 A kind of monolithic integrated material and preparation method thereof
CN115602684A (en) * 2022-08-12 2023-01-13 东科半导体(安徽)股份有限公司(Cn) Integrated structure and preparation method thereof
CN115602684B (en) * 2022-08-12 2024-07-05 东科半导体(安徽)股份有限公司 Method for manufacturing integrated structure
WO2024164767A1 (en) * 2023-02-08 2024-08-15 华为技术有限公司 Composite substrate, radio frequency integrated device, and preparation method and apparatus

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