CN110646988A - Display device - Google Patents

Abstract

The invention discloses a display device, including a first substrate, a plurality of data lines and a plurality of scan lines arranged on the first substrate, a plurality of pixel units arranged on the first substrate, a flat layer covering the data lines, a first common The electrode layer is disposed on the flat layer, the second substrate is disposed opposite the first substrate, and the second common electrode layer is disposed on the second substrate. The data lines extend along the first direction, the scan lines extend along the second direction, and the first direction is perpendicular to the second direction. The pixel unit is electrically connected to the scan line and the data line. The first common electrode layer has a plurality of first portions extending along the first direction. In a direction perpendicular to the first substrate, the first portion overlaps the data lines. The second common electrode layer is located between the second substrate and the first common electrode layer. The present invention can improve the pixel aperture ratio and performance of the display device and achieve good display quality.

Description

display device

technical field

The present invention relates to a display device, and more particularly, to a display device having a common electrode overlapping data lines.

Background technique

With the popularization of flat-panel display panels, liquid crystal display panels with superior characteristics such as good space utilization efficiency, high image quality, low power consumption, and no radiation have been widely used. Generally speaking, a liquid crystal display panel includes a pixel array substrate, a color filter substrate opposite to the pixel array substrate, and a liquid crystal layer sandwiched between the pixel array substrate and the color filter substrate. The pixel array substrate includes a plurality of pixel electrodes. The color filter substrate includes a plurality of color filter patterns and a light-shielding pattern (ie, commonly known as a black matrix) for shielding the gaps between the color filter patterns. Under ideal assembly conditions, the color filter patterns of the color filter substrate are aligned with the pixel electrodes of the pixel array substrate, and the light-shielding patterns of the color filter substrate will shield the space between the pixel electrodes. Gap to prevent light leakage or color mixing.

However, as the resolution of the display panel increases, the requirements for assembly accuracy also increase, so the shading pattern cannot be further reduced to increase the pixel aperture ratio. In addition, the display panel may be impacted or beaten, which may cause the light-shielding pattern and the pixel electrode to be out of alignment, resulting in light leakage. In addition, the conductive vias provided in order to prevent the breakage and failure of the signal traces will further reduce the pixel aperture ratio. Therefore, how to increase the pixel aperture ratio of the display panel and improve the display quality is an urgent problem to be solved by those skilled in the art.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a display device, which can improve the pixel aperture ratio and performance of the display device, and has good display quality.

In order to achieve the above object, the present invention provides a display device, which includes a first substrate, a plurality of data lines and a plurality of scan lines disposed on the first substrate, a plurality of pixel units disposed on the first substrate, and a flat layer covering the data. The lines, the first common electrode layer are arranged on the flat layer, the second substrate is arranged on the opposite side of the first substrate, and the second common electrode layer is arranged on the second substrate. The data lines extend along the first direction, the scan lines extend along the second direction, and the first direction is perpendicular to the second direction. The pixel units are electrically connected to the scan lines and the data lines. The first common electrode layer has a plurality of first parts extending along the first direction, and in the direction perpendicular to the first substrate, the first parts overlap the data lines. The second common electrode layer is located between the second substrate and the first common electrode layer.

Wherein, the first common electrode layer further includes a plurality of second parts extending along the second direction, and some of the second parts are connected to two adjacent first parts, and are perpendicular to the first substrate In the direction of the second portion, a portion of the second portion overlaps the scan line.

Wherein, each of the first portions of the first common electrode has a first width W1, and each of the data lines has a second width W2, and W1≧W2.

Wherein, the scan line includes a first scan line and a second scan line, the data line includes a first data line, and the first data line interlaces the first scan line and the second scan line, wherein The pixel unit includes a first pixel unit located between the first scan line and the second scan line, and the first pixel unit is electrically connected to the second scan line.

Wherein, a common electrode line is further included, and the common electrode line is electrically connected to the first common electrode layer through a through hole.

Wherein, the common electrode line has a trunk extending along the second direction and a fourth portion connected with the first portion, wherein the trunk portion overlaps the first pixel electrode, the first data line and overlaps the first pixel electrode The fourth part of a common electrode layer, and where the trunk overlaps the fourth part, the trunk is electrically connected to the fourth part through the through hole.

Wherein, the first common electrode layer further includes a third portion extending along the second direction, the common electrode line further includes a first branch extending along the first direction, and the first branch is connected to the trunk , the first pixel unit has a first corner adjacent to the second scan line and the first data line, wherein the third portion is parallel to the second portion, and the third portion overlaps the first corner at the first corner a branch, wherein where the first branch overlaps the third part, the first branch is electrically connected to the third part through the through hole.

Wherein, it further includes a spacer disposed on the second scan line, corresponding to the first corner of the first pixel unit.

Wherein, the corresponding color of the first pixel unit corresponding to the spacer is blue.

Wherein, the first pixel unit includes a first sub-pixel region and a second sub-pixel region, the first sub-pixel region includes a first sub-pixel electrode, and the first sub-pixel electrode is electrically connected by a first active element connected to the first data line, the second sub-pixel region includes a second sub-pixel electrode, the second sub-pixel electrode is electrically connected to the first data line through a second active element, and the second sub-pixel The electrodes are also connected to a capacitor through a third active element.

The pixel unit includes a first pixel unit and a second pixel unit, and the first pixel unit and the second pixel unit are located in the same row and adjacent to each other, and the first pixel unit is electrically connected to the first scan unit The second pixel unit is electrically connected to the second scan line, and the first pixel unit and the second pixel unit are electrically connected to the first data line.

The present invention also provides a display device, comprising a first substrate, a plurality of data lines and a plurality of scan lines disposed on the first substrate, a first pixel unit and a second pixel unit disposed on the first substrate, and a flat layer covering these The data line, the first common electrode layer are arranged on the flat layer, the spacer is arranged on the flat layer, the common electrode line is electrically connected with the first common electrode layer through the through hole, the second substrate is arranged on the opposite side of the first substrate and The second common electrode layer is disposed on the second substrate. The data lines extend along the first direction, the scan lines extend along the second direction, and the first direction is perpendicular to the second direction. The first pixel unit and the second pixel unit are respectively electrically connected to the scan lines and the data lines. The first common electrode layer has a plurality of first parts extending along the first direction, and in the direction perpendicular to the first substrate, the first parts overlap the data lines. In a direction perpendicular to the first substrate, the spacer overlaps one of the scan lines. The second common electrode layer is located between the second substrate and the first common electrode layer. These scan lines include a first scan line and a second scan line. The data lines include first data lines, and the first data lines interlace the first scan lines and the second scan lines. The first pixel unit and the second pixel unit are located between the first scan line and the second scan line. The first pixel unit has a first corner adjacent to the second scan line and the first data line. The spacer is adjacent to the first corner of the first pixel unit. In the first direction, the distance between the spacer and the through hole is 2 μm to 10 μm.

The first pixel unit is electrically connected to the first scan line, the second pixel unit is connected to the second scan line, and the first pixel unit and the second pixel unit are electrically connected to the first data line and located in the same columns and adjacent.

Wherein, the second pixel unit has a second corner adjacent to the second scan line and the first data line, and the first corner and the second corner are respectively located on both sides of the first data line, and the second A second active element of the pixel unit is adjacent to the second corner.

Wherein, the first pixel unit includes a first sub-pixel region and a second sub-pixel region, the first sub-pixel region includes a first sub-pixel electrode, and the first sub-pixel electrode is electrically connected by a first active element connected to the first data line, the second sub-pixel region includes a second sub-pixel electrode, the second sub-pixel electrode is electrically connected to the first data line through a second active element, and the second sub-pixel The electrodes are also connected to a capacitor through a third active element.

Wherein, the through hole and the spacer are adjacent to the first corner of the first pixel.

The first pixel unit corresponds to a first color, the second pixel unit corresponds to a second color, the first color is different from the second color, and the through hole and the spacer are arranged corresponding to the first color.

Wherein, it further includes a driving circuit, wherein there are a plurality of the common electrode lines, and the driving circuit is electrically connected to the part of the common electrode lines.

Wherein, the first common electrode layer and the second common electrode layer are electrically connected to a common voltage potential.

Based on the above, the display device of an embodiment of the present invention has the first common electrode layer arranged in a mesh shape, and in the direction perpendicular to the first substrate, the common electrode layer overlaps the data lines and partially overlaps the scan lines, thus overlapping the data The display medium layers at the lines and scan lines can be rotated by the electric field between the first common electrode layer and the second common electrode layer. Thereby, the display medium layer can form an opaque area to absorb or block the light obliquely penetrating the display medium layer from the first substrate. In this way, the probability of lateral light leakage and light mixing caused by the thickness of the flat layer or the displacement of the light shielding pattern layer can be reduced, thereby improving the pixel aperture ratio, performance and display quality of the display device.

In order to make the above features and advantages of the present invention more clearly understood, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments, but it is not intended to limit the present invention.

Description of drawings

FIG. 1 is a schematic partial top view of a display device according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of the display device of FIG. 1 along the section line AA'.

FIG. 3 is a schematic cross-sectional view of the display device of FIG. 1 along the section line BB'.

FIG. 4 is a schematic partial top view of a display device according to another embodiment of the present invention.

FIG. 5 is a schematic partial top view of a display device according to another embodiment of the present invention.

FIG. 6 is an equivalent circuit diagram of a display device according to still another embodiment of the present invention.

Among them, reference numerals:

10, 10A, 10B, 10C: Display device

100: First substrate

110: Gate insulating layer

120: Flat Layer

140, 140': the first common electrode layer

141: Part 1

142: Part II

143: Part Three

151: First Corner

152: Second Corner

160, 160n, 160n _{+ 1} , 160n ₊₂ , 160n ₊₃ : Common electrode lines

162: Trunk

164: Branch

1641: First Branch

170, 170A, 172: Through hole

180: Spacer

200: Second substrate

220: shading pattern layer

240: the second common electrode layer

301, 302: Drive circuit

A-A', B-B': hatching

Q: charge

C1, C2: storage capacitors

C _CS : Capacitor

CH1, CH1': the first semiconductor channel layer

CH2: second semiconductor channel layer

D1, D1': the first drain

D2: second drain

DL, DL _n , DL _n+1 , DL _n+2 , DL _n+3 : data lines

DL1: first data line

DL2: Second data line

DL3: The third data line

G1, G1': the first gate

G2: the second gate

LC: Display medium layer

PE: pixel electrode

PE1: first pixel electrode

PE1A: first sub-pixel electrode

PE1B: second sub-pixel electrode

PE2: second pixel electrode

PX: pixel unit

PX1, PX1', PX1": the first pixel unit

PX1A: first sub-pixel area

PX1B: Second sub-pixel area

PX2: Second pixel unit

S1, S1': the first source

S2: second source

SL, SL _n , SL _n+1 , SL _n+2 , SL _n+3 : scanning lines

SL1: first scan line

SL2: Second scan line

T: Active element

T1, T1', T1A: the first active element

T2, T1B: the second active element

T1C: third active element

V1: the first voltage potential

V2: second voltage potential

W1: first width

W2: Second width

X: the second direction

Y: the first direction

Detailed ways

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of each element and the like is exaggerated for clarity. The same reference numerals refer to the same elements throughout the specification. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on," "connected to," "overlying" another element, it can be directly on the other element on or connected to another element, or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to a physical and/or electrical connection.

It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, and and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a "first element," "component," "region," "layer," or "section" discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.

The terminology used herein is for the purpose of describing particular embodiments only and is not limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms including "at least one" unless the content clearly dictates otherwise. "Or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will also be understood that the terms "comprising" and/or "comprising" when used in this specification designate the stated feature, region, integer, step, operation, presence of an element and/or part, but do not exclude one or more The presence or addition of other features, entireties of regions, steps, operations, elements, components, and/or combinations thereof.

Furthermore, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe one element's relationship to another element, as shown in the figures. It should be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. Thus, the exemplary term "lower" may include an orientation of "lower" and "upper", depending on the particular orientation of the drawings. Similarly, if the device in one of the figures is turned over, elements described as "below" or "beneath" other elements would then be oriented "above" the other elements. Thus, the exemplary terms "below" or "under" can encompass both an orientation of above and below.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed as having meanings consistent with their meanings in the context of the related art and the present invention, and are not to be construed as idealized or excessive Formal meaning, unless expressly defined as such herein.

Exemplary embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments. Thus, variations in the shapes of the illustrations as a result of, for example, manufacturing techniques and/or tolerances, are to be expected. Accordingly, the embodiments described herein should not be construed as limited to the particular shapes of regions as shown herein, but rather include deviations in shapes resulting from, for example, manufacturing. For example, regions illustrated or described as flat may typically have rough and/or nonlinear features. Additionally, the acute angles shown may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.

FIG. 1 is a schematic top view of a part of a display device according to an embodiment of the present invention. For the convenience of description and observation, FIG. 1 only schematically shows some components. FIG. 2 is a schematic cross-sectional view of the display device of FIG. 1 along the section line AA'. FIG. 3 is a schematic cross-sectional view of the display device of FIG. 1 along the section line BB'. Please refer to FIGS. 1 , 2 and 3 , the display device 10 includes a first substrate 100 , a plurality of data lines DL and a plurality of scan lines SL, a flat layer 120 , a first common electrode layer 140 , a second substrate 200 and a second The common electrode layer 240 and the plurality of pixel units PX are disposed on the first substrate 100 and are respectively electrically connected to the scan lines SL and the data lines DL. As shown in FIG. 1 , the display device 10 further includes a common electrode line 160 disposed on the first substrate 100 . In addition, as shown in FIGS. 2 and 3 , the display device 10 further includes a light-shielding pattern layer 220 disposed between the second substrate 200 and the second common electrode layer 240 and a display medium layer LC disposed between the first substrate 100 and the second substrate between 200. In other words, the display device 10 is, for example, a liquid crystal display panel (Liquid Crystal Display, LCD) including a pixel array substrate and a color filter substrate, but the invention is not limited thereto. The structure of the display device 10 will be briefly described below with an embodiment.

Please refer to FIG. 1 , FIG. 2 and FIG. 3 , in this embodiment, a plurality of data lines DL and a plurality of scan lines SL are disposed on the first substrate 100 in a staggered manner. In detail, the material of the first substrate 100 is, for example, glass, quartz, plastic, organic polymer, opaque/reflective material (for example, conductive material, metal, wafer, ceramic, or other applicable materials) or Other applicable materials. In some embodiments, the first substrate 100 can also be a flexible substrate, and its material includes an organic polymer, such as polyimide (PI), polyethylene naphthalate (PEN) or Other suitable materials, the present invention is not limited by this.

Please refer to FIG. 1 and FIG. 3 , in this embodiment, a plurality of scan lines SL are disposed on the first substrate 100 . The plurality of scan lines SL including the first scan line SL1 and the second scan line SL2 are disposed on the first substrate 100 in parallel with each other. As shown in FIG. 1 , the scan lines SL (including the first scan line SL1 and the second scan line SL2 ) may be arranged along the first direction Y and extend along the second direction X. In this embodiment, the first direction Y is perpendicular to the second direction X. As shown in FIG. 1 , for example, the first scan line SL1 is located at the bottom of FIG. 1 and the second scan line SL2 is located at the top of FIG. 1 , but the invention is not limited thereto.

As shown in FIG. 1 and FIG. 2 , the display device 10 further includes a common electrode line 160 disposed on the first substrate 100 . The common electrode line 160 is disposed between the first scan line SL1 and the second scan line SL2, and the common electrode line 160 has a trunk 162 extending along the second direction X and a plurality of branches 164 extending along the first direction Y. From another perspective, the trunk 162 can be parallel to the scan line SL, and the plurality of branches 164 can be vertically interleaved with the trunk 162, but the invention is not limited thereto. In this embodiment, based on the consideration of conductivity, the common electrode line 160 and the scan line SL are generally made of metal materials, but other suitable conductive materials may also be used. For example, alloys, nitrides of metal materials, oxides of metal materials, oxynitrides of metal materials, or stacked layers of metal materials and other conductive materials. It should be noted that although only one common electrode line 160 is shown in FIG. 1 , there may actually be multiple common electrode lines 160 and each of them is respectively disposed between any two adjacent scan lines SL, not only Figure 1 shows the limit.

As shown in FIG. 2 and FIG. 3 , the gate insulating layer 110 is disposed on the first substrate 100 and covers the scan line SL (eg, the second scan line SL2 ) and the common electrode line 160 (eg, the branch 164 ). It should be noted that, the gate insulating layer 110 is omitted in FIG. 1 for the sake of clarity of the drawing. However, the gate insulating layer 110 is entirely disposed on the first substrate 100 to cover and overlap a plurality of scan lines SL and common electrode lines. 160 (including: trunk 162 and branches 164). In this embodiment, the material of the gate insulating layer 110 includes inorganic materials, organic materials, combinations of the above materials, or other suitable materials. The above-mentioned inorganic materials are, for example (but not limited to): silicon oxide, silicon nitride, silicon oxynitride or a stack layer of the above at least two materials. The above-mentioned organic materials are, for example (but not limited to): polymer materials such as polyimide-based resins, epoxy-based resins, or acrylic-based resins. In this embodiment, the gate insulating layer 110 is a single film layer, but the invention is not limited thereto. In other embodiments, the gate insulating layer 110 may also be formed by stacking a plurality of film layers.

Referring to FIG. 1 and FIG. 2 , in this embodiment, a plurality of data lines DL are disposed on the gate insulating layer 110 on the first substrate 100 . The data lines DL and the scan lines SL are located on different planes and staggered with each other respectively. In detail, the plurality of data lines DL include the first data line DL1. In this embodiment, the data lines DL further include a second data line DL2 and a third data line DL3. The first data line DL1 , the second data line DL2 and the third data line DL3 are disposed on the first substrate 100 in parallel with each other and interlace the first scan line SL1 and the second scan line SL2 . As shown in FIG. 1 , the data lines DL (including the first data line DL1 , the second data line DL2 and the third data line DL3 ) can be arranged along the second direction X and extend along the first direction Y. As shown in FIG. 1 , for example, the first data line DL1 is located in the middle of FIG. 1 , the second data line DL2 is located to the right of the first data line DL1 in FIG. 1 , and the third data line DL3 is located in the first data line in FIG. 1 . The left side of DL1, but the present invention is not limited to this.

In this embodiment, based on the consideration of conductivity, the data line DL is generally made of a metal material, but other suitable conductive materials may also be used. For example: alloys, nitrides of metal materials, oxides of metal materials, oxynitrides of metal materials, or stacked layers of metal materials and other conductive materials. It should be noted that although only two scan lines SL and three data lines DL are shown in FIG. 1 , in fact, there may be more scan lines SL and data patterns DL arranged staggered with each other, not only limited to the number shown in FIG. 1 . .

As shown in FIG. 1 , the display device 10 includes a plurality of pixel units PX located in the same column and arranged adjacently, but the invention is not limited to this. Actually, the plurality of pixel units PX are arranged on the first substrate 100 in a two-dimensional array. The pixel units PX are electrically connected to the scan lines SL and the data lines DL. In general, each pixel unit PX may, for example, represent a sub-pixel of one color. For example, the pixel unit PX may be a red sub-pixel, a green sub-pixel, a blue sub-pixel, an orange sub-pixel, a yellow sub-pixel or a white sub-pixel, but not limited thereto. In some embodiments, each pixel unit PX may further include sub-pixels of multiple colors, for example, including blue and green sub-pixels, red and green sub-pixels, or blue and red sub-pixels, but the present invention does not This is the limit.

In this embodiment, the pixel units PX may include a first pixel unit PX1 and a second pixel unit PX2 disposed on the first substrate 100, and may be located in the same row and adjacent to each other. As shown in FIG. 1 , the first pixel unit PX1 is disposed on the left side of the first data line DL1, for example, and the second pixel unit PX2 is disposed on the right side of the second data line DL2, for example, and the first pixel unit PX1 and the second pixel unit PX2 are disposed on the right side of the second data line DL2. The pixel unit PX2 is electrically connected to the corresponding scan line SL and the data line DL, respectively. In detail, the first pixel unit PX1 and the second pixel unit PX2 are both disposed between the first scan line SL1 and the second scan line SL2, and the first pixel unit PX1 is electrically connected to the second scan line SL2, and the second The pixel unit PX2 is also electrically connected to the second scan line SL2. From another perspective, the first pixel unit PX1 and the second pixel unit PX2 may share the same second scan line SL2, but the invention is not limited to this. In addition, as shown in FIG. 1 , the first pixel unit PX1 is electrically connected to the third data line DL3 , and the second pixel unit PX2 is electrically connected to the first data line DL1 , but the invention is not limited thereto. It should be noted here that FIG. 1 only shows two pixel units PX (for example, a first pixel unit PX1 and a second pixel unit PX2 ), in fact, the display device 10 may include more pixel units PX, such as ten 10,000, millions or tens of millions of pixel units, not limited to the number shown in FIG. 1 .

In this embodiment, each pixel unit PX includes, for example, an active element T (marked in FIG. 5 ) and a pixel electrode PE (marked in FIG. 5 ). For example, the first pixel unit PX1 includes a first pixel electrode PE1 and a first active element T1, and the second pixel unit PX2 includes a second pixel electrode PE2 and a second active element T2. As shown in FIG. 1 , the first pixel electrode PE1 can be electrically connected to the second scan line SL2 and the third data line DL3 through the first active element T1, and the second pixel electrode PE2 can be electrically connected through the second active element T2 is connected to the second scan line SL2 and the first data line DL1. In this embodiment, the active element T is, for example, a low temperature polysilicon thin film transistor (low temperature poly-Si, LTPS) or an amorphous silicon thin film transistor (amorphous Si, a-Si), but the invention is not limited thereto. In this embodiment, the structures and materials of the first active element T1 and the second active element T2 are the same. For example, the first active element T1 includes a first gate electrode G1, a first semiconductor channel layer CH1, and a first source electrode S1 and a first drain electrode D1 electrically connected to the first semiconductor channel layer CH1, respectively. The second active element T2 includes a second gate electrode G2, a second semiconductor channel layer CH2, and a second source electrode S2 and a second drain electrode D2 electrically connected to the second semiconductor channel layer CH2, respectively.

Specifically, the first gate G1 and the second scan line SL2 of the first active element T1 are made of the same film layer and are electrically connected to each other. The second gate electrode G2 of the second active element T2 and the second scan line SL2 are made of the same film layer and are electrically connected to each other. From another perspective, both the first gate G1 and the second gate G2 belong to the part of the second scan line SL2.

The first semiconductor channel layer CH1 and the second semiconductor channel layer CH2 are respectively disposed on the second scan line SL2. For example, the first semiconductor channel layer CH1 is disposed corresponding to the first gate electrode G1, and the second semiconductor channel layer CH2 is disposed corresponding to the second gate electrode G2. In this embodiment, the materials of the first semiconductor channel layer CH1 and the second semiconductor channel layer CH2 include amorphous silicon, polycrystalline silicon, microcrystalline silicon, single crystal silicon, organic semiconductor materials, and oxide semiconductor materials (eg, indium zinc oxide). compound, indium germanium zinc oxide, or other suitable materials, or a combination of the above), or other suitable materials, or containing dopants (dopants) in the above materials, or a combination of the above, but the present invention does not This is limited.

In this embodiment, the first source S1 of the first active element T1 is electrically connected to the third data line DL3 and the first semiconductor channel layer CH1, and the second source S2 of the second active element T2 is electrically connected to the first the data line DL1 and the second semiconductor channel layer CH2. The first drain electrode D1 of the first active element T1 is electrically connected to the first semiconductor channel layer CH1, and the second drain electrode D2 of the second active element T2 is electrically connected to the second semiconductor channel layer CH2. In this embodiment, the data line DL (including the first data line DL1 and the third data line DL3 ), the first source electrode S1 and the second source electrode S2 are made of the same film layer, for example, but this is not the case in the present invention limit. In this embodiment, the first drain electrode D1 and the second drain electrode D2 can also be fabricated on the same plane as the first source electrode S1 and the second source electrode S2, but the invention is not limited to this.

In this embodiment, the first source electrode S1 and the second source electrode S2 and the first drain electrode D1 and the second drain electrode D2 are made of metal materials, but the invention is not limited thereto. According to other embodiments, the first source electrode D1 and the second drain electrode D2 are made of metal materials The electrode S1 and the second source electrode S2 and the first drain electrode D1 and the second drain electrode D2 can also use other suitable conductive materials. For example, alloys, nitrides of metal materials, oxides of metal materials, oxynitrides of metal materials, or stacked layers of metal materials and other conductive materials.

In this embodiment, the first active element T1 and the second active element T2 are, for example, bottom gate thin film transistors (bottom gate TFT), but the invention is not limited thereto. In other embodiments, the first active element T1 and the second active element T2 can also be top gate TFTs or other suitable thin film transistors.

Please refer to FIG. 1 , FIG. 2 and FIG. 3 , the planarization layer 120 is disposed on the gate insulating layer 110 and covers the data lines DL (including: the first data line DL1 , the second data line DL2 and the third data line DL3 ) and the first data line DL Active element T1 and second active element T2. In FIG. 1 , the planarization layer 120 is omitted for the sake of clarity of the drawing. In fact, the planarization layer 120 is formed on the gate insulating layer 110 on the entire surface. In this embodiment, the material of the flat layer 120 includes inorganic materials, organic materials, combinations of the above materials, or other suitable materials. The above-mentioned inorganic materials are, for example (but not limited to): silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two of the above-mentioned materials. The above-mentioned organic materials are, for example (but not limited to): polymer materials such as polyimide-based resins, epoxy-based resins, or acrylic-based resins. In this embodiment, the flat layers 120 are respectively a single film layer, but the present invention is not limited thereto. In other embodiments, the planarization layer 120 may also be formed by stacking a plurality of film layers.

As shown in FIG. 1 , FIG. 2 and FIG. 3 , the first pixel electrode PE1 is disposed on the flat layer 120 and is electrically connected to the first active element T1 , and the second pixel electrode PE2 is also disposed on the flat layer 120 and is electrically connected to the first active element T1 . is connected to the second active element T2, but the invention is not limited to this. As shown in FIG. 1 , the first drain electrode D1 of the first active element T1 is electrically connected to the first pixel electrode PE1 through a through hole 172 , and the second drain electrode D2 of the second active element T2 is electrically connected through another through hole 172 It is electrically connected to the second pixel electrode PE2. Under the above arrangement, the third data line DL3 can be electrically connected through the first active element T1 and provide the driving signal to the first pixel electrode PE1, and the first data line DL1 can be electrically connected through the second active element T2 It is electrically connected and provides the driving signal to the second pixel electrode PE2, but the invention is not limited to this.

In this embodiment, the material of the first pixel electrode PE1 and the second pixel electrode PE2 may be a transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum tin oxide (ATO) , metal oxides such as aluminum zinc oxide (AZO) or indium germanium zinc oxide (IGZO), but the present invention is not limited thereto. Under the above arrangement, the first substrate 100 is, for example, a pixel array substrate of a liquid crystal display panel, but the invention is not limited thereto.

As shown in FIG. 1 , FIG. 2 and FIG. 3 , the first common electrode layer 140 is disposed on the flat layer 120 . As shown in FIG. 1 , the first common electrode layer 140 has a plurality of first parts 141 extending along the first direction Y and a plurality of second parts 142 extending along the second direction X. In this embodiment, the second parts 142 are connected to two adjacent first parts 141 , but the invention is not limited to this. In some embodiments, only a part of the second parts 142 may be connected to two adjacent first parts 141 , and another part of the second parts 142 may be connected to only one of the two adjacent first parts 141 . one without connecting the other. Under the above arrangement, in a plan view, the first common electrode layer 140 having the first portions 141 and the second portions 142 can form a mesh or lattice pattern, but the invention is not limited thereto. In this embodiment, the material of the first common electrode layer 140 can be a transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum tin oxide (ATO), aluminum zinc oxide (AZO) or indium germanium zinc oxide (IGZO) and other metal oxides, but the present invention is not limited thereto.

In this embodiment, the spacer 180 may be disposed on the second scan line SL2, but the invention is not limited to this. Actually, the spacer 180 may be disposed on any scan line SL. In other words, according to the needs of the user, the spacer 180 can also be disposed on the first scan line SL1 , and is not limited to the one shown in FIG. 1 . As shown in FIG. 1 , the first pixel unit PX1 is, for example, a rectangle with four corners. One of the above four corners may be defined as the first corner 151 . The first corner 151 is, for example, the upper right corner of the first pixel unit PX1 adjacent to the second scan line SL2 and the first data line DL1. In addition, the second pixel unit PX2 is also, for example, a rectangle with four corners, and one of them can be defined as the second corner 152 . The second corner 152 is, for example, the upper left corner of the second pixel unit PX2 adjacent to the second scan line SL2 and the first data line DL1 . In other words, the first corner 151 and the second corner 152 are located on two sides of the first data line DL1 respectively. In this embodiment, the spacer 180 may be disposed corresponding to the first corner 151 of the first pixel unit PX1. In other words, the spacer 180 may be disposed adjacent to the second scan line SL2 and the first data line DL1, but the invention is not limited thereto. In addition, as shown in FIG. 1 , the second active element T2 may be disposed adjacent to the second corner 152 , but the invention is not limited thereto. Thereby, the pixel aperture ratio can be improved.

Please refer to FIG. 2 and FIG. 3 , the second substrate 200 is disposed opposite to the first substrate 100 . In this embodiment, the material of the second substrate 200 is, for example, glass, quartz, plastic, organic polymer, or other applicable materials. In some embodiments, the first substrate 100 can also be a flexible substrate, and its material includes an organic polymer, such as polyimide (PI), polyethylene naphthalate (PEN) or Other suitable materials, the present invention is not limited by this.

As shown in FIG. 2 and FIG. 3 , the light shielding pattern layer 220 is disposed on the second substrate 200 . The orthographic projection of the light-shielding pattern layer 220 on the first substrate 100 completely overlaps the orthographic projection of the first portion 141 of the first common electrode layer 140 on the first substrate 100 and the orthographic projection of the first data line DL1 on the first substrate 100 . In other words, the orthographic projection of the first portion 141 of the first common electrode layer 140 on the first substrate 100 and the orthographic projection of the first data line DL1 on the first substrate 100 are located on the light-shielding pattern layer 220 on the first substrate 100 within the orthographic projection. In addition, the orthographic projection of the second scan line SL2 on the first substrate 100 is also within the orthographic projection of the light-shielding pattern layer 220 on the first substrate 100 . In this way, the light shielding pattern layer 220 can shield the data lines DL (for example, including the first data line DL1 ) and the scan lines SL (for example, including the second scan line SL2 ). From another perspective, the light-shielding pattern layer 220 is, for example, a black matrix (Black Matrix, BM) that shields the data lines DL and the scan lines SL disposed between the pixel units PX, so as to shield the display device 10 from not being used. components and traces viewed by the user, and reduce the probability of light mixing and light leakage. In this embodiment, the material of the light-shielding pattern layer 220 is, for example, black resin or a material with low reflectivity such as light-shielding metal (eg, chrome), but the invention is not limited thereto.

As shown in FIG. 2 and FIG. 3 , the second common electrode layer 240 is disposed on the second substrate 200 and covers the light-shielding pattern layer 220 . In this embodiment, the second common electrode layer 240 is formed on the second substrate 200 over the entire surface, for example, and is located between the second substrate 200 and the first common electrode layer 140 . In this embodiment, the material of the second common electrode layer 240 may be a transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum tin oxide (ATO), aluminum zinc oxide (AZO) or indium germanium zinc oxide (IGZO) and other metal oxides, but the present invention is not limited thereto. In this embodiment, the first common electrode layer 140 and the second common electrode layer 240 are electrically connected to a common voltage potential. In this way, an electric field can be generated between the first common electrode layer 140 and the second common electrode layer 240 .

In some embodiments, a color filter, a polarizer or other optical elements may be sandwiched between the second substrate 200 and the second common electrode layer 240, but the invention is not limited to this . Under the above arrangement, the second substrate 200 is, for example, a color filter substrate of a liquid crystal display panel, but the invention is not limited thereto.

As shown in FIG. 2 and FIG. 3 , the display medium layer LC is disposed on the pixel electrode PE of the first substrate 100 (for example, including the first pixel electrode PE1 and the second pixel electrode PE2 ) and the second common electrode layer of the second substrate 200 . between 240. The display medium layer LC may include liquid crystal molecules, electrophoretic display media, or other applicable media. The display medium layer LC in the following embodiments of the present invention is exemplified by including liquid crystal molecules, but the present invention is not limited thereto. Furthermore, the liquid crystal molecules in the following embodiments of the present invention are preferably negative-type liquid crystals, and liquid crystal molecules that can be rotated or switched by a vertical electric field are used as an example, but the present invention is not limited thereto.

It is worth noting that, in this embodiment, the first common electrode layer 140 is disposed on the flat layer 120 in a mesh-like manner, and in the direction perpendicular to the first substrate 100 , the data lines DL are overlapped and the data lines DL are partially overlapped. scan line SL. Specifically, the first parts 141 of the first common electrode layer 140 may completely overlap the data lines DL, and the second parts 142 may partially overlap the scan lines SL. From another perspective, as shown in FIG. 2 and FIG. 3 , the first common electrode layer 140 and the pixel electrodes (for example, the first pixel electrode PE1 and the second pixel electrode PE2 ) can be located on the same plane, and can pass through It is made of the same material and has conductivity. Under the above arrangement, as shown in FIG. 2 and FIG. 3 , the light-shielding pattern layer 220 overlaps the data line DL (for example, the first data line DL1 ) and the scan line SL (for example, the second scan line SL2 ). The display medium layer LC is located between the first common electrode layer 140 and the second common electrode layer 240 . Therefore, like the display medium layer LC located between the pixel electrode and the second common electrode 240, the liquid crystal molecules in the display medium layer LC will be rotated by the electric field between the first common electrode layer 140 and the second common electrode layer 240, With the proper arrangement of polarizers, an opaque area can be formed within the orthographic projection of the light-shielding pattern layer 220 on the first substrate 100 .

As a result, compared with the existing display device, the area between the light-shielding pattern layer and the signal lines (such as data lines or scan lines) is an uncontrolled area of liquid crystal. In the display device 10 of this embodiment, the light-shielding pattern layer 220 and The liquid crystal molecules in the display medium layer LC between the first data line DL1 and/or the second scan line SL2 can be regulated by being rotated by the electric field between the first common electrode layer 140 and the second common electrode layer 240 . Therefore, the opaque area formed by the display medium layer LC within the orthographic projection of the light shielding pattern layer 220 on the first substrate 100 can absorb or block light obliquely penetrating the display medium layer LC from the first substrate 100 . In other words, as shown in FIG. 2 , the display medium layer LC overlapping the light shielding pattern 220 and the first data line DL1 between the first pixel electrode PE1 and the second pixel electrode PE2 is opaque. In this way, the probability of lateral light leakage and light mixing due to the thickness of the flat layer 120 or the displacement of the light shielding pattern layer 220 can be reduced, so that the required width of the light shielding pattern layer 220 can be further reduced, thereby increasing the pixel aperture ratio.

In addition, compared with the conventional display device, the display medium layer overlapping the data line and the scan line can be affected by the electric field from the data line. On the contrary, the first common electrode layer 140 of this embodiment can reduce the risk that the first data line DL1 affects the liquid crystal molecules in the display medium layer LC, further improve the control of the liquid crystal molecules, and has good performance. Therefore, the display device 10 can control the liquid crystal molecules in the display medium layer LC overlapping the data lines DL and the light-shielding pattern layer 220 through the first common electrode layer 140 , thereby reducing the probability of lateral light leakage and light mixing, and increasing the pixel aperture ratio. The performance of the display device 10 has good display quality.

In addition, as shown in FIG. 3 , an electric field may also be generated between two adjacent second portions 142 of the first common electrode layer 140 and the second common electrode layer 240 . In this way, the liquid crystal molecules in the display medium layer LC of the overlapping scan line SL (eg, the second scan line SL2 ) and the light shielding pattern layer 220 can also be rotated to form an opaque area, thereby achieving the above-mentioned technical effects.

Referring to FIG. 1 and FIG. 2 , in this embodiment, the first portion 141 of the first common electrode 140 has a first width W1 , and the data line DL (eg, the first data line DL1 ) has a second width W2 . In this embodiment, the first width W1≧the second width W2. In other words, the orthographic projection of the first data DL1 on the first substrate 100 is completely within the orthographic projection of the first portion 141 on the first substrate 100 . In this way, when the first width W1 of the first portion 141 is defined as an opaque area, the opaque area can completely overlap the first data line DL1. In this way, the width of the shielding pattern 220 can be further reduced to increase the pixel aperture ratio, thereby improving the display quality of the display device 10 .

Please refer to FIG. 1 , the display device 10 of this embodiment further includes a plurality of through holes 170 . The through hole 170 is, for example, an opening that penetrates through the planarization layer 120 and the gate insulating layer 110 to expose the common electrode line 160 . Under the above arrangement, the common electrode line 160 can be electrically connected to the first common electrode layer 140 through the through hole 170 . In detail, the through hole 170 may overlap the common electrode line 160 . As shown in FIG. 1 , the common electrode line 160 includes a trunk 162 and branches 164 extending along the first direction Y from the trunk 162 . The trunk 162 may partially overlap the first pixel electrode PE1 and the second pixel electrode PE2 , the first data line DL1 , the second data line DL2 , the third data line DL3 , and the first parts 141 of the first common electrode layer 140 . In this embodiment, the plurality of branches 164 are located between the first portion 141 and the first pixel electrode PE1 and/or the second pixel electrode PE2 and are parallel to the first portion 141 . From another perspective, the branches 164 are, for example, shielding metal patterns disposed on both sides of the data line DL, but the invention is not limited thereto.

In this embodiment, the branch 164 between the first data line DL1 and the first pixel electrode PE1 may be defined as a first branch 1641 . The first branch 1641 extends along the first direction Y and connects the trunk 162 . As shown in FIG. 1 , the through hole 170 may be disposed in the first corner 151 of the first pixel unit PX1 to overlap the first branch 1641 . In more detail, the first common electrode layer 140 further includes a third portion 143 extending along the second direction X. The third portion 143 is parallel to the second portion 142 and connected to the first portion 141 . As shown in FIG. 1 , the third portion 143 is located between the second portion 142 and the first pixel electrode PE1 , and the third portion 143 partially overlaps the second scan line SL2 but does not overlap the first pixel electrode PE1 . In this embodiment, the second portion 142 may also partially overlap the second scan line SL2, and the vertical projection of the second portion 142 and/or the third portion 143 on the first substrate 100 and the second scan line SL2 on the first substrate 100 The width of the overlapping portion of the vertical projection on the substrate 100 is 0.5 micrometers to 4 micrometers, and preferably 2 micrometers to 4 micrometers. In addition, at the first corner 151 , the third portion 143 partially overlaps the first branch 1641 . In more detail, the first branch 1641 is provided with a through hole 170 where the first branch 1641 overlaps the third portion 143 . That is to say, the through hole 170 can expose the first branch 1641 at the first corner 151 , so that the first branch 1641 of the common electrode line 160 can be electrically connected to the third part 143 of the first common electrode layer 140 through the through hole 170 , but the present invention is not limited to this.

Under the above arrangement, when the common electrode line 160 is disconnected, the signal of the common electrode line 160 can be transmitted to the first common electrode layer 140 through the through hole 170 (eg, the through hole 170 located at the first corner 151 ). The above-mentioned signals can then be transmitted to another through hole (not shown) along the grid-shaped first common electrode layer 140 overlapping the data line DL and the scan line SL and then transmitted back to the common electrode line 160 . In this way, the risk of abnormal signal or failure of the common electrode line 160 due to disconnection can be reduced, and the space occupied by the through hole 170 in the display area can be reduced to increase the aperture ratio, thereby increasing the display area of the display device 10 , thereby improving performance and Display quality.

In addition, as shown in FIG. 1 , the spacer 180 disposed on the second scan line SL2 may be disposed corresponding to the first corner 151 of the first pixel unit PX1 . Under the above-mentioned arrangement, the spacer 180 and the through hole 170 may be arranged adjacent to the first corner 151 . For example, in the present embodiment, in the first direction Y, the distance between the spacer 180 and the through hole 170 may be, for example, 2 μm to 15 μm. In a preferred embodiment, the distance between the spacer 180 and the through hole 170 may be 2 μm to 7 μm. In this way, the spacers 180 and the through holes 170 can be correspondingly disposed to reduce the width of the light-shielding pattern layer 220 (shown in FIGS. 2 and 3 ), thereby further increasing the pixel aperture ratio and improving the display quality of the display device 10 .

In some embodiments, in addition to the spacer 180 corresponding to the first corner 151 of the first pixel unit PX1 , the first color corresponding to the first pixel unit PX1 corresponding to the spacer 180 may also be blue. For example, the first pixel unit PX1 may correspond to the first color, and the second pixel unit PX2 may correspond to the second color. The first color is, for example, blue, and is different from the second color, such as red or green or other colors. In the above-mentioned embodiment, the through hole 170 and the spacer 180 may be set corresponding to the first color, but not limited thereto. Under the above arrangement, the transmittance of the display device 10 can be further improved, and the display quality of the display device 10 can be improved.

In short, since the display device 10 of this embodiment has the first common electrode layer 140 arranged in a mesh shape, and in the direction perpendicular to the first substrate 100 , the common electrode layer 140 overlaps the data lines DL and partially overlaps the scan lines Therefore, the display medium layer LC where the light-shielding pattern layer 220 overlaps the data line DL and the scan line SL can be rotated by the electric field between the first common electrode layer 140 and the second common electrode layer 240 . Thereby, with an appropriate configuration of polarizers, the display medium layer LC can form an opaque area within the orthographic projection of the light-shielding pattern layer 220 on the first substrate 100 to absorb or block oblique penetration from the first substrate 100 The light of the medium layer LC is displayed. In this way, the probability of lateral light leakage and light mixing caused by the thickness of the flat layer 120 or the displacement of the light-shielding pattern layer 220 can be reduced, so that the required width of the light-shielding pattern layer 220 can be further reduced, thereby improving the pixel aperture ratio of the display device 10 and Display quality.

In addition, the first common electrode layer 140 of this embodiment can reduce the risk that the first data line DL1 affects the liquid crystal molecules in the display medium layer LC, further enhance the control of the liquid crystal molecules in the display device 10, and has good performance.

In addition, the display device 10 of this embodiment can also electrically connect the common electrode line 160 to the first common electrode layer 140 through the through hole 170 . In this way, the common electrode lines 160 can transmit signals through the first common electrode layer 140 . In this way, the risk of signal abnormality or failure due to disconnection of the common electrode line 160 can be reduced, so as to reduce the display area occupied by the through hole 170 , increase the display area of the display device 10 and improve the performance. Therefore, the display device 10 can not only reduce the probability of lateral light leakage and light mixing through the first common electrode layer 140 , but also improve the pixel aperture ratio, performance and display quality.

The following embodiments follow the component numbers and part of the contents of the previous embodiments, wherein the same numbers are used to represent the same or similar elements, and the part descriptions that omit the same technical content can refer to the previous embodiments, and the following embodiments will not be used again. Repeat.

FIG. 4 is a schematic partial top view of a display device according to another embodiment of the present invention. The display device 10A shown in this embodiment is similar to the display device 10 shown in FIG. 1 , and the main difference is that the first active element T1 ′ of the first pixel unit PX1 ′ is electrically connected to the first scan line SL1 , while the second active element T1 ′ of the first pixel unit PX1 ′ is electrically connected to the first scanning line SL1 . The pixel unit PX2 is electrically connected to the second scan line SL2, and both the first pixel unit PX1' and the second pixel unit PX2 are electrically connected to the first data line DL1. In other words, the display device 10A of the present embodiment includes, for example, a pixel array with a half source driving (HSD) structure. In this way, the adjacent first pixel unit PX1' and the second pixel unit PX2 can share the first data line DL1, so that the overall number of the data lines DL can be halved. In this way, in addition to reducing the space required for wirings such as the data lines DL and the like, so that the design of the peripheral circuits of the display device 10A has more margins, the number of driving elements (eg, driving chips) disposed around the display device 10B can also be reduced to reduce Reduce costs and shrink bezels.

In this embodiment, the first active element T1' includes a first gate G1', a first semiconductor channel layer CH1', and a first source S1' and a first source electrode S1' electrically connected to the first semiconductor channel layer CH1' respectively. Drain D1'. The structure and material of the first active element T1' are similar to those of the first active element T1 in FIG. 1 , and thus will not be repeated here. In this embodiment, the first active element T1' is electrically connected to the first data line DL1 through the first source electrode S1', but the invention is not limited to this. In this way, the display device 10A can obtain technical effects similar to those of the above-mentioned embodiments.

FIG. 5 is a schematic partial top view of a display device according to another embodiment of the present invention. The display device 10B shown in this embodiment is similar to the display device 10 shown in FIG. 1 , and the main difference is that: FIG. 5 shows an array in which a plurality of pixel units PX are arranged in a 3×4 manner. Specifically, FIG. 5 shows that four scan lines SL _n , SL _n+1 , SL _n+2 , SL _n+3 are arranged along the first direction Y and four data lines DL _n , DL _{n+1 , SL n+1} , DL _n+2 , DL _n+3 are arranged along the second direction X to be staggered with each other. 3 pixel units PX are arranged along the second direction X and 4 pixel units PX are arranged along the first direction Y, and each pixel unit PX is located between two scan lines and two data lines (for example, located in the scan line SL) _n , SL _n+1 and the data lines DL _n , DL _n+ , but not limited thereto). Each pixel unit PX includes an active element T and a pixel electrode PE. The structures and materials of the active element T and the pixel electrode PE are similar to those of the first active element T1 , the second active element T2 , the first pixel electrode PE1 , and the second pixel electrode PE2 in FIG. 1 , so they are not repeated here. In this embodiment, a plurality of pixel units PX located in the same column are electrically connected to the same scan line (eg, scan line SL _n ), and are respectively connected to corresponding data lines (eg, data lines DL _n , DL _n ) ₊₁ , DL _n+2 ), but not limited thereto. In addition, as shown in FIG. 5 , the pixel units PX of each column may overlap with the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , and 160 _n+3 . For example, the trunk 162 of the common electrode line 160 _n may be located between two adjacent scan lines (eg, scan lines SL _n , SL _n+1 ), but not limited thereto. It should be noted here that FIG. 5 only shows a part of the display device 10B, so the scan lines SL _n , SL _n+1 , SL _n+2 , SL _n+3 , and the data lines DL _n , DL _n+ of the present invention ₁ , DL _n+2 , DL _n+3 , the number of common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , 160 _n+3 and pixel electrodes PE are not limited to those shown in FIG. 5 .

In this embodiment, the first common electrode layer 140 ′ further has a fourth portion 144 extending along the second direction X. The fourth portion 144 is connected to the first portion 141 and overlaps the portion of the trunk 162 of the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , 160 _n+3 . In this embodiment, the through hole 170A can be disposed where the fourth portion 144 overlaps the trunk 162 to expose the trunk 162 so that the trunk 162 can be electrically connected to the fourth portion 164 through the through hole 170A. This is limited. As shown in FIG. 5 , the pixel electrode PE does not overlap the fourth portion 144 but partially overlaps the trunk 162 . In this way, the display device 10B can obtain technical effects similar to those of the above-mentioned embodiments.

In addition, a plurality of drive circuits 301 and 302 are provided in the display device 10B. The driving circuits 301 and 302 are, for example, chips to provide driving signals or reference signals to the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , and 160 _n+3 , where n is a positive integer. As shown in FIG. 5 , the two driving circuits 301 and 302 located on the left and right sides can be electrically connected to the corresponding common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , and 160 _n+3 , respectively. For example, the driver circuit 301 on the left side can be electrically connected to the common electrode lines _160n and 160n ₊₂ , and the driver circuit 302 on the right side can be electrically connected to the common electrode lines 160n ₊₁ and _{160n +3} . In other words, the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , 160 _n+3 do not need to be connected to the same driving circuit (eg, the driving circuit 301 or the driving circuit 302 ), so the driving circuit 301 can be improved , 302, and the margin of the surrounding trace settings. In some embodiments, the driving circuits 301 and 302 may be electrically connected to several of the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , and 160 _n+3 , respectively, but this is not the case in the present invention limit. In other words, not every common electrode line 160 _n , 160 _n+1 , 160 _n+2 , 160 _n+3 needs to be connected to the driving circuit 301 or the driving circuit 302 to provide signals. For example, only one, two or three of the four common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , and 160 _n+3 in FIG. 5 may be connected to the corresponding driving circuit 301 or driving circuit 302 . In other embodiments, only one common electrode line 160 _n may be connected to the left driving circuit 301 and only another common electrode line 160 _n+3 may be connected to the right driving circuit 302 . In still other embodiments, the driving circuit 301 (or the driving circuit 302 ) may be provided only on one side of the display device 10B, and only part or all of the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 and 160 _n+3 are electrically connected to the above-mentioned driving circuit 301 (or driving circuit 302 ).

Under the above arrangement, the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , and 160 _n+3 can be electrically connected to the first common electrode layer 140 ′, so as to transmit the transmission through the first common electrode layer 140 ′. Therefore, only part of the common electrode lines 160 _n , 160 _n+1 , 160 _n+2 , 160 _n+3 are electrically connected to the driving circuit 301 or the driving circuit 302 , and the above-mentioned signals can be transmitted to the common electrode lines 160 Any of _n , 160 _n+1 , 160 _n+2 , and 160 _n+3 . In this way, the wiring design of the display device 10B around the periphery can be more lenient, so that the mark frame can be further reduced, and the display quality can be improved.

FIG. 6 is an equivalent circuit diagram of a display device according to still another embodiment of the present invention. Please refer to FIG. 1 and FIG. 6 , the display device 10C shown in this embodiment is similar to the display device 10 shown in FIG. 1 , and the main difference is that the first pixel unit PX1 ″ includes a first sub-pixel area PX1A and a second sub-pixel area PX1 ″ The pixel area PX1B. In detail, the display device 10C includes a first scan line SL1 and a second scan line SL2 , a first data line DL1 interlaced with the first scan line SL1 and the second scan line SL2 , and a common electrode line 160 .

The first sub-pixel area PX1A in the first pixel unit PX1" includes a first sub-pixel electrode PE1A and a first active element T1A. The first sub-pixel electrode PE1A is electrically connected to the first data line DL1 through the first active element T1A and the second scan line SL2. The first active element T1A can also be electrically connected to the storage capacitor C1, but the invention is not limited to this. In this embodiment, the first active element T1A is electrically connected to the second scan line The control terminal of the line SL2. Therefore, the charge and discharge of the first sub-pixel electrode PE1A and the storage capacitor C1 are controlled by the second scan line SL2 through the first active element T1A.

The second sub-pixel region PX1B in the first pixel unit PX1" includes a second sub-pixel electrode PE1B, a second active element T1B and a third active element T1C. The second sub-pixel electrode PE1B is electrically connected through the second active element T1B to the first data line DL1 and the second scan line SL2. In this embodiment, the third active element T1C can also be connected to the second active element T1B in series and electrically connected to the first scan line SL1. The third active element T1C is electrically connected to the first scan line SL1. is electrically connected to the capacitor C _CS . Under the above setting, the second sub-pixel electrode PE1B can be electrically connected to the capacitor C _CS through the third active element T1C. As shown in FIG. 6 , the second active element T1B can also be electrically connected Connected to the storage capacitor C2, but the present invention is not limited to this. In this embodiment, the second active element T1B has a control terminal that is electrically connected to the second scan line SL2. Therefore, the second sub-pixel electrode PE1B is connected to the storage capacitor C2. The charge and discharge of the capacitor C2 is controlled by the second scan line SL2 through the second active element T1B. In addition, the third active element T1C has a control terminal that is electrically connected to the first scan line SL1. Therefore, the charge and discharge of the capacitor C _CS is controlled by The first scan line SL1 is controlled by the third active element T1C. Thereby, the second sub-pixel electrode PE1B and the capacitor C _CS can have associated charges Q to achieve the requirement of charge sharing.

To sum up, the display device of an embodiment of the present invention has the first common electrode layer arranged in a mesh shape, and in the direction perpendicular to the first substrate, the common electrode layer overlaps the data lines and partially overlaps the scan lines. Therefore, the common electrode layer overlaps the data lines and partially overlaps the scan lines. The display medium layer where the light-shielding pattern layer overlaps the data lines and the scan lines can be rotated by the electric field between the first common electrode layer and the second common electrode layer. In this way, the display medium layer can form an opaque area within the orthographic projection of the light shielding pattern layer 220 on the first substrate, so as to absorb or block the light obliquely penetrating the display medium layer from the first substrate. In this way, the probability of lateral light leakage and light mixing caused by the thickness of the flat layer or the displacement of the light shielding pattern layer can be reduced, thus further reducing the required width of the light shielding pattern layer, thereby improving the pixel aperture ratio and display quality of the display device.

In addition, the first common electrode layer can reduce the risk of the first data line affecting the liquid crystal molecules in the display medium layer, further improving the control of the liquid crystal molecules by the display device, and having good performance.

In addition, the display device of the present invention can also electrically connect the common electrode line to the first common electrode layer through the through hole. In this way, the common electrode lines can transmit signals through the first common electrode layer. Thereby, the risk of abnormal signal or failure of the common electrode line due to disconnection can be reduced, and through holes can be directly formed on the scan line or the corresponding pixel unit. In this way, in addition to increasing the display area of the display device and improving the performance, spacers can also be arranged corresponding to the through holes, so as to further improve the pixel aperture ratio of the corresponding color pixel unit and improve the display quality of the display device. Therefore, the display device can not only reduce the probability of lateral light leakage and light mixing through the first common electrode layer, but also improve the pixel aperture ratio, performance and display quality.

In addition, since the common electrode lines can be electrically connected to the first common electrode layer to transmit signals through the first common electrode layer, only part of the common electrode lines need to be electrically connected to the driving circuit to transmit the above-mentioned signals to the common electrodes anywhere on the line. In this way, the wiring design of the display device at the periphery can have more margin, so that the frame of the display device can be further reduced, and the display quality can be improved.

In addition, the display device of the present invention further includes a pixel array with a half-source driving structure, so that the overall number of data lines can be halved. In this way, in addition to reducing the space required for wiring such as data lines, and making the design of peripheral circuits of the display device more margin, it can also reduce the number of driving elements (such as driving chips) arranged around the display device, so as to reduce costs and reduce costs. Shrink the border.

In addition, the display panel of the present invention further connects the capacitor to the second sub-pixel electrode in series through the third active element. In this way, the charges associated with the second sub-pixel electrode and the capacitor can be redistributed to meet the requirement of charge sharing.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Of course, the present invention can also have other various embodiments, without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and deformations according to the present invention, but these corresponding changes and deformation should belong to the protection scope of the claims of the present invention.

Claims (19)

1. A display device, characterized in that, comprising: a first substrate; A plurality of data lines and a plurality of scan lines are disposed on the first substrate, the data lines extend along a first direction, the scan lines extend along a second direction, and the first direction is perpendicular to the second direction direction; A plurality of pixel units are disposed on the first substrate, and the pixel units are electrically connected to the scan lines and the data lines; A flat layer covers the data line; A first common electrode layer is disposed on the flat layer, and has a plurality of first portions extending along the first direction, and in a direction perpendicular to the first substrate, the first portions overlap the data lines; a second substrate disposed opposite to the first substrate; and A second common electrode layer is disposed on the second substrate and between the second substrate and the first common electrode layer. 2 . The display device of claim 1 , wherein the first common electrode layer further comprises a plurality of second portions extending along the second direction, and some of the second portions are connected to two adjacent ones. 3 . One of the first parts, and in a direction perpendicular to the first substrate, a part of the second part overlaps the scan lines. 3 . The display device of claim 1 , wherein each of the first portions of the first common electrode has a first width W1 , each of the data lines has a second width W2 , and W1≧ w2. 4. The display device of claim 1, wherein the scan line comprises a first scan line and a second scan line, the data line comprises a first data line, and the first data line Staggering the first scan line and the second scan line, wherein the pixel unit includes a first pixel unit located between the first scan line and the second scan line, and the first pixel unit is electrically connected to the first scan line Two scan lines. 5 . The display device of claim 4 , further comprising a common electrode line, the common electrode line is electrically connected to the first common electrode layer through a through hole. 6 . 6 . The display device of claim 5 , wherein the common electrode line has a trunk extending along the second direction and a fourth portion connected to the first portion, wherein the trunk portion overlaps the the first pixel electrode, the first data line and the fourth part overlapping the first common electrode layer, and where the trunk overlaps the fourth part, the trunk is electrically connected to the fourth part through the through hole . 7. The display device of claim 5, wherein the first common electrode layer further comprises a third portion extending along the second direction, and the common electrode line further comprises a third portion extending along the first direction and the first branch is connected to the trunk, the first pixel unit has a first corner adjacent to the second scan line and the first data line, wherein the third part is parallel to the second part, And the third part overlaps the first branch at the first corner, wherein where the first branch overlaps the third part, the first branch is electrically connected to the third part through the through hole. 8 . The display device of claim 7 , further comprising a spacer disposed on the second scan line corresponding to the first corner of the first pixel unit. 9 . 9 . The display device of claim 8 , wherein the first pixel unit corresponding to the spacer has a corresponding color of blue. 10 . 10. The display device according to claim 4, wherein the first pixel unit comprises a first sub-pixel region and a second sub-pixel region, the first sub-pixel region comprises a first sub-pixel electrode, The first sub-pixel electrode is electrically connected to the first data line through a first active element, the second sub-pixel region includes a second sub-pixel electrode, and the second sub-pixel electrode is electrically connected through a second active element is connected to the first data line, and the second sub-pixel electrode is also connected to a capacitor through a third active element. 11 . The display device according to claim 1 , wherein the pixel unit comprises a first pixel unit and a second pixel unit, and the first pixel unit and the second pixel unit are located in the same column and are opposite to each other. 12 . Adjacent, the first pixel unit is electrically connected to the first scan line, the second pixel unit is electrically connected to the second scan line, and the first pixel unit and the second pixel unit are electrically connected to the first data line . 12. A display device, comprising: a first substrate; A plurality of data lines and a plurality of scan lines are disposed on the first substrate, the data lines extend along a first direction, the scan lines extend along a second direction, and the first direction is perpendicular to the second direction direction; A first pixel unit and a second pixel unit are disposed on the first substrate, and the first pixel unit and the second pixel unit are electrically connected to the scan line and the data line, respectively; A flat layer covers the data line; A first common electrode layer is disposed on the flat layer, and has a plurality of first portions extending along the first direction, and in a direction perpendicular to the first substrate, the first portions overlap the data lines; A spacer is disposed on the flat layer, and in a direction perpendicular to the first substrate, the spacer overlaps one of the scan lines; a common electrode line, the common electrode line is electrically connected to the first common electrode layer through a through hole; a second substrate disposed opposite to the first substrate; and A second common electrode layer is disposed on the second substrate and between the second substrate and the first common electrode layer, The scan line includes a first scan line and a second scan line, the data line includes a first data line, and the first data line intersects the first scan line and the second scan line, and the first data line intersects the first scan line and the second scan line. A pixel unit and the second pixel unit are located between the first scan line and the second scan line, wherein the first pixel unit has a first corner adjacent to the second scan line and the first data line, wherein the spacer is adjacent to the first corner of the first pixel unit, Wherein, in the first direction, the distance between the spacer and the through hole is 2 micrometers to 10 micrometers. 13 . The display device of claim 12 , wherein the first pixel unit is electrically connected to the first scan line, the second pixel unit is connected to the second scan line, and the first pixel unit is connected to the first scan line. 14 . The two pixel units are electrically connected to the first data line and are located in the same column and adjacent to each other. 14. The display device of claim 13, wherein the second pixel unit has a second corner adjacent to the second scan line and the first data line, and the first corner and the second corner are respectively A second active element of the second pixel unit is located on both sides of the first data line and is adjacent to the second corner. 15. The display device of claim 12, wherein the first pixel unit comprises a first sub-pixel region and a second sub-pixel region, the first sub-pixel region comprises a first sub-pixel electrode, The first sub-pixel electrode is electrically connected to the first data line through a first active element, the second sub-pixel region includes a second sub-pixel electrode, and the second sub-pixel electrode is electrically connected through a second active element is connected to the first data line, and the second sub-pixel electrode is also connected to a capacitor through a third active element. 16. The display device of claim 12, wherein the through hole and the spacer are adjacent to the first corner of the first pixel. 17. The display device of claim 16, wherein the first pixel unit corresponds to a first color, the second pixel unit corresponds to a second color, the first color is different from the second color, and The through hole and the spacer are arranged corresponding to the first color. 18 . The display device of claim 12 , further comprising a driving circuit, wherein there are a plurality of common electrode lines, and the driving circuit is electrically connected to a portion of the common electrode line. 19 . 19. The display device of claim 12, wherein the first common electrode layer and the second common electrode layer are electrically connected to a common voltage potential.

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