[go: up one dir, main page]

CN110571314B - Reverse voltage-stabilizing LED chip and preparation method thereof - Google Patents

Reverse voltage-stabilizing LED chip and preparation method thereof Download PDF

Info

Publication number
CN110571314B
CN110571314B CN201910912027.0A CN201910912027A CN110571314B CN 110571314 B CN110571314 B CN 110571314B CN 201910912027 A CN201910912027 A CN 201910912027A CN 110571314 B CN110571314 B CN 110571314B
Authority
CN
China
Prior art keywords
light
emitting structure
electrode
led chip
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910912027.0A
Other languages
Chinese (zh)
Other versions
CN110571314A (en
Inventor
王硕
庄家铭
崔永进
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Foshan Nationstar Semiconductor Co Ltd
Original Assignee
Foshan Nationstar Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Foshan Nationstar Semiconductor Co Ltd filed Critical Foshan Nationstar Semiconductor Co Ltd
Priority to CN201910912027.0A priority Critical patent/CN110571314B/en
Publication of CN110571314A publication Critical patent/CN110571314A/en
Application granted granted Critical
Publication of CN110571314B publication Critical patent/CN110571314B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/813Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/819Bodies characterised by their shape, e.g. curved or truncated substrates
    • H10H20/821Bodies characterised by their shape, e.g. curved or truncated substrates of the light-emitting regions, e.g. non-planar junctions

Landscapes

  • Led Devices (AREA)

Abstract

The invention discloses a reverse voltage-stabilizing LED chip, which comprises: the device comprises a substrate, an epitaxial layer, a first etching channel, a first light-emitting structure and at least one second light-emitting structure; the epitaxial layer is arranged on the substrate and is divided into a first area and a second area through a first etching channel etched to the substrate; the first light-emitting structure is arranged in the first area; the second light-emitting structure is arranged in the second area; the first light-emitting structure and the second light-emitting structure are mutually connected in series; and the current transmission directions of the first light-emitting structure and the second light-emitting structure are opposite. According to the invention, the plurality of second light-emitting structures are connected in series, so that the reverse breakdown voltage can be increased to 3n V (n is the number of the second light-emitting structures), the safety and the reliability of the LED chip are greatly improved when reverse current exists, and the LED chip can be applied to a plurality of different use occasions.

Description

一种反向稳压LED芯片及其制备方法A reverse voltage stabilizing LED chip and its preparation method

技术领域Technical Field

本发明涉及发光二极管技术领域,尤其涉及一种反向稳压LED芯片及其制备方法。The invention relates to the technical field of light emitting diodes, and in particular to a reverse voltage stabilizing LED chip and a preparation method thereof.

背景技术Background technique

LED又称发光二极管,是半导体二极管的一种,其具有单向导电性。当在LED芯片外加反向电压不超过一定范围时,通过二极管的电流是少数载流子漂移运动所形成反向电流,这种反向电流很小,二极管处于截止状态。这个反向电流又称为反向饱和电流或漏电流。但当外加反向电压超过某一数值时,反向电流会突然增大,这种现象称为电击穿。引起电击穿的临界电压称为二极管反向击穿电压。电击穿时二极管失去单向导电性,如果二极管没有因电击穿而引起过热,则单向导电性不一定会被永久破坏,在撤除外加电压后,其性能仍可恢复,否则二极管就会彻底失去单向导电性,被永久损坏了。因而使用时应避免二极管外加的反向电压过高。LED, also known as light-emitting diode, is a type of semiconductor diode with unidirectional conductivity. When the reverse voltage applied to the LED chip does not exceed a certain range, the current passing through the diode is the reverse current formed by the drift movement of minority carriers. This reverse current is very small and the diode is in the cut-off state. This reverse current is also called reverse saturation current or leakage current. However, when the applied reverse voltage exceeds a certain value, the reverse current will suddenly increase. This phenomenon is called electrical breakdown. The critical voltage that causes electrical breakdown is called the diode reverse breakdown voltage. During electrical breakdown, the diode loses its unidirectional conductivity. If the diode does not overheat due to electrical breakdown, the unidirectional conductivity may not be permanently destroyed. After the applied voltage is removed, its performance can still be restored. Otherwise, the diode will completely lose its unidirectional conductivity and be permanently damaged. Therefore, when using the diode, avoid applying too high a reverse voltage to it.

由于在现有使用场合中,很少会出现反向电压的情景,因此现有的LED芯片往往不进行反向保护电路的设计。一种经常出现反向电流的场合是在测试芯片是否漏电时,由于LED芯片漏电通过正向施加电压是无法区分的,故采用反向施加电压的方法来测试;但在这种测试场合中,由于LED的正向电压通常小于4V,所以反向测试电压只要略大于正向电压就可以了,所以业界规定用5V电压,但这个5V电压绝不是指反向击穿电压。因此,仅仅满足在5V反向电压下不漏电是远远不足以证明其安全性的,使得现有的LED芯片多无法应用在反向电流较大的使用场合,安全性较低。Since reverse voltage rarely occurs in existing use cases, existing LED chips are often not designed with reverse protection circuits. One situation where reverse current often occurs is when testing whether the chip is leaking. Since the leakage of the LED chip cannot be distinguished by applying a forward voltage, the reverse voltage is used for testing; but in this test situation, since the forward voltage of the LED is usually less than 4V, the reverse test voltage only needs to be slightly greater than the forward voltage, so the industry stipulates that a 5V voltage is used, but this 5V voltage does not refer to the reverse breakdown voltage. Therefore, simply satisfying the requirement of no leakage under a 5V reverse voltage is far from sufficient to prove its safety, making most existing LED chips unable to be used in situations with large reverse currents, and having low safety.

发明内容Summary of the invention

本发明所要解决的技术问题在于,提供一种反向稳压LED芯片,其反向击穿电压高,可有效避免反向电流损坏LED芯片,提升LED芯片可靠性。The technical problem to be solved by the present invention is to provide a reverse voltage-stabilized LED chip, which has a high reverse breakdown voltage and can effectively prevent the reverse current from damaging the LED chip, thereby improving the reliability of the LED chip.

本发明还要解决的技术问题在于,提供一种反向稳压LED芯片的制备方法。Another technical problem to be solved by the present invention is to provide a method for preparing a reverse voltage-stabilized LED chip.

为了解决上述技术问题,本发明提供了一种反向稳压LED芯片,其包括:衬底、外延层、第一刻蚀道、第一发光结构和至少一个第二发光结构;所述外延层设于所述衬底上,并通过刻蚀至所述衬底的第一刻蚀道分为第一区域与第二区域;In order to solve the above technical problems, the present invention provides a reverse voltage-stabilized LED chip, which comprises: a substrate, an epitaxial layer, a first etched path, a first light-emitting structure and at least one second light-emitting structure; the epitaxial layer is arranged on the substrate and is divided into a first region and a second region by etching the first etched path to the substrate;

所述第一发光结构设于所述第一区域;所述第二发光结构设于所述第二区域;所述第一发光结构和第二发光结构串联;且所述第一发光结构和第二发光结构电流传输方向相反。The first light emitting structure is disposed in the first region; the second light emitting structure is disposed in the second region; the first light emitting structure and the second light emitting structure are connected in series; and current transmission directions of the first light emitting structure and the second light emitting structure are opposite.

作为上述技术方案的改进,还包括第一二次电极和第二二次电极;As an improvement of the above technical solution, it also includes a first secondary electrode and a second secondary electrode;

所述第一发光结构包括第一电极和第二电极,所述第二发光结构包括第三电极和第四电极;The first light emitting structure includes a first electrode and a second electrode, and the second light emitting structure includes a third electrode and a fourth electrode;

所述第一电极和所述第四电极通过横跨所述第一刻蚀道的所述第二二次电极实现电连接;The first electrode and the fourth electrode are electrically connected via the second secondary electrode spanning the first etched path;

所述第二电极和所述第三电极通过横跨所述第一刻蚀道的所述第一二次电极实现电连接。The second electrode and the third electrode are electrically connected via the first secondary electrode straddling the first etched street.

作为上述技术方案的改进,所述第二区域还设有第二刻蚀道和第三二次电极;所述第二刻蚀道刻蚀至所述衬底;As an improvement of the above technical solution, the second region is further provided with a second etching path and a third secondary electrode; the second etching path is etched to the substrate;

相邻的第二发光结构通过所述第二刻蚀道隔开,并通过所述第三二次电极实现电连接。Adjacent second light emitting structures are separated by the second etched path and are electrically connected through the third secondary electrode.

作为上述技术方案的改进,所述第一区域的面积:第二区域的面积为(2~5):(0.5~1.5)。As an improvement of the above technical solution, the area of the first region: the area of the second region is (2-5): (0.5-1.5).

作为上述技术方案的改进,所述第二区域设有2~8个第二发光结构和1~7条第二刻蚀道。As an improvement of the above technical solution, the second region is provided with 2 to 8 second light-emitting structures and 1 to 7 second etching tracks.

作为上述技术方案的改进,所述第一刻蚀道和第二刻蚀道侧壁具有倾斜角度。As an improvement of the above technical solution, the side walls of the first etching path and the second etching path have an inclined angle.

作为上述技术方案的改进,所述倾斜角度≤60度。As an improvement of the above technical solution, the inclination angle is ≤60 degrees.

作为上述技术方案的改进,所述第一发光结构和第二发光结构还包括电流阻挡层、电流扩散层和钝化层。As an improvement of the above technical solution, the first light-emitting structure and the second light-emitting structure further include a current blocking layer, a current diffusion layer and a passivation layer.

作为上述技术方案的改进,所述第一发光结构和第二发光结构平行设置。As an improvement of the above technical solution, the first light-emitting structure and the second light-emitting structure are arranged in parallel.

相应的,本发明还公开了一种上述的反向稳压LED芯片的制备方法,其包括:Correspondingly, the present invention also discloses a method for preparing the above-mentioned reverse voltage-stabilized LED chip, which comprises:

(1)提供一衬底,在所述衬底上形成外延层;(1) providing a substrate and forming an epitaxial layer on the substrate;

(2)在所述外延层上形成第一裸露区域和第二裸露区域;(2) forming a first exposed region and a second exposed region on the epitaxial layer;

(3)形成第一刻蚀道;(3) forming a first etching path;

(4)形成第一发光结构和第二发光结构;(4) forming a first light-emitting structure and a second light-emitting structure;

(5)将所述第一发光结构和第二发光结构相互串联;即得到反向稳压LED芯片成品。(5) The first light-emitting structure and the second light-emitting structure are connected in series to obtain a finished reverse voltage-stabilized LED chip.

实施本发明,具有如下有益效果:The implementation of the present invention has the following beneficial effects:

本发明的LED芯片在衬底表面设计了电流传输方向相反的两种发光结构——第一发光结构和第二发光结构;其中,多个第二发光结构相互串联,可将反向击穿电压提高至3nV(其中,n为第二发光结构的个数),大幅提升了有反向电流存在时,LED芯片的安全性、可靠性,使得本发明中的LED芯片可应用于多种不同的使用场合。The LED chip of the present invention is designed with two light-emitting structures with opposite current transmission directions on the substrate surface - a first light-emitting structure and a second light-emitting structure; wherein, multiple second light-emitting structures are connected in series, which can increase the reverse breakdown voltage to 3nV (where n is the number of second light-emitting structures), greatly improving the safety and reliability of the LED chip when reverse current exists, so that the LED chip of the present invention can be applied to a variety of different usage scenarios.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

图1是本发明一实施例中反向稳压LED芯片的结构示意图;FIG1 is a schematic diagram of the structure of a reverse voltage-stabilized LED chip according to an embodiment of the present invention;

图2是图1中A-A方向的剖视图;Fig. 2 is a cross-sectional view taken along the A-A direction in Fig. 1;

图3是图1中B-B方向的剖视图;Fig. 3 is a cross-sectional view taken along the B-B direction in Fig. 1;

图4是图1中C-C方向的剖视图;Fig. 4 is a cross-sectional view taken along the C-C direction in Fig. 1;

图5是本发明另一实施例中反向稳压LED芯片的结构示意图;FIG5 is a schematic structural diagram of a reverse voltage-stabilized LED chip in another embodiment of the present invention;

图6是图5中A-A方向的剖视图;Fig. 6 is a cross-sectional view taken along the A-A direction in Fig. 5;

图7是图5中B-B方向的剖视图;Fig. 7 is a cross-sectional view taken along the B-B direction in Fig. 5;

图8是图5中C-C方向的剖视图;Fig. 8 is a cross-sectional view taken along the C-C direction in Fig. 5;

图9是本发明一种反向稳压LED芯片的制备方法流程图。FIG. 9 is a flow chart of a method for preparing a reverse voltage-stabilized LED chip according to the present invention.

具体实施方式Detailed ways

为使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明作进一步地详细描述。仅此声明,本发明在文中出现或即将出现的上、下、左、右、前、后、内、外等方位用词,仅以本发明的附图为基准,其并不是对本发明的具体限定。In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings. It is hereby stated that the directional terms such as up, down, left, right, front, back, inside, outside, etc. that appear or will appear in the text of the present invention are only based on the accompanying drawings of the present invention, and are not specific limitations of the present invention.

参见图1至图4,本实施例提供了一种反向稳压LED芯片,其包括:衬底1,外延层2、第一刻蚀道3、第一发光结构4和至少一个第二发光结构5。其中,外延层2设置在衬底1上,第一刻蚀道3设置在外延层2上;外延层2通过刻蚀至衬底1的第一刻蚀道3分为第一区域21和第二区域22。第一发光结构4设置在第一区域21,第二发光结构5设置在第二区域22。第一发光结构4和第二发光结构5串联;且两者的电流传输方向相反。本发明在LED芯片上设计了两种发光结构,其电流传输方向相反,相当于在LED芯片结构中加入了一额外的保护电路,避免反向电压所造成的芯片损坏。Referring to Figures 1 to 4, this embodiment provides a reverse voltage-stabilized LED chip, which includes: a substrate 1, an epitaxial layer 2, a first etching path 3, a first light-emitting structure 4, and at least one second light-emitting structure 5. Among them, the epitaxial layer 2 is arranged on the substrate 1, and the first etching path 3 is arranged on the epitaxial layer 2; the epitaxial layer 2 is divided into a first area 21 and a second area 22 by etching the first etching path 3 to the substrate 1. The first light-emitting structure 4 is arranged in the first area 21, and the second light-emitting structure 5 is arranged in the second area 22. The first light-emitting structure 4 and the second light-emitting structure 5 are connected in series; and the current transmission directions of the two are opposite. The present invention designs two light-emitting structures on the LED chip, and the current transmission directions of the two are opposite, which is equivalent to adding an additional protection circuit to the LED chip structure to avoid chip damage caused by reverse voltage.

具体的,参见图2,外延层2从下到上依次包括第一半导体层23、有源层24和第二半导体层25;本发明对于外延层的具体类型不做特殊限制,本领域技术人员可根据具体的LED芯片类型进行选用。具体的,在本实施例之中,外延层2为GaN型半导体层,第一半导体层23为N-GaN层,第二半导体层为P-GaN层。Specifically, referring to FIG. 2 , the epitaxial layer 2 includes a first semiconductor layer 23, an active layer 24, and a second semiconductor layer 25 from bottom to top; the present invention does not impose any special restrictions on the specific type of the epitaxial layer, and those skilled in the art can select it according to the specific type of LED chip. Specifically, in this embodiment, the epitaxial layer 2 is a GaN-type semiconductor layer, the first semiconductor layer 23 is an N-GaN layer, and the second semiconductor layer is a P-GaN layer.

具体的,参见图2、图3,在本实施例之中,第一发光结构4包括第一电极41和第二电极43,其中,第一电极41与第一半导体层23连接,第二电极43与第二半导体层24连接。第二发光结构5包括第三电极51和第四电极52,第三电极51与第一半导体层23连接,第四电极52与第二半导体层24连接。第一发光结构4和第二发光结构5通过刻蚀至衬底1的第一刻蚀道3隔开;使得第一电极41与第三电极51,第二电极42与第四电极52在外延层2上实现绝缘。Specifically, referring to FIG. 2 and FIG. 3 , in this embodiment, the first light emitting structure 4 includes a first electrode 41 and a second electrode 43, wherein the first electrode 41 is connected to the first semiconductor layer 23, and the second electrode 43 is connected to the second semiconductor layer 24. The second light emitting structure 5 includes a third electrode 51 and a fourth electrode 52, wherein the third electrode 51 is connected to the first semiconductor layer 23, and the fourth electrode 52 is connected to the second semiconductor layer 24. The first light emitting structure 4 and the second light emitting structure 5 are separated by a first etching path 3 etched to the substrate 1, so that the first electrode 41 and the third electrode 51, and the second electrode 42 and the fourth electrode 52 are insulated on the epitaxial layer 2.

具体的,参见图1、图3、图4;在本实施例之中,还包括第一二次电极6和第二二次电极7。其中,第一二次电极6横跨过第一刻蚀道3,并连接第一电极41和第四电极52;第二二次电极7横跨过第一刻蚀道3,并连接第二电极42和第三电极51;通过第一二次电极6和第二二次电极7的连接,使得第一发光结构4和第二发光结构5相互串联;且使得两者电流传输方向相反。Specifically, referring to FIG. 1 , FIG. 3 , and FIG. 4 ; in this embodiment, a first secondary electrode 6 and a second secondary electrode 7 are further included. The first secondary electrode 6 crosses the first etching path 3 and connects the first electrode 41 and the fourth electrode 52 ; the second secondary electrode 7 crosses the first etching path 3 and connects the second electrode 42 and the third electrode 51 ; through the connection between the first secondary electrode 6 and the second secondary electrode 7 , the first light emitting structure 4 and the second light emitting structure 5 are connected in series with each other; and the current transmission directions of the two are opposite.

具体的,在本发明中,LED芯片表面设有n个第二发光结构5,具体的,2≤n≤8;通过n个第二发光结构,可将LED芯片的反向击穿电压提高至3n V。优选的,2≤n≤5;进一步优选的,n=3。本发明对于第二发光结构5的个数不做特殊限制,本领域技术人员可根据具体的使用场合选用。Specifically, in the present invention, n second light-emitting structures 5 are provided on the surface of the LED chip, specifically, 2≤n≤8; the reverse breakdown voltage of the LED chip can be increased to 3n V by n second light-emitting structures. Preferably, 2≤n≤5; further preferably, n=3. The present invention does not impose any special restrictions on the number of the second light-emitting structures 5, and those skilled in the art can select according to the specific application occasion.

具体的,参见图2,在本实施例之中,LED芯片表面设有2个第二发光结构5;第二发光结构5通过贯穿至衬底1的第二刻蚀道8,以使得不同第二发光结构在外延层2上不互相导通。进一步的,在LED芯片表面还设有第三二次电极9,其横跨第二刻蚀道8,并将相邻第二发光结构5的第三电极51与第四电极52连接,以实现相邻第二发光结构5的相互串联。Specifically, referring to FIG. 2 , in this embodiment, two second light-emitting structures 5 are provided on the surface of the LED chip; the second light-emitting structures 5 pass through the second etching path 8 that penetrates the substrate 1, so that different second light-emitting structures are not mutually conductive on the epitaxial layer 2. Furthermore, a third secondary electrode 9 is provided on the surface of the LED chip, which spans the second etching path 8 and connects the third electrode 51 of the adjacent second light-emitting structure 5 with the fourth electrode 52, so as to realize the mutual series connection of the adjacent second light-emitting structures 5.

需要说明的是,在LED芯片表面设置相反的发光结构虽然能提高LED芯片的反向击穿电压,提升其安全性。但反向发光结构也会占用LED芯片表面面积,导致发光面积减少,LED光效下降。因此,为了平衡光效以及反向稳压作用,需要对两种发光结构所占面积进行控制。具体的,在本发明中,控制第一区域21面积:第二区域22的面积为(2~5):(0.5~1.5);其中,第一区域21用于形成第一发光结构4,其主要用于正向导通情况下发光;第二区域22用于形成第二发光结构5,其主要用于反向导通情况下提升反向击穿电压。控制第一区域与第二区域的比例,可有效提升LED芯片的亮度。优选的,第一区域的面积:第二区域的面积为(2~5):1。It should be noted that although setting an opposite light-emitting structure on the surface of the LED chip can increase the reverse breakdown voltage of the LED chip and improve its safety. However, the reverse light-emitting structure will also occupy the surface area of the LED chip, resulting in a reduction in the light-emitting area and a decrease in the LED light efficiency. Therefore, in order to balance the light efficiency and the reverse voltage stabilization effect, it is necessary to control the area occupied by the two light-emitting structures. Specifically, in the present invention, the area of the first region 21: the area of the second region 22 is controlled to be (2~5): (0.5~1.5); wherein the first region 21 is used to form a first light-emitting structure 4, which is mainly used for emitting light under forward conduction; the second region 22 is used to form a second light-emitting structure 5, which is mainly used to increase the reverse breakdown voltage under reverse conduction. Controlling the ratio of the first region to the second region can effectively improve the brightness of the LED chip. Preferably, the area of the first region: the area of the second region is (2~5):1.

进一步的,为了提升LED芯片的亮度,将第一发光结构与第二发光结构平行设置,以实现LED芯片表面面积的充分利用。Furthermore, in order to improve the brightness of the LED chip, the first light-emitting structure and the second light-emitting structure are arranged in parallel to achieve full utilization of the surface area of the LED chip.

进一步的,为了提升LED芯片的亮度,在第一刻蚀道3和第二刻蚀道8的侧壁设有倾斜角度,其能够提升LED芯片的侧边出光效率,提升亮度。具体的,所述倾斜角度≤60度;优选的为30~50度。Furthermore, in order to improve the brightness of the LED chip, the side walls of the first etching path 3 and the second etching path 8 are provided with an inclined angle, which can improve the side light extraction efficiency of the LED chip and improve the brightness. Specifically, the inclined angle is ≤60 degrees, preferably 30 to 50 degrees.

此外,参考图4~图8,在本发明的另一实施例之中,为了提升LED芯片的整体性能,第一发光结构4和第二发光结构5还包括电流阻挡层43/53,透明导电层44/54,钝化层45/55。其中,电流阻挡层43/53设置在第一电极41、第三电极51与第二半导体层25之间,其可有效防止电流或芯片面积过大时击穿及电流拥挤。透明导电层44/54设置在第二半导体层25、电流阻挡层43/53与第一电极41、第三电极51之间,其可起到扩展电流分布的作用。钝化层45/55设置在LED芯片表面整面,其在第一电极、第二电极、第三电极、第四电极区域设有孔洞,以暴露出电极。In addition, referring to Figures 4 to 8, in another embodiment of the present invention, in order to improve the overall performance of the LED chip, the first light-emitting structure 4 and the second light-emitting structure 5 further include a current blocking layer 43/53, a transparent conductive layer 44/54, and a passivation layer 45/55. Among them, the current blocking layer 43/53 is arranged between the first electrode 41, the third electrode 51 and the second semiconductor layer 25, which can effectively prevent breakdown and current crowding when the current or chip area is too large. The transparent conductive layer 44/54 is arranged between the second semiconductor layer 25, the current blocking layer 43/53 and the first electrode 41, the third electrode 51, which can play a role in expanding the current distribution. The passivation layer 45/55 is arranged on the entire surface of the LED chip, and holes are provided in the first electrode, the second electrode, the third electrode, and the fourth electrode regions to expose the electrodes.

相应的,参考图9,本发明还公开了一种上述反向稳压LED芯片的制备方法,其包括以下步骤:Correspondingly, referring to FIG. 9 , the present invention further discloses a method for preparing the above-mentioned reverse voltage-stabilized LED chip, which comprises the following steps:

S100:提供一衬底,在衬底上形成外延层;S100: providing a substrate, and forming an epitaxial layer on the substrate;

具体的,衬底1材料可以为蓝宝石、碳化硅或硅,也可以为其他半导体材料,优选的,本发明选用蓝宝石衬底。Specifically, the substrate 1 may be made of sapphire, silicon carbide or silicon, or other semiconductor materials. Preferably, the present invention uses a sapphire substrate.

具体的,采用金属有机化学气相沉积(MOCVD)法在基片上依次形成第一半导体层23、有源层24和第二半导体层25,得到外延层2;但不限于上述方法。Specifically, the first semiconductor layer 23, the active layer 24 and the second semiconductor layer 25 are sequentially formed on the substrate by metal organic chemical vapor deposition (MOCVD) to obtain the epitaxial layer 2; but the method is not limited to the above method.

S200:在外延层上形成第一裸露区域和第二裸露区域;S200: forming a first exposed region and a second exposed region on the epitaxial layer;

具体的,S200包括:Specifically, S200 includes:

S201:在外延层表面形成第一光刻胶;S201: forming a first photoresist on the surface of the epitaxial layer;

其中,第一光刻胶可以是正性光刻胶,也可以是负性光刻胶;Wherein, the first photoresist may be a positive photoresist or a negative photoresist;

S202:对第一光刻胶进行曝光,形成第一曝光区;S202: exposing the first photoresist to form a first exposure area;

具体的,通过曝光经光源作用将原始底片上的图案转移到感光底板上,然后去除曝光区域或未曝光区域的光刻胶。Specifically, the pattern on the original film is transferred to the photosensitive plate through exposure via the light source, and then the photoresist in the exposed area or the unexposed area is removed.

光刻形成第一图形光刻区,形成第一发光结构裸露区域与第二发光结构裸露区域,检查两个发光结构正负极,确保反向排布;Photolithography forms a first pattern photolithography area, forms a first light-emitting structure exposed area and a second light-emitting structure exposed area, and checks the positive and negative electrodes of the two light-emitting structures to ensure reverse arrangement;

S203:对第一曝光区进行蚀刻,形成第一裸露区域和第二裸露区域;S203: etching the first exposed area to form a first exposed area and a second exposed area;

其中,可采用干法蚀刻对外延层进行蚀刻,干式蚀刻能够对关键尺寸形成良好控制,保证均匀性,但不限于上述蚀刻工艺。Among them, dry etching can be used to etch the epitaxial layer. Dry etching can form good control over key dimensions and ensure uniformity, but is not limited to the above etching process.

S204:去除第一光刻胶。S204: removing the first photoresist.

S300:形成第一刻蚀道;S300: forming a first etching path;

具体的,步骤S300包括:Specifically, step S300 includes:

S301:在外延层表面形成第二光刻胶;S301: forming a second photoresist on the surface of the epitaxial layer;

S302:对第二光刻胶进行曝光,形成第二曝光区;S302: exposing the second photoresist to form a second exposure area;

S303:对第二曝光区进行蚀刻;S303: etching the second exposure area;

具体的,可采用干法蚀刻对外延层进行蚀刻,干式蚀刻能够对关键尺寸形成良好控制,保证均匀性,但不限于上述蚀刻工艺。Specifically, the epitaxial layer may be etched by dry etching, which can form good control over key dimensions and ensure uniformity, but is not limited to the above etching process.

具体的,为了提升本发明中第一发光结构4和第二发光结构5的连接稳定性,第一刻蚀道3的侧壁具有一定的倾斜角度,这种结构的第一蚀刻道3也可提升发光结构的侧边出光效率,提升芯片的出光效率。优选的,所述倾斜角≤60度,角度过大时,金属薄膜难以成型,在后期蒸镀二次电极过程中容易断线。优选的,所述倾斜角为30-50度,此角度能够保证电极蒸镀不断线,同时较高幅度地提升芯片的出光效率。Specifically, in order to improve the connection stability between the first light-emitting structure 4 and the second light-emitting structure 5 in the present invention, the side wall of the first etching path 3 has a certain inclination angle. The first etching path 3 of this structure can also improve the side light extraction efficiency of the light-emitting structure and improve the light extraction efficiency of the chip. Preferably, the inclination angle is ≤60 degrees. When the angle is too large, the metal film is difficult to form and is prone to breakage during the subsequent evaporation of the secondary electrode. Preferably, the inclination angle is 30-50 degrees. This angle can ensure that the electrode is not broken during evaporation and at the same time greatly improve the light extraction efficiency of the chip.

进一步的,为了保障第一发光结构4和第二发光结构5之间的连接稳固性,所述第一蚀刻道3的宽度设置为10-20μm;深刻蚀道宽度过窄,会导致倾斜角过大,容易断线;深刻蚀道过宽,会减小发光面积,降低芯片出光效率。优选的,所述第一蚀刻道3的宽度设置为12-18μm;进一步优选的为16μm,此宽度的第一刻蚀道3能够保证LED芯片具有较高的出光效率,同时确保第一发光结构4和第二发光结构5之间的连接稳固性。Furthermore, in order to ensure the connection stability between the first light-emitting structure 4 and the second light-emitting structure 5, the width of the first etching path 3 is set to 10-20μm; if the width of the deep etching path is too narrow, the tilt angle will be too large and the wire will be easily broken; if the deep etching path is too wide, the light-emitting area will be reduced and the chip light extraction efficiency will be reduced. Preferably, the width of the first etching path 3 is set to 12-18μm; further preferably, it is 16μm. The first etching path 3 with this width can ensure that the LED chip has a high light extraction efficiency and ensure the connection stability between the first light-emitting structure 4 and the second light-emitting structure 5.

S304:去除第二光刻胶。S304: removing the second photoresist.

S400:形成第一发光结构和第二发光结构;S400: forming a first light-emitting structure and a second light-emitting structure;

具体的,S400包括:Specifically, S400 includes:

S410:在外延层表面形成电流阻挡层;S410: forming a current blocking layer on the surface of the epitaxial layer;

具体的,S410包括:Specifically, S410 includes:

S411:沉积电流阻挡层;S411: depositing a current blocking layer;

具体的,可选用二氧化硅作为电流阻挡层,其具有较好的透光性;但不限于二氧化硅。Specifically, silicon dioxide can be selected as the current blocking layer, which has good light transmittance; but it is not limited to silicon dioxide.

S412:在电流阻挡层表面形成第三光刻胶;S412: forming a third photoresist on the surface of the current blocking layer;

S413:对第三光刻胶进行曝光,形成第三曝光区;S413: exposing the third photoresist to form a third exposure area;

S414:对曝光区进行蚀刻;S414: etching the exposure area;

S415:去除第三光刻胶;得到电流阻挡层成品。S415: removing the third photoresist; obtaining a finished current blocking layer.

具体的,电流阻挡层设计时,可以在一次电极下方开孔,防止电极由于氧化硅的原因脱落,电流阻挡层的外围要大于一次电极5um,这样既可以起到电流阻挡的作用又可以不影响其他地方光的传输;Specifically, when designing the current blocking layer, a hole can be opened under the primary electrode to prevent the electrode from falling off due to silicon oxide. The periphery of the current blocking layer should be 5um larger than the primary electrode, so that it can play the role of current blocking without affecting the transmission of light in other places.

S420:形成透明导电层;S420: forming a transparent conductive layer;

具体的,S420包括:Specifically, S420 includes:

S421:沉积透明导电层;S421: depositing a transparent conductive layer;

具体的,可选用氧化铟锡作为透明导电层,但不限于此;Specifically, indium tin oxide can be used as the transparent conductive layer, but is not limited thereto;

S422:在透明导电层表面形成第四光刻胶;S422: forming a fourth photoresist on the surface of the transparent conductive layer;

S423:对第四光刻胶进行曝光,形成第四曝光区;S423: exposing the fourth photoresist to form a fourth exposure area;

S424:对曝光区进行蚀刻;S424: etching the exposure area;

具体的,采用湿式蚀刻对透明导电层进行刻蚀。具体的,采用氯化铁与盐酸的混合溶液对透明导电层进行刻蚀,刻蚀时间为150-220s,此刻蚀时间不仅能够对电流扩散层进行充分刻蚀,同时能够保证不大幅降低ITO层的整体厚度,影响芯片的电流扩展性。Specifically, wet etching is used to etch the transparent conductive layer. Specifically, a mixed solution of ferric chloride and hydrochloric acid is used to etch the transparent conductive layer, and the etching time is 150-220s. This etching time can not only fully etch the current diffusion layer, but also ensure that the overall thickness of the ITO layer is not greatly reduced, which affects the current expansion of the chip.

S425:去除第四光刻胶,形成透明导电层。S425: removing the fourth photoresist to form a transparent conductive layer.

具体的,在透明导电层设计时,根据第二半导体层的具体宽度,设置透明导电层内缩至少2μm;这样既可以起到电流扩散的作用,又可以避免透明导电层接触侧壁,导致LED芯片漏电;Specifically, when designing the transparent conductive layer, the transparent conductive layer is set to shrink by at least 2 μm according to the specific width of the second semiconductor layer; this can not only play a role in current diffusion, but also prevent the transparent conductive layer from contacting the side wall, causing leakage of the LED chip;

S430:形成第一电极、第二电极、第三电极和第四电极;S430: forming a first electrode, a second electrode, a third electrode and a fourth electrode;

具体的,S430包括:Specifically, S430 includes:

S431:在外延层表面形成第五光刻胶;S431: forming a fifth photoresist on the surface of the epitaxial layer;

S432:对第五光刻胶进行曝光,形成第五曝光区;S432: exposing the fifth photoresist to form a fifth exposure area;

S433:对第五曝光区进行一次电极蒸镀;S433: performing electrode evaporation on the fifth exposure area;

其中,采用电子束蒸镀、热蒸镀或磁控溅射工艺进行一次电极的蒸镀,但不限于此。The primary electrode is deposited by electron beam evaporation, thermal evaporation or magnetron sputtering, but is not limited thereto.

S444:撕金并去除第五光刻胶,得到第一电极、第二电极、第三电极和第四电极。S444: tear off the gold and remove the fifth photoresist to obtain a first electrode, a second electrode, a third electrode and a fourth electrode.

S450:形成钝化层;S450: forming a passivation layer;

具体的,S450包括:Specifically, S450 includes:

S451:沉积钝化层;S451: depositing a passivation layer;

具体的,采用金属有机化学气相沉积(MOCVD)进行钝化层沉积。钝化层的材料选用二氧化硅或氮化硅,但不限于此,优选的二氧化硅。钝化层的厚度为80-500nm,优选为100-300nm。Specifically, metal organic chemical vapor deposition (MOCVD) is used to deposit the passivation layer. The material of the passivation layer is selected from silicon dioxide or silicon nitride, but is not limited thereto, preferably silicon dioxide. The thickness of the passivation layer is 80-500nm, preferably 100-300nm.

S452:形成第六光刻胶;S452: forming a sixth photoresist;

S453:对第六光刻胶进行曝光,形成第六曝光区;S453: exposing the sixth photoresist to form a sixth exposure area;

具体的,第六曝光区需要在一次电极区域上方做出小于一次电极区域5um的区域用来蚀刻钝化层。Specifically, the sixth exposure region needs to form an area smaller than 5 um of the primary electrode region above the primary electrode region for etching the passivation layer.

S454:对第六曝光区进行蚀刻;S454: etching the sixth exposure area;

具体的,采用湿法刻蚀进行刻蚀,具体的可选用氟化铵与氢氟酸15比1的溶液进行蚀刻,确保蚀刻至一次电极表面;以对一次电极形成开孔。Specifically, wet etching is used for etching, and a solution of ammonium fluoride and hydrofluoric acid in a ratio of 15 to 1 can be used for etching to ensure that the etching reaches the surface of the primary electrode, so as to form an opening in the primary electrode.

S455:去除第六光刻胶;形成钝化层。S455: removing the sixth photoresist; forming a passivation layer.

S500:将第一发光结构和第二发光结构相互串联;即得到反向稳压LED芯片成品。S500: Connecting the first light-emitting structure and the second light-emitting structure in series to obtain a finished reverse voltage-stabilized LED chip.

具体的,S500包括:Specifically, S500 includes:

S501:形成第七光刻胶;S501: forming a seventh photoresist;

S502:对第七光刻胶进行曝光,形成第七曝光区;S502: exposing the seventh photoresist to form a seventh exposure area;

S503:对第七曝光区进行蒸镀;S503: performing vapor deposition on the seventh exposure area;

其中,采用电子束蒸镀、热蒸镀或磁控溅射工艺进行二次电极的蒸镀。请参考图4、图8,蒸镀第一二次电极6、第二二次电极7和第三二次电极9;以使得第一发光结构和第二发光结构串联,相邻的第二发光结构串联。Wherein, electron beam evaporation, thermal evaporation or magnetron sputtering process is used for evaporation of secondary electrodes. Please refer to Figures 4 and 8 to evaporate the first secondary electrode 6, the second secondary electrode 7 and the third secondary electrode 9 so that the first light-emitting structure and the second light-emitting structure are connected in series, and the adjacent second light-emitting structures are connected in series.

S504:撕金并去除第七光刻胶,形成第一二次电极、第二二次电极、第三二次电极成品,进而得到反向稳压LED芯片成品。S504: tear off the gold and remove the seventh photoresist to form the first secondary electrode, the second secondary electrode, and the third secondary electrode finished products, and then obtain the reverse stabilization LED chip finished product.

以上所述是发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也视为本发明的保护范围。The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims (5)

1.一种反向稳压LED芯片,其特征在于,包括:衬底、外延层、第一刻蚀道、第一发光结构、2~8个第二发光结构、1~7条第二刻蚀道、第一二次电极、第二二次电极和第三二次电极;所述外延层设于所述衬底上,并通过刻蚀至所述衬底的第一刻蚀道分为第一区域和第二区域;所述第一区域的面积:第二区域的面积为(2~5):(0.5~1.5);1. A reverse voltage-stabilized LED chip, characterized in that it comprises: a substrate, an epitaxial layer, a first etching path, a first light-emitting structure, 2 to 8 second light-emitting structures, 1 to 7 second etching paths, a first secondary electrode, a second secondary electrode and a third secondary electrode; the epitaxial layer is arranged on the substrate and is divided into a first region and a second region by etching the first etching path to the substrate; the area of the first region: the area of the second region is (2 to 5): (0.5 to 1.5); 所述第一发光结构设于所述第一区域;所述第二发光结构设于所述第二区域;所述第一发光结构和第二发光结构串联;所述第一发光结构和第二发光结构平行设置,且所述第一发光结构和第二发光结构电流传输方向相反;The first light-emitting structure is disposed in the first region; the second light-emitting structure is disposed in the second region; the first light-emitting structure and the second light-emitting structure are connected in series; the first light-emitting structure and the second light-emitting structure are disposed in parallel, and current transmission directions of the first light-emitting structure and the second light-emitting structure are opposite; 所述外延层包括依次设置在衬底上的第一半导体层、有源层和第二半导体层;The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer sequentially arranged on a substrate; 所述第一发光结构包括第一电极和第二电极,所述第二发光结构包括第三电极和第四电极;所述第一电极、第三电极与所述第一半导体层连接,所述第二电极、第四电极与所述第二半导体层连接;The first light emitting structure includes a first electrode and a second electrode, and the second light emitting structure includes a third electrode and a fourth electrode; the first electrode and the third electrode are connected to the first semiconductor layer, and the second electrode and the fourth electrode are connected to the second semiconductor layer; 所述第一电极和所述第四电极通过横跨所述第一刻蚀道的所述第二二次电极实现电连接;The first electrode and the fourth electrode are electrically connected via the second secondary electrode spanning the first etched path; 所述第二电极和所述第三电极通过横跨所述第一刻蚀道的所述第一二次电极实现电连接;The second electrode and the third electrode are electrically connected via the first secondary electrode spanning the first etched path; 所述第二刻蚀道和第三二次电极设于所述第二区域内;所述第二刻蚀道刻蚀至所述衬底;相邻的第二发光结构通过所述第二刻蚀道隔开,并通过所述第三二次电极实现电连接。The second etching path and the third secondary electrode are arranged in the second region; the second etching path is etched to the substrate; adjacent second light emitting structures are separated by the second etching path and are electrically connected through the third secondary electrode. 2.如权利要求1所述的反向稳压LED芯片,其特征在于,所述第一刻蚀道和第二刻蚀道侧壁具有倾斜角度。2 . The reverse-stabilized LED chip according to claim 1 , wherein the side walls of the first etched path and the second etched path have an inclined angle. 3.如权利要求2所述的反向稳压LED芯片,其特征在于,所述倾斜角度≤60度。3 . The reverse-stabilized LED chip according to claim 2 , wherein the tilt angle is ≤ 60 degrees. 4.如权利要求1所述的反向稳压LED芯片,其特征在于,所述第一发光结构和第二发光结构还包括电流阻挡层、电流扩散层和钝化层。4 . The reverse-stabilized LED chip according to claim 1 , wherein the first light-emitting structure and the second light-emitting structure further comprise a current blocking layer, a current diffusion layer and a passivation layer. 5.如权利要求1-4任一项所述的反向稳压LED芯片的制备方法,其特征在于,包括:5. The method for preparing a reverse-stabilized LED chip according to any one of claims 1 to 4, characterized in that it comprises: (1)提供一衬底,在所述衬底上形成外延层;(1) providing a substrate and forming an epitaxial layer on the substrate; (2)在所述外延层上形成第一裸露区域和第二裸露区域;(2) forming a first exposed region and a second exposed region on the epitaxial layer; (3)形成第一刻蚀道;(3) forming a first etching path; (4)形成第一发光结构和第二发光结构;(4) forming a first light-emitting structure and a second light-emitting structure; (5)将所述第一发光结构和第二发光结构相互串联;即得到反向稳压LED芯片成品。(5) The first light-emitting structure and the second light-emitting structure are connected in series to obtain a finished reverse voltage-stabilized LED chip.
CN201910912027.0A 2019-09-25 2019-09-25 Reverse voltage-stabilizing LED chip and preparation method thereof Active CN110571314B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910912027.0A CN110571314B (en) 2019-09-25 2019-09-25 Reverse voltage-stabilizing LED chip and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910912027.0A CN110571314B (en) 2019-09-25 2019-09-25 Reverse voltage-stabilizing LED chip and preparation method thereof

Publications (2)

Publication Number Publication Date
CN110571314A CN110571314A (en) 2019-12-13
CN110571314B true CN110571314B (en) 2024-07-09

Family

ID=68782379

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910912027.0A Active CN110571314B (en) 2019-09-25 2019-09-25 Reverse voltage-stabilizing LED chip and preparation method thereof

Country Status (1)

Country Link
CN (1) CN110571314B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117317074A (en) * 2023-09-28 2023-12-29 华引芯(武汉)科技有限公司 Preparation method of light-emitting element and light-emitting element

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020066393A (en) * 2002-07-18 2002-08-16 에피밸리 주식회사 Fabrication method of InAlGaN LED device
CN103236474A (en) * 2013-04-09 2013-08-07 中国科学院半导体研究所 Method for manufacturing optionally cut high-voltage LED devices
CN210379100U (en) * 2019-09-25 2020-04-21 佛山市国星半导体技术有限公司 Reverse voltage-stabilizing LED chip

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6547249B2 (en) * 2001-03-29 2003-04-15 Lumileds Lighting U.S., Llc Monolithic series/parallel led arrays formed on highly resistive substrates
JP2005259754A (en) * 2004-03-09 2005-09-22 Korai Kagi Kofun Yugenkoshi Light emitting diode device capable of preventing electrostatic discharge damage
JP5352857B2 (en) * 2009-03-31 2013-11-27 旭化成エレクトロニクス株式会社 Optical device
CN102903813B (en) * 2012-09-29 2014-04-02 海迪科(南通)光电科技有限公司 Fabrication method of high-voltage LED device with integrated graphic array

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020066393A (en) * 2002-07-18 2002-08-16 에피밸리 주식회사 Fabrication method of InAlGaN LED device
CN103236474A (en) * 2013-04-09 2013-08-07 中国科学院半导体研究所 Method for manufacturing optionally cut high-voltage LED devices
CN210379100U (en) * 2019-09-25 2020-04-21 佛山市国星半导体技术有限公司 Reverse voltage-stabilizing LED chip

Also Published As

Publication number Publication date
CN110571314A (en) 2019-12-13

Similar Documents

Publication Publication Date Title
US10431718B2 (en) Substrate with topological features for steering fluidic assembly LED disks
CN111415958B (en) Organic light emitting diode display panel with moisture-proof structure
JPH11238578A (en) Electroluminescent device and method of manufacturing the same
CN106784192B (en) A kind of light-emitting diode chip for backlight unit and preparation method thereof
CN105374909B (en) A kind of manufacturing method of high-voltage LED
CN105428474B (en) A kind of simple making method of efficient LED chip
CN113451524A (en) Display device, display panel and manufacturing method thereof
WO2014104688A1 (en) Nitride semiconductor light-emitting device and method of manufacturing same
CN107808914A (en) A kind of light emitting diode and preparation method thereof
CN110571314B (en) Reverse voltage-stabilizing LED chip and preparation method thereof
CN110164900B (en) LED chip, preparation method thereof, chip wafer and Micro-LED display device
CN113270522A (en) Micro light emitting diode chip, manufacturing method thereof and display device
CN101950733B (en) Manufacturing method of pixel structure and manufacturing method of organic light-emitting element
CN210379100U (en) Reverse voltage-stabilizing LED chip
CN109994583B (en) A kind of high-power ultraviolet light emitting diode and its manufacturing method
CN107195745A (en) Current barrier layer and manufacturing method of light emitting diode chip
CN116978999B (en) Current-limited Micro-LED chip and manufacturing method thereof
CN105244420B (en) The production method of GaN base light emitting
CN101339902A (en) Method for manufacturing semiconductor high voltage device
CN113594330B (en) A kind of LED and preparation method thereof
US20050012107A1 (en) [led device ]
CN116387413A (en) Preparation method of LED chip and LED chip
CN115602775A (en) Flip high-voltage light-emitting diode chip and preparation method thereof
CN108899404A (en) A kind of light emitting diode and preparation method thereof
CN115472729A (en) A small light-emitting diode structure and its manufacturing method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant