CN110557007B - Method for modeling output ripple voltage of Boost converter - Google Patents

Abstract

The invention provides a modeling method for the output ripple voltage of a Boost converter. Through in-depth research on the mechanism of the output ripple voltage distortion of the Boost converter caused by the filter capacitor ESR, a steady state of the Boost converter considering the filter capacitor ESR is given. The gain, CCM and DCM critical load resistance R _CM , and the critical load resistance R _CK of CISM and IISM, according to the critical load, the working mode of the converter can be easily judged, and the ripple voltage mathematical model considering capacitor ESR is established. It is related to parameters such as inductance, input voltage, output voltage, load resistance, capacitance and capacitance ESR. Finally, experimental verification is carried out, and the experimental results are compared and analyzed with the results calculated according to the model to verify the correctness of the model. The application of the present invention The optimal design of intrinsically safe Boost converters in hazardous environments has important guiding significance.

Description

A Modeling Method for Output Ripple Voltage of Boost Converter

technical field

The invention belongs to the technical field of Boost converter output ripple voltage modeling and analysis, and particularly relates to a Boost converter output ripple voltage modeling method.

Background technique

The output ripple voltage of Boost converter is an important index to measure its performance. The existing analysis on the ripple voltage is based on the ideal boost converter, and the influence of parasitic parameters on the ripple voltage is not considered. It will increase the volume and cost of the converter, and in some special applications, such as coal mines, petrochemicals and other hazardous environments, it will increase the risk of explosion caused by a short-circuit fault in the power supply. Therefore, it is of great significance to study a more accurate ripple voltage model for the optimal design of Boost converters used in hazardous environments.

A large number of experimental results of ripple voltage are inconsistent with the traditional theory based on ideal Boost converters, which are embodied in the following five aspects: (1) There is a large error between the experimental and traditional theoretical calculation results of ripple voltage, and even the experimental results are (2) The output ripple voltage is distorted, and the experimental and traditional theoretical waveform analysis results are inconsistent; (3) The ripple voltage when the converter works in the inductor full power supply mode (CISM) It is related to the size of the inductance (the ideal ripple model has nothing to do with the inductance), and it changes with the change of the inductance; (4) When the converter works in the same working mode (such as CCM or DCM), it changes with the resistance value of the load resistance. , the ripple voltage has multiple waveforms (traditional theoretical analysis only has one waveform); (5) the converter output voltage gain, critical load, etc. are inconsistent with the traditional theoretical analysis results. Based on the above analysis, it can be seen that the ripple voltage theory of the Boost converter needs to be further studied.

The ripple voltage theory of the existing boost converter does not consider the influence of capacitor ESR, but a large number of experimental results show that ESR has a great influence on the magnitude of the ripple voltage, and at the same time will lead to the distortion of the ripple voltage waveform. High frequency can effectively reduce the capacitance of the filter capacitor of the switching converter, thereby reducing the volume of the converter, but as the capacitance of the capacitor decreases, the ESR also increases, and the increase of the ESR leads to an increase in the ripple voltage. big. The experimental results also found that when the capacitance value of the capacitor remains unchanged, a small change in ESR will also lead to a more significant change in the shape and size of the ripple voltage. Based on the above analysis, it is necessary to conduct in-depth research on the ripple voltage distortion mechanism and ripple voltage mathematical model caused by ESR.

SUMMARY OF THE INVENTION

The invention provides a method for modeling the output ripple voltage of a Boost converter, which considers the influence of filter capacitor ESR on the output ripple voltage of the Boost converter, and provides guidance for the optimal design of an intrinsically safe Boost converter used in a hazardous environment.

The technical scheme of the present invention is: a Boost converter output ripple voltage modeling method, comprising:

(1) Calculate the steady-state gain of the Boost converter considering the filter capacitor ESR, the critical load resistance R _CM of CCM and DCM, and the critical load resistance R _CK of CISM and IISM:

a. Gain ratio of CCM Boost converter

According to the law of energy conservation when the Boost converter works in CCM, it can be obtained:

In the formula, I _i is the current average value of the input power supply V _i ; I _C1 is the average value of the discharge current of the capacitor C when the switch VT is turned on; I _C2 is the average value of the C charging current when the VT is turned off; D is the VT conduction On-time duty cycle;

When the boost converter works in a stable state, the average value of the inductor current _IL is the average value of the input current I _i , that is, I _i = _IL , and the switch on and off time can be obtained from KCL:

The relationship between I _C1 and I _C2 can be obtained from the ampere-second balance as:

I _C1 DT = I _C2 (1-D)T (3)

Putting equations (2) and (3) into equation (1), the relationship between the output voltage V _o and the input voltage V _i can be obtained as:

b. Critical load resistance R _CK of CISM and IISM

Combining equations (2), (3) and (4), the maximum value I _LP and minimum value I _LV of the inductor current can be obtained as:

In the formula,

I _LV =I _o in formula (5), the critical load R _CK of CISM and IISM can be obtained as:

c. CCM and DCM critical load resistance R _CM

Let I _LV = 0 in formula (5), the critical load resistance R _CM of CCM and DCM can be obtained as:

(2) By analyzing the output ripple voltage of the CCM Boost converter, establish a mathematical model of the ripple voltage when the Boost converter works in CISM and IISM considering ESR, and determine the influencing parameters:

A. Ripple voltage mathematical model for CISM is established:

The circuit parameters of the boost converter working in CISM include the inductor current i _L , the capacitor voltage _{vc , the voltage at both ends of the ESR v Rc and} the output ripple voltage v _o , the maximum value of the inductor current I _Lp , and the minimum value of the inductor current I _Lv , the maximum value of the output ripple voltage V _op , the minimum value of the output ripple voltage V _ov , the output ripple voltage is discussed at different stages in a switching cycle, t ₀ is the turn-on time of the VT, and t ₁ is the turn-on time of the VT. is the turn-off time, and t ₂ is the time when VT changes from turn-off to turn-on:

a. Stage 1 [t ₀ -t ₁ time period], VT is turned on, C supplies energy to R, and can be obtained according to KVL,

Solving equation (8), the output voltage v _o1 (t) of stage 1 can be obtained as:

b. Stage 2 [t=t ₁ time], the output voltage in the time period t ₀ -t ₁ is v _o1 (t), and the output voltage in the time period t ₁ -t ₂ is v _o2 (t), then v _o1 (t) and v _o2 (t) are:

At time _t1 , VT changes from on to off, because the voltage across the capacitor C cannot change abruptly, so it satisfies: v _C1 (t ₁ )=v _C2 (t ₁ ), the output voltage can be obtained from equation (11) at The change ΔV ₁ at time t ₁ is:

At time _t1 , the voltages across _RC before and after the switch VT is turned off are:

Combining equations (5), (11) and (12), the variation ΔV ₁ of the output voltage at time t ₁ can be obtained as:

In the formula,

c. Stage 3 [t ₁ -t ₂ time period], VT is turned off, and the inductor L begins to charge the capacitor _C. At this time, the voltage across the capacitor _C shows an upward trend. The voltage shows a downward trend. At this stage, the charging current i _C (t) of the capacitor C is:

Assuming t ₁ =0, v _o2 (t ₁ )=0, the output ripple voltage v ₁₂ (t) in the time period t ₁ -t ₂ can be obtained from equation (11) as:

Combining equations (5), (14) and (15), v ₁₂ (t) can be obtained as:

v ₁₂ (t)=at ² +bt (16)

In the formula,

From equation (16) we know that a<0, so v ₁₂ (t) is a parabola with an opening downward;

d. In stage 4 [t=t ₂ time], VT changes from off to on, because the voltage across the capacitor C cannot undergo a sudden change, so it satisfies: v _C1 (t ₂ )=v _C2 (t ₂ ), by the formula (10) The variation ΔV ₂ of the output voltage at time t ₂ can be obtained as:

At time _t2 , the voltages across RC before and after VT is _turned on are:

Combining equations (5), (17) and (18), the variation ΔV ₂ of the output voltage at time t ₂ can be obtained as:

In the formula,

The output ripple voltage waveform of the converter is different due to the size of t ₂ and t _m , and the output ripple voltage may have many situations in the time period of t ₁ -t _2. t _m is the extreme point of v ₁₂ (t), so The output ripple voltage of the boost converter working in CISM is:

In the formula, t _m =-b/2a, t ₂ =(1-D)T;

B. Ripple voltage mathematical model establishment at IISM:

IISM has a total of 5 stages, of which the first stage [t ₀ -t ₁ ] is the same as the first stage [t ₀ -t ₁ ] above, and the second stage [t = t ₁ ] is the same as the second stage [t = t ₁ ] above , the third stage [t ₁ -t ₂ ] is the same as the third stage [t ₁ -t ₂ ], and the fifth stage [t = t ₃ ] is the same as the fourth stage [t = t ₂ ];

The fourth stage [t ₂ -t ₃ ], at time t ₂ , i _L (t ₂ )=I _o , after time t ₂ , the capacitor C begins to discharge, and the discharge current i _C (t) is:

In the time period of t ₂ -t ₃ , the output voltage v _o2 (t) is:

Let t ₂ =0, v _o2 (t ₂ )=0, the curve v ₂₃ (t) of the output ripple voltage can be expressed as:

In the formula,

Combining equations (21) and (23), v ₂₃ (t) can be obtained as:

It can be seen from equation (24) that in the time period t ₂ -t ₃ , the output ripple voltage shows a downward trend. When 0<t ₂ <t _m , let i _C (t ₂ )=0, and assuming that t ₁ =0, The charging time Δt of the capacitor can be obtained from equation (14) as:

Therefore, the output ripple voltage of the Boost converter working in IISM is:

In the formula, t _m =-b/2a,

(3) By analyzing the output ripple voltage of the DCM Boost converter, a mathematical model of the ripple voltage when the Boost converter works in DCM considering ESR is established, and the influencing parameters are determined:

In DCM, the inductor current is equal to zero at time t _2. From equation (19), it can be known that ΔV ₂ does not appear in DCM. There are 5 stages in DCM, of which the second stage [t=t ₁ ] and the third stage [t ₁ -t ₂ ] and the fourth stage [t ₂ -t ₃ ] respectively correspond to the second stage [t=t ₁ ], the third stage [t ₁ -t ₂ ] and the fourth stage [t ₂ -t ₃ ] in CCM-IISM , DCM stage 1 [t ₀ -t ₁ ] and stage 5 [t ₃ -t ₄ ] work the same as CCM-IISM stage 1 [t ₀ -t ₁ ],

When the converter operates in DCM, the maximum value of the inductor current I _LP is:

Combining equations (14), (15) and (27), the output ripple voltage curve v ₁₂ (t) in the time period t ₁ -t ₂ in DCM can be obtained as:

v ₁₂ (t)=at ² +bt (28)

In the formula,

Boost converter V _i and V _o satisfy: V _i <V _o , so it can be known from equation (28): a<0;

Let i _C (t ₂ )=0, and assuming t ₁ =0, combining equations (14) and (27), the capacitor charging time Δt in DCM can be obtained as:

From equation (13), the variation ΔV ₁ of the output ripple voltage at time t ₁ in DCM can be obtained as:

Through the above analysis, it can be known that the converter ripple voltage in DCM has the following five situations:

In the formula, t _m =-b/2a,

(4) Experimental verification: take the relevant parameters of the converter, set up an experimental platform, compare and analyze the experimental results and the output ripple voltage theoretically calculated according to the model established in the above steps, and verify the output ripple voltage model of the Boost converter considering the capacitor ESR. correctness.

The advantages of the present invention are:

(1) The present invention provides the steady-state gain of the Boost converter considering the filter capacitor ESR, the critical load resistance RCM of CCM and DCM, and the critical load resistance RCK of CISM and IISM, and the operation of the converter can be easily judged according to the critical load. model;

(2) The present invention establishes a mathematical model of ripple voltage when Boost converter works in CISM and IISM considering ESR, and the model is related to parameters such as inductance, input voltage, output voltage, load resistance, capacitance, and ESR of the capacitance;

(3) The mathematical model of ripple voltage proposed by the present invention is closer to the experimental result;

(4) The ripple voltage analysis method considering the filter capacitor ESR proposed by the present invention can be applied to other DC-DC converters, and has high precision, and can reduce the size of the converter, save costs, and special applications. (Coal mine, chemical industry, etc.) to provide theoretical basis for the optimal design of switching power supply.

Description of drawings

Fig. 1 is Boost converter topology diagram of the present invention;

Figure 2 is an equivalent circuit of the Boost converter provided by the present invention when the CCM corresponds to VT on and off, Figure 2(a) corresponds to VT on, and Figure 2(b) corresponds to VT off;

Fig. 3 is the driving signal v _GS , the inductor current i _L , the voltage v _C across the filter capacitor, the voltage v _RC across the R _C and the output ripple voltage type curve of the CISM Boost converter when the Boost converter provided by the present invention works in CISM picture;

Fig. 4 is the five operating waveforms of the curve v ₁₂ provided by the present invention due to the different parameters of the converter, Fig. 4(a) corresponds to the ripple CISM1, IISM1 and DCM1; Fig. 4(b) corresponds to the ripple CISM2, IISM2 and DCM2 ; Figure 4(c) corresponds to ripple CISM3, IISM3 and DCM3; Figure 4(d) corresponds to ripple CISM4, IISM4 and DCM4; Figure 4(e) corresponds to ripple CISM5, IISM5 and DCM5;

Fig. 5 is the driving signal v _GS , the inductor current i _L , the voltage v _C across the filter capacitor, the voltage v _RC across the R _C and the output ripple voltage type curve of the IISM Boost converter when the Boost converter provided by the present invention works in IISM picture;

Fig. 6 is the driving signal v _GS , the inductor current i _L , the voltage v _C across the filter capacitor, the voltage v _RC across the R _C and the output ripple voltage type curve of the DCM Boost converter when the Boost converter provided by the present invention works in DCM picture;

Fig. 7 is the experimental waveform that v _o changes with R when L=220μH of the present invention;

Fig. 8 is the experimental waveform of the change of v _o with R when L=470μH of the present invention.

Detailed ways

The present invention will be clearly and completely described below with reference to the accompanying drawings, so that those skilled in the art can fully implement the present invention without creative work.

The specific embodiment of the present invention is: a kind of Boost converter output ripple voltage modeling method, including:

(1) Calculate the steady-state gain of the Boost converter considering the filter capacitor ESR and the critical load resistance R _CM of CCM and DCM, as well as the critical load resistance R _CK of CISM and IISM, FIG. 1 is a topology diagram of the Boost converter of the present invention, and FIG. 2 is a The Boost converter provided by the present invention corresponds to the equivalent circuit when the VT is turned on and off respectively when the CCM is operated:

a. Gain ratio of CCM Boost converter

According to the law of energy conservation when the Boost converter works in CCM, it can be obtained:

In the formula, I _i is the current average value of the input power supply V _i ; I _C1 is the average value of the discharge current of the capacitor C when the switch VT is turned on; I _C2 is the average value of the C charging current when the VT is turned off; D is the VT conduction On-time duty cycle;

When the boost converter works in a stable state, the average value of the inductor current _IL is the average value of the input current I _i , that is, I _i = _IL , and the switch on and off time can be obtained from KCL:

The relationship between I _C1 and I _C2 can be obtained from the ampere-second balance as:

I _C1 DT = I _C2 (1-D)T (3)

Putting equations (2) and (3) into equation (1), the relationship between the output voltage V _o and the input voltage V _i can be obtained as:

b. Critical load resistance R _CK of CISM and IISM

Combining equations (2), (3) and (4), the maximum value I _LP and the minimum value I _LV of the inductor current can be obtained as:

In the formula,

I _LV =I _o in formula (5), the critical load R _CK of CISM and IISM can be obtained as:

c. CCM and DCM critical load resistance R _CM

Let I _LV = 0 in formula (5), the critical load resistance R _CM of CCM and DCM can be obtained as:

(2) By analyzing the output ripple voltage of the CCM Boost converter, establish a mathematical model of the ripple voltage when the Boost converter works in CISM and IISM when considering ESR, and determine the influence parameters. Fig. 3 is the work of the Boost converter provided by the present invention. During CISM, the driving signal v _GS , the inductor current i _L , the voltage v _C at both ends of the filter capacitor, the voltage v _RC at both ends of RC and the type curve diagram of the _CISMBoost converter output ripple voltage, Fig. 4 is the curve v ₁₂ provided by the present invention There are five working waveforms due to different converter parameters:

A. Ripple voltage mathematical model for CISM is established:

The circuit parameters of the boost converter working in CISM include the inductor current i _L , the capacitor voltage _{vc , the voltage at both ends of the ESR v Rc and} the output ripple voltage v _o , the maximum value of the inductor current I _Lp , and the minimum value of the inductor current I _Lv , the maximum value of the output ripple voltage V _op , the minimum value of the output ripple voltage V _ov , the output ripple voltage is discussed at different stages in a switching cycle, t ₀ is the turn-on time of the VT, and t ₁ is the turn-on time of the VT. is the turn-off time, and t ₂ is the time when VT changes from turn-off to turn-on:

a. Stage 1 [t ₀ -t ₁ time period], VT is turned on, C supplies energy to R, and can be obtained according to KVL,

Solving equation (8), the output voltage v _o1 (t) of stage 1 can be obtained as:

b. Stage 2 [t=t ₁ time], the output voltage in the time period t ₀ -t ₁ is v _o1 (t), and the output voltage in the time period t ₁ -t ₂ is v _o2 (t), then v _o1 (t) and v _o2 (t) are:

At time _t1 , VT changes from on to off, because the voltage across the capacitor C cannot change abruptly, so it satisfies: v _C1 (t ₁ )=v _C2 (t ₁ ), the output voltage can be obtained from equation (11) at The change ΔV ₁ at time t ₁ is:

At time _t1 , the voltages across _RC before and after the switch VT is turned off are:

Combining equations (5), (11) and (12), the variation ΔV ₁ of the output voltage at time t ₁ can be obtained as:

In the formula,

c. Stage 3 [t ₁ -t ₂ time period], VT is turned off, and the inductor L begins to charge the capacitor _C. At this time, the voltage across the capacitor _C shows an upward trend. The voltage shows a downward trend. At this stage, the charging current i _C (t) of the capacitor C is:

Assuming t ₁ =0, v _o2 (t ₁ )=0, the output ripple voltage v ₁₂ (t) in the time period t ₁ -t ₂ can be obtained from equation (11) as:

Combining equations (5), (14) and (15), v ₁₂ (t) can be obtained as:

v ₁₂ (t)=at ² +bt (16)

In the formula,

From equation (16) we know that a<0, so v ₁₂ (t) is a parabola with an opening downward;

d. Stage 4 [t=t ₂ time], VT changes from off to on, because the voltage across the capacitor C cannot change abruptly, so it satisfies: v _C1 (t ₂ )=v _C2 (t ₂ ), by the formula (10) The variation ΔV ₂ of the output voltage at time t ₂ can be obtained as:

At time _t2 , the voltages across RC before and after VT is _turned on are:

Combining equations (5), (17) and (18), the variation ΔV ₂ of the output voltage at time t ₂ can be obtained as:

In the formula,

The output ripple voltage waveform of the converter is different due to the size of t ₂ and t _m , and the output ripple voltage may have many situations in the time period of t ₁ -t _2. t _m is the extreme point of v ₁₂ (t), so The output ripple voltage of the boost converter working in CISM is:

In the formula, t _m =-b/2a, t ₂ =(1-D)T;

B. Ripple voltage mathematical model establishment at IISM:

IISM has a total of 5 stages, of which the first stage [t ₀ -t ₁ ] is the same as the first stage [t ₀ -t ₁ ] above, and the second stage [t = t ₁ ] is the same as the second stage [t = t ₁ ] above , the third stage [t ₁ -t ₂ ] is the same as the third stage [t ₁ -t ₂ ], the fifth stage [t=t ₃ ] is the same as the fourth stage [t = t ₂ ]; FIG. 5 is the present invention The provided Boost converter works in IISM when the driving signal v _GS , the inductor current i _L , the voltage v _C across the filter capacitor, the voltage v _RC across the RC and the _IISM Boost converter output ripple voltage type graph.

The fourth stage [t ₂ -t ₃ ], at time t ₂ , i _L (t ₂ )=I _o , after time t ₂ , the capacitor C starts to discharge, and the discharge current i _C (t) is:

In the time period of t ₂ -t ₃ , the output voltage v _o2 (t) is:

Let t ₂ =0, v _o2 (t ₂ )=0, the curve v ₂₃ (t) of the output ripple voltage can be expressed as:

In the formula,

Combining equations (21) and (23), v ₂₃ (t) can be obtained as:

It can be seen from equation (24) that in the time period of t ₂ -t ₃ , the output ripple voltage shows a downward trend. When 0<t ₂ <t _m , let i _C (t ₂ )=0, and assuming that t ₁ =0, The charging time Δt of the capacitor can be obtained from equation (14) as:

Therefore, the output ripple voltage of the Boost converter working in IISM is:

In the formula, t _m =-b/2a,

(3) By analyzing the output ripple voltage of the DCM Boost converter, establish a mathematical model of the ripple voltage when the Boost converter works in DCM when considering ESR, and determine the influencing parameters. Fig. 6 is the Boost converter provided by the present invention operating in DCM When the driving signal v _GS , the inductor current i _L , the voltage v _C across the filter capacitor, the voltage v _RC across the RC and the DCM Boost converter output ripple voltage type graph _.

In DCM, the inductor current is equal to zero at time t _2. From equation (19), it can be known that ΔV ₂ does not appear in DCM. There are 5 stages in DCM, of which the second stage [t=t ₁ ] and the third stage [t ₁ -t ₂ ] and the fourth stage [t ₂ -t ₃ ] respectively correspond to the second stage [t=t ₁ ], the third stage [t ₁ -t ₂ ] and the fourth stage [t ₂ -t ₃ ] in CCM-IISM , DCM stage 1 [t ₀ -t ₁ ] and stage 5 [t ₃ -t ₄ ] work the same as CCM-IISM stage 1 [t ₀ -t ₁ ],

When the converter operates in DCM, the maximum value of the inductor current I _LP is:

Combining equations (14), (15) and (27), the output ripple voltage curve v ₁₂ (t) in the time period t ₁ -t ₂ in DCM can be obtained as:

v ₁₂ (t)=at ² +bt (28)

In the formula,

Boost converter V _i and V _o satisfy: V _i <V _o , so it can be known from equation (28): a<0;

Let i _C (t ₂ )=0, and assuming t ₁ =0, combining equations (14) and (27), the capacitor charging time Δt in DCM can be obtained as:

From equation (13), the variation ΔV ₁ of the output ripple voltage at time t ₁ in DCM can be obtained as:

Through the above analysis, it can be known that the converter ripple voltage in DCM has the following five situations:

In the formula, t _m =-b/2a,

(4) Experimental verification: Take the relevant parameters of the converter, set up an experimental platform, compare and analyze the experimental results and the theoretically calculated output ripple voltage based on the model established in the above steps, and verify the output ripple voltage model of the Boost converter considering the capacitor ESR. correctness.

The main circuit parameters are as follows: input voltage Vi=5V, duty cycle D=0.5, operating frequency f=10kHz, load R=10～100Ω, inductance L=220uH/470uH, the nominal value of electrolytic capacitor C=100μF/50V , using the LCR tester to measure the electrolytic capacitor selected in the experiment, the measured value is C=85uF/50V, ESR=142mΩ for experimental verification, L=220uH and L=470uH for experimental analysis, when the inductance L=220uH , solve equations (6) and (7) to obtain critical load R _CK =17Ω, R _CM =35Ω. It can be seen that when the load satisfies 10Ω≤R≤17Ω, the converter works in CISM; when the load satisfies 17Ω<R<35Ω, the converter works in CCM-IISM; when the load satisfies R≥35Ω, the converter works in DCM-IISM, Figure 7 is the experimental waveform when the load resistance changes within _10-100Ω , the left side is the VT drive signal _vGS waveform, the inductor current iL and the output voltage _vo waveform, the right side is the amplification of _vo picture.

When the inductance L=470uH, the critical load resistance of the boost converter is R _CK =37Ω, R _CM =75Ω. When the load satisfies 10Ω≤R≤37Ω, the converter works in CISM; when the load satisfies 37Ω<R<75Ω, the converter works in CCM-IISM; when the load satisfies R≥75Ω, the converter works in DCM-IISM. Figure 8 is the experimental waveform when the load changes within 10-100Ω, the right side is the enlarged view of v _o , and the figures a, b, c, d, e, f, and g correspond to R=10Ω, R=15Ω, R= 20Ω, R=25Ω, R=30Ω, R=50Ω, R=100Ω.

Bring the circuit parameters into the expressions of t ₂ and t _m under the corresponding working mode, then t _{2 and t m under the corresponding working conditions can be calculated, and the output ripple can be obtained by comparing the magnitudes of t 2 and t m} voltage type, and then solve the output ripple voltage value under this working condition. The specific experimental results are shown in Table 1 and Table 2.

Table 1 L=220uH experimental results

Table 2 The experimental results of L=470uH

Comparing the output ripple voltage types in Tables 1 and 2 with the experimental results under the same operating conditions in Figures 7 and 8, it can be found that the experimental results are basically consistent with the theoretically analyzed output ripple voltage waveforms. At the same time, it can be seen from Table 1 and Table 2 that with the increase of the load resistance R, the extreme point t _m of v ₁₂ will gradually decrease, which will cause the extreme point of the output ripple voltage of the converter to shift to the left, and the experimental The result is the same trend as the theoretical analysis; the ripple voltage is related to the inductance.

In order to further verify the influence of ESR on the output ripple voltage, different electrolytic capacitors are selected for experimental analysis in Table 3. In order to facilitate the analysis and comparison, the remaining parameters of the converter remain unchanged. The specific converter parameters are: L=220μH, R= 30Ω, f=10kHz, D=0.5, _Vi =5V. Table 3 shows the calculated value of the ideal ripple voltage model, the calculated value of the ripple model proposed in this paper, and the experimental results. From the comparison results in Table 3, it can be seen that due to the influence of the ESR of the filter capacitor, the ideal ripple model has a large difference with the experimental results. The error of the ripple voltage established in this paper considering ESR is closer to the experimental results, the maximum error is only about 5%, and it has high accuracy; at the same time, it can be seen from Table 3 that the larger the ESR, the higher the ripple voltage. The experimental results are consistent with the theoretical analysis.

Table 3 Comparison results of output ripple voltage under different electrolytic capacitor parameters

The preferred embodiments of the present invention have been described above. It should be pointed out that the present invention is not limited to the above-mentioned specific embodiments, and the equipment and structures that are not described in detail should be understood as being implemented in a common manner in the art; Any person skilled in the art, without departing from the scope of the technical solution of the present invention, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention still belong to the protection of the technical solution of the present invention. within the range.

Claims (1)

1. A method for modeling output ripple voltage of a Boost converter is characterized by comprising the following steps:

(1) boost converter steady-state gain and CCM and DCM critical load resistor R with filter capacitor ESR considered in calculation_CMAnd critical load resistance R of CISM and IISM_CK：

Gain ratio of CCM Boost converter

When the Boost converter works in CCM, the energy conservation law can be used for obtaining the following conditions:

in the formula I_iFor an input power supply V_iAverage value of current of (a); i is_C1The average value of the discharge current of the capacitor C when the switching tube VT is conducted; I.C. A_C2Is the average value of the C charging current when the VT is turned off; d is the duty ratio when VT is conducted;

when the Boost converter works in a stable state, the average value I of the inductive current_LI.e. the input current I_iAverage value of (I), i.e. I_i＝I_LAnd the switching tube can be obtained from KCL within the on and off time:

equilibrium by ampere-second gives I_C1And I_C2The relationship between the two is as follows:

I_C1DT＝I_C2(1-D)T (3)

bringing the formulae (2) and (3) into(1) Obtaining an output voltage V_oAnd an input voltage V_iThe relation between the two is as follows:

critical load resistance R of CISM and IISM_CK

The maximum value I of the inductive current can be obtained by the connection type (2), (3) and (4)_LPAnd a minimum value I_LVComprises the following steps:

in the formula (I), the compound is shown in the specification,

f is the converter operating frequency;

let I in formula (5)_LV＝I_oCritical load R of CISM and IISM can be obtained_CKComprises the following steps:

CCM and DCM critical load resistance R_CM

Let I in formula (5)_LVThe critical load resistance R of CCM and DCM can be obtained as 0_CMComprises the following steps:

(2) through the analysis of the output ripple voltage of the CCM Boost converter, a ripple voltage mathematical model of the Boost converter working in the CISM and the IISM when considering ESR is established, and influence parameters are determined:

a, establishing a ripple voltage mathematical model in CISM:

the circuit parameters of the Boost converter working in the CISM compriseInductor current i_LCapacitor voltage v_cVoltage v across ESR_RcAnd output ripple voltage v_oMaximum value of inductor current I_LpMinimum value of inductor current I_LvTo output the maximum value V of ripple voltage_opMinimum value V of output ripple voltage_ovOutput ripple voltage, t, is discussed in different stages within a switching cycle₀Is the VT on time, t₁For the moment when VT is turned on to turn off, t₂Moment VT changes from off to on:

a. stage 1[ t ]₀－t₁Time period]VT is on, C supplies energy to R, and can be obtained according to KVL,

the phase 1 output voltage v is obtained by solving equation (8)_o1(t) is:

b. stage 2[ t ═ t₁Time of day]At t, at₀－t₁Output voltage of time period v_o1(t); at t₁－t₂Output voltage of time period v_o2(t), then v_o1(t) and v_o2(t) are respectively:

t₁at the moment, VT is changed from on to off, and the voltage at the two ends of the capacitor C can not be suddenly changed, so that the following requirements are met: v. of_C1(t₁)＝v_C2(t₁) The output voltage obtained from equation (11) is at t₁Variation Δ V of time₁Comprises the following steps:

t₁at any moment, before and after the switch tube VT is turned off_CThe voltages at both ends are:

the output voltage obtained by the united vertical type (5), (11) and (12) is t₁Variation Δ V of time₁Comprises the following steps:

in the formula (I), the compound is shown in the specification,

c. stage 3[ t ]₁－t₂Time period]When VT is turned off, the inductor L starts to charge the capacitor C, and the voltage at two ends of the capacitor C rises due to the charging current i_CIs gradually decreased, R_CThe voltage at both ends is in a descending trend, and at the stage, the charging current i of the capacitor C_C(t) is:

let t₁＝0，v_o2(t₁) When it is 0, t can be obtained from the formula (11)₁－t₂Time period output ripple voltage v₁₂(t) is:

v is obtained by combining the vertical types (5), (14) and (15)₁₂(t) is:

v₁₂(t)＝at²+bt (16)

in the formula (I), the compound is shown in the specification,

a is represented by the formula (16)<0, thus v₁₂(t) is a downward opening parabola;

d. stage 4[ t ═ t₂Time of day]And VT is changed from off to on, and the voltage at the two ends of the capacitor C cannot be suddenly changed, so that the following conditions are met: v. of_C1(t₂)＝v_C2(t₂) The output voltage obtained from the equation (10) is at t₂Variation Δ V of time₂Comprises the following steps:

t₂time, VT before and after turn-on R_CThe voltages at the two ends are respectively:

the output voltage obtained by the combined vertical type (5), (17) and (18) is t₂Variation Δ V of time₂Comprises the following steps:

in the formula (I), the compound is shown in the specification,

converter output ripple voltage waveform factor t₂And t_mOf different sizes, the output ripple voltage is t₁－t₂TimeThere are a plurality of conditions of the segment, t_mIs v is₁₂(t), so that the output ripple voltage of the Boost converter when the Boost converter operates in the CISM is:

in the formula, t_m＝-b/2a，t₂＝(1-D)T；

B, establishing a ripple voltage mathematical model during IISM:

IISM has 5 stages, 1 st stage [ t ]₀－t₁]Same 1 st stage [ t ] as above₀－t₁]Stage 2[ t ═ t ]₁]Stage 2[ t ═ t ] as above₁]3 rd stage [ t ]₁－t₂]Same 3 rd stage [ t ]₁－t₂]Stage 5 [ t ═ t ]₃]Same 4 th stage [ t ═ t-₂]；

Stage 4[ t ]₂－t₃]，t₂Time, i_L(t₂)＝I_o，t₂After the time, the capacitor C starts to discharge, and the discharge current i_C(t) is:

at t₂－t₃Time period output voltage v_o2(t) is:

let t₂＝0，v_o2(t₂) When the output ripple voltage is equal to 0, curve v of the output ripple voltage₂₃(t) can be expressed as:

in the formula (I), the compound is shown in the specification,

v is obtained by combining vertical type (21) and vertical type (23)₂₃(t) is:

from the formula (24), at t₂－t₃In the time period, the output ripple voltage is in a descending trend, when 0<t₂<t_mWhen it is, let i_C(t₂) Equal to 0, and assume t₁When the time Δ t for which the capacitor is charged by equation (14) is 0:

therefore, the output ripple voltage of the Boost converter when operating at IISM is:

in the formula, t_m＝-b/2a，

(3) Through analyzing the output ripple voltage of the DCM Boost converter, a ripple voltage mathematical model is established when the Boost converter works in DCM in consideration of ESR, and influence parameters are determined:

inductor current at t in DCM₂The time equals zero, and the equation (19) shows that Δ V does not occur in DCM₂In DCM there are 5 stages, of which the 2 nd stage [ t ═ t₁]Stage 3[ t ]₁－t₂]And 4 th stage t₂－t₃]In each case corresponding to CCM-IISM [ t ═ t ]₁]Stage 3[ t ]₁－t₂]And 4 th orderSegment [ t ]₂－t₃]DCM stage 1[ t ]₀－t₁]And stage 5 [ t ]₃－t₄]With CCM-IISM stage 1[ t ]₀－t₁]The working principle of the method is the same as that of the prior art,

maximum value of inductive current I when converter is operated in DCM_LPComprises the following steps:

the combined vertical type (14), (15) and (27) can obtain the time t of DCM₁－t₂Time period output ripple voltage curve v₁₂(t) is:

v₁₂(t)＝at²+bt (28)

in the formula (I), the compound is shown in the specification,

boost converter V_iAnd V_oSatisfies the following conditions: v_i<V_oTherefore, according to the formula (28): a is<0；

Let i_C(t₂) 0, and assume t₁When DCM is obtained in conjunctive formula (14) and (27), the capacitance charging time Δ t is:

the output ripple voltage at t when DCM is obtained from equation (13)₁Variation Δ V of time₁Comprises the following steps:

from the above analysis, it can be known that the ripple voltage of the DCM time converter has the following five situations:

in the formula, t_m＝-b/2a，

(4) And (3) experimental verification: and (3) taking relevant parameters of the converter, setting an experimental platform, comparing and analyzing an experimental result with the output ripple voltage calculated according to the model theory established in the step, and verifying the correctness of the Boost converter output ripple voltage model considering the capacitor ESR.

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