Background
With the rapid development of wireless communication technology, the application of miniaturized portable terminal equipment is becoming more and more extensive, and thus the demand for high-performance and small-size radio frequency front-end modules and devices is becoming more and more urgent. In recent years, filter devices such as FBAR-based filters and duplexers have been gaining popularity. On one hand, the material has excellent electrical properties such as low insertion loss, steep transition characteristic, high selectivity, high power capacity, strong anti-static discharge (ESD) capability and the like, and on the other hand, the material has the characteristics of small volume and easy integration.
Currently, in the face of increasingly stringent frequency resources, the suppression level of frequency selective devices such as filters and duplexers at the front end of a radio frequency is required to be higher and higher for adjacent frequency bands, and the FBAR device also needs to be improved and enhanced in this respect, so that the level of adjacent band suppression and isolation is improved, the insertion loss cannot be greatly affected, and the overall size of a chip or a device is not increased as much as possible.
It is common to add a large inductance to the parallel branch to change the resonant frequency of the resonator to increase the critical band rejection, or add an extra capacitor or inductor to one or more resonators to increase the notch point to improve the critical band rejection. However, these methods require additional reactive elements, and these elements are usually large and difficult to implement on a chip. If the method is implemented by winding wires on a substrate or adding discrete components outside a chip, the number of layers and the size of the substrate are inevitably increased, thereby inevitably resulting in an increase in the overall size of the filter or duplexer. Moreover, the added winding or discrete components are not ideal in practice, and the loss introduced by the winding or discrete components is superposed on the filter, so that the overall insertion loss of the filter is deteriorated.
In summary, the above method can improve adjacent band suppression and isolation, and at the same time, the chip loss and the overall chip size can be greatly increased.
Therefore, how to design a duplexer formed by a single chip formed by bonding two separately manufactured filter wafers together has better transmit-receive isolation, and still remains a technical problem to be solved.
Disclosure of Invention
In view of the above, the present invention provides a duplexer to achieve better isolation characteristics.
The invention aims to provide a duplexer, which comprises a substrate, a protective cap positioned on the substrate, a transmitting filter chip positioned on the protective cap and a receiving filter chip, and is characterized in that: the bottom of the substrate is provided with a grounding metal pattern; the bottom surface of the emission filter chip is provided with a first metal sealing top ring; the bottom surface of the receiving filter chip is provided with a second metal sealing top ring; the top surface of the protective cap is provided with a metal sealing bottom ring, the metal sealing bottom ring comprises a metal sealing bottom ring first area, a metal sealing bottom ring second area and a metal sealing bottom ring third area, the metal sealing bottom ring first area corresponds to the first metal sealing top ring, the metal sealing bottom ring second area corresponds to the second metal sealing top ring, and the metal sealing bottom ring third area is connected with the metal sealing bottom ring first area and the metal sealing bottom ring second area; the duplexer has a plurality of additional ground shield structure, every additional ground shield structure includes from top to bottom in proper order: the top of the additional metalized through hole is in contact with the third area of the metal sealing bottom ring, and the bottom of the buried bottom electric connection structure is in contact with the grounding metal pattern.
Optionally, the positions of the plurality of additional metalized vias satisfy the following condition: the vertical projection of the plurality of additional metallized vias is located between the transmit filter chip and the receive filter chip.
Optionally, the positions of the plurality of additional metalized vias satisfy the following condition: the vertical projections of the additional metallized through holes are positioned between the transmitting filter chip and the receiving filter chip and on the left side and the right side of the transmitting filter chip and the receiving filter chip.
Optionally, the positions of the plurality of additional metalized vias satisfy the following condition: the vertical projections of the additional metallized through holes are positioned between the transmitting filter chip and the receiving filter chip and on the front side and the rear side of the transmitting filter chip and the receiving filter chip.
Optionally, the positions of the plurality of additional metalized vias satisfy the following condition: the additional metallized through holes are positioned at the positions where shielding needs to be added between the electric connections of the ground of the transmitting filter chip or the receiving filter chip.
Optionally, the cross-section of the plurality of additional metalized through holes is triangular, circular, elliptical or convex polygonal.
Optionally, the middle electrical connection structure is a solder ball.
Optionally, the buried bottom electrical connection structure is a base metalized via.
The invention provides a duplexer for improving isolation by using a sealing ring structure, which can improve the mutual inhibition level and the isolation level between a receiving channel and a transmitting channel, cannot cause the increase of pass band insertion loss, cannot cause the large increase of the whole size of a chip and the increase of the complexity of a manufacturing process due to the introduction of an additional discrete reactive device, saves space and reduces cost.
Drawings
The drawings are included to provide a better understanding of the invention and are not to be construed as unduly limiting the invention. Wherein:
fig. 1 is a schematic diagram of a basic structure of a duplexer based on an FBAR implementation in the prior art;
fig. 2 is a schematic top view of the duplexer of fig. 1;
fig. 3 is a schematic view of a protective cap in the duplexer of fig. 1;
fig. 4 is a schematic cross-sectional view of the duplexer of fig. 1;
FIG. 5 is a schematic view of a protective cap of a duplexer in accordance with an embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a duplexer in accordance with an embodiment of the present invention;
fig. 7 is a schematic view of a protective cap of a duplexer of an embodiment of the present invention;
FIG. 8 is a schematic cross-sectional view of a duplexer in accordance with an embodiment of the present invention;
fig. 9 is a schematic diagram of a protective cap of a triplexer according to an embodiment of the present invention;
fig. 10 is a schematic cross-sectional view of a triplexer in accordance with an embodiment of the present invention;
fig. 11 is a schematic diagram of a protective cap of a quadruple duplexer in accordance with an embodiment of the present invention;
fig. 12 is a schematic cross-sectional view of a quad duplexer according to an embodiment of the present invention;
FIG. 13 is a graph comparing isolation curves;
FIG. 14 is a graph comparing transmission curves;
fig. 15 is a comparison of pass band amplification curves.
Detailed Description
The invention is further described with reference to the following figures and examples.
Fig. 1 is a schematic diagram of a basic structure of a duplexer implemented based on an FBAR in the prior art. The duplexer mainly includes a substrate SU, a protective cap, a reception filter chip TX, and a transmission filter chip RX. The substrate SU may have a double-layer or multi-layer structure, which may perform a load-bearing function on one hand and may also perform an electrical connection function on the other hand. The protective cap can be made on the basis of a silicon substrate for protecting the active pattern area on the chip. The receiving filter chip TX and the transmitting filter chip RX may be manufactured by FBAR process, respectively, the chips include a filter structure formed by resonators manufactured by FBAR process, and the effective pattern areas are located on the sides of the receiving filter chip TX and the transmitting filter chip RX facing the protective cap.
Fig. 2 is a view looking down from the X direction in fig. 1, and assuming that the FBAR active pattern areas located on the lower surfaces of the reception filter chip TX and the transmission filter chip RX are seen after the upper surfaces of the reception filter chip TX and the transmission filter chip RX are transparent. The grey parts of the figure are schematic diagrams of FBAR resonators. Fig. 2 shows that a circle of metal seal ring structure SR is provided around the active pattern region, and the same metal seal ring structure is provided at the corresponding position on the protective cap, and the metal seal ring structure SR plays a main role in bonding the receiving filter chip TX, the transmitting filter chip RX, and the protective cap into a whole and sealing and protecting the active pattern region. The electrical connections required in the filter structure are then led out of the pattern area through the metallized through holes VA and conducted to the corresponding metal pads on the lower surface of the protective film cap.
A detailed structure of the protective cap of fig. 1 is given in fig. 3. The metal sealing structure on the protective cap is divided into two independent parts SR _ TX and SR _ RX, which respectively correspond to the respective metal sealing rings SR of the receiving filter chip TX and the transmitting filter chip RX.
Fig. 4 is a side view as seen from the Y direction in fig. 1, from which the structure in fig. 1 and 2 can be more clearly understood. As can be seen from fig. 4, the metal seal ring structures SR of the receiving filter chip TX and the transmitting filter chip RX are bonded to the corresponding metal seal rings SR _ RX and SR _ TX on the cap, so as to seal the effective pattern area within the sealed space formed by the metal seal ring structures, as shown by the gray area in the figure. The electrical connection required by the pattern area is led out to the metal bonding pad PD on the lower surface of the protective cap through the metallization through hole VA, and then is connected with the corresponding metal bonding pad LD on the substrate SU through the solder ball BP. The lower surface of the substrate SU usually has a large-area ground metal pattern GND.
The above is the FBAR duplexer structure implemented based on the prior art. In this configuration, all electrical signals on TX and RX chips are conducted to the substrate SU through the vias VA and the solder balls BP. Because VA and BP of the TX and RX chips are not shielded from each other, they generate electromagnetic coupling and crosstalk with each other, and signal interference and leakage between the receive filter and the transmit filter occur, thereby causing poor isolation and mutual suppression between the receive channel and the transmit channel. The method provided by the patent is specially used for solving and improving the problem.
The duplexer comprises a substrate SU, a protective cap positioned on the substrate, a transmitting filter chip TX and a receiving filter chip RX positioned on the protective cap, wherein the bottom of the substrate SU is provided with a grounding metal pattern GND; the bottom surface of the transmission filter chip TX has a first metal sealing top ring SR 1; the bottom surface of the reception filter chip RX has a second metal seal top ring SR 2. The top surface of the protective cap has a metal sealing bottom ring SR _ TRX. The metal sealing bottom ring SR _ TRX comprises a metal sealing bottom ring first region, a metal sealing bottom ring second region and a metal sealing bottom ring third region, wherein the metal sealing bottom ring first region corresponds to the first metal sealing top ring SR1, the metal sealing bottom ring second region corresponds to the second metal sealing top ring SR2, and the metal sealing bottom ring third region is connected with the metal sealing bottom ring first region and the metal sealing bottom ring second region. The duplexer also has a plurality of additional ground shield structures. Every additional ground connection shielding structure includes from top to bottom in proper order: an additional metallization via VAS running through the protective cap, a middle electrical connection structure, and a buried bottom electrical connection structure running through the substrate SU, wherein the top of the additional metallization via VAS is in contact with the third region of the metal sealing bottom ring SR _ TRX, and the bottom of the buried bottom electrical connection structure is in contact with the ground metal pattern GND.
Specifically, the middle electrical connection structure may be a solder ball BPS. The buried electrical connection structure may be a base metalized via. It should be noted that usually the bottom of the additional metallized via VAS and the top of the buried bottom electrical connection structure are also provided with a foil structure to facilitate their connection with the middle electrical connection structure.
Optionally, the positions of the plurality of additional metallized vias satisfy the following condition: the vertical projection of the plurality of additional metallized vias is located between both the transmit filter chip and the receive filter chip.
Optionally, the positions of the plurality of additional metallized vias satisfy the following condition: the vertical projections of the additional metallized through holes are positioned between the transmitting filter chip and the receiving filter chip and on the left side and the right side of the transmitting filter chip and the receiving filter chip. The specific meaning of "left and right sides" means: if the transmitting filter chip and the receiving filter chip are defined as being horizontally arranged from left to right, the left side of the transmitting filter chip is the left side, and the right side of the receiving filter chip is the right side.
Optionally, the positions of the plurality of additional metallized vias satisfy the following condition: the vertical projections of the additional metallized through holes are positioned between the transmitting filter chip and the receiving filter chip and on the front side and the rear side of the transmitting filter chip and the receiving filter chip. The specific meaning of the front and back sides is that: if the transmitting filter chip and the receiving filter chip are defined to be horizontally arranged left-right, then an outer rectangular frame is formed, and two sides other than the left and right sides of the outer rectangular frame, i.e., the front side and the rear side, are defined, so that the "front and rear sides" can be defined.
Optionally, the positions of the plurality of additional metallized vias satisfy the following condition: the additional metallized vias are located where additional shielding is needed between the point connections to the respective grounds of the transmit filter chip or the receive filter chip itself.
Optionally, the cross-section of the plurality of additional metalized vias is rectangular, triangular, circular, oval or convex polygonal. As long as the shape that can be realized by the actual process is possible.
The circuit structure of the duplexer provided in this embodiment has various forms, which are specifically as follows:
example one
In the prior art, the metal seal ring SR on the protective cap is originally divided into two independent parts SR _ TX and SR _ RX, which are used for bonding with the corresponding metal seal rings SR on the transmitting filter chip TX and the receiving filter chip RX, respectively.
Fig. 5 and 6 are a schematic view and a schematic cross-sectional view, respectively, of a protective cap of a duplexer in accordance with an embodiment of the present invention. As shown in fig. 5, the originally separated SR _ TX and SR _ RX are connected to form an integral metal sealing bottom ring SR _ TRX, and a plurality of additional metallized through holes VAS are added to the metal sealing bottom ring SR _ TRX. After the above-mentioned improvement on the conventional duplexer, the duplexer cross-sectional view in fig. 4 becomes the duplexer cross-sectional view shown in fig. 6. As shown in fig. 6, after the first metal sealing top ring SR1 corresponding to the transmitting filter chip TX and the second metal sealing top ring SR2 corresponding to the receiving filter chip RX are bonded to the metal sealing bottom ring SR _ TRX on the protective cap, an integral metal sealing structure is formed. Meanwhile, an additional metalized through hole VAS on the metal sealing bottom ring SR _ TRX is connected with a corresponding metal conductor pattern PDS on the protective cap, and the metal conductor pattern PDS is connected with a grounding metal pad GND on the substrate SU through a solder ball BPS. This corresponds to the shielding structure formed by the metal seal ground SR _ TRX, the corresponding metal conductor pattern PDS, the solder ball BPS, and the ground metal pad GND, as shown in the gray portion of fig. 6. The shielding structure plays a role in isolation between the metalized through holes VA and the solder balls BP of the transmitting filter chip TX and the receiving filter chip RX, and can effectively reduce electromagnetic coupling and mutual interference between the transmitting filter chip TX and the receiving filter chip RX, so that mutual inhibition and isolation between a receiving channel and a transmitting channel are improved. Since no other modifications are made to the original designed resonator active pattern area, there is no adverse effect on the passband performance.
Example two
Fig. 7 and 8 are a schematic view and a schematic sectional view, respectively, of a protective cap of a duplexer according to an embodiment of the present invention.
In comparison with fig. 5, in fig. 7, in addition to the shielding structure formed by the additional metalized via VAS and the metal conductor pattern PDS disposed in the middle of the two chips shown in fig. 5, the same shielding structure formed by the additional metalized via VAS and the metal conductor pattern PDS is added to the left and right edges of the metalized sealing bottom ring SR _ TRX, and the cross section thereof is shown in the gray portion in fig. 8. This can further increase the shielding effect of the metal seal ring to ground.
EXAMPLE III
Fig. 9 and fig. 10 are a schematic diagram and a schematic cross-sectional diagram of a protective cap of a triplexer according to an embodiment of the present invention.
In comparison with fig. 5, in fig. 9, in addition to the shielding structure formed by the additional metalized via VAS and the metal conductor pattern PDS arranged in the middle of the two chips shown in fig. 5, the same shielding structure formed by the additional metalized via VAS and the metal conductor pattern PDS is added at the front and rear edge positions of the metalized sealing bottom ring SR _ TRX, and the cross section thereof is shown in the gray part in fig. 10. This can further increase the shielding effect of the metal seal ring to ground.
Example four
Fig. 11 and 12 are a schematic diagram and a schematic cross-sectional diagram of a protective cap of a quadruple duplexer according to an embodiment of the present invention, respectively.
Fig. 11 is compared with fig. 5, and in addition to the shielding structure formed by the additional metallized via VAS and the metal conductor pattern PDS arranged in the middle of the two chips shown in fig. 5, a shielding structure formed by the additional metallized via VAS and the metal conductor pattern PDS is also added and connected to the metal sealing bottom ring SR _ TRX where additional shielding is needed between the respective grounded electrical connections of the transmitting filter chip TX and the receiving filter chip RX themselves, and the cross section is shown in the gray part in fig. 12. This can further increase the shielding effect of the metal seal ring to ground. Since the additional metallized via VAS added in this case is not necessarily at the edge of the seal ring, it is indicated in the figure by a broken grey colour. This improves the coupling between the respective ground ports of the transmit filter chip TX and the receive filter chip RX themselves by the shielding effect of the metal seal ring ground.
To illustrate the practical effects of the embodiments of the present invention, an example of the design of a duplexer is given. For comparison, fig. 4 and fig. 6 are used for the duplexer design of the same design, i.e., the prior art and the proposed technology are used for comparison, respectively.
Fig. 13 is a graph comparing isolation curves, in which a thick line S1 is a curve corresponding to a conventional duplexer, and a thin line S2 is a curve corresponding to a duplexer according to an embodiment of the present invention. It is clear that the isolation of S2 is significantly better than S1 in both the 1740 MHz-1780 MHz and 1810 MHz-1850 MHz frequency bands of interest. It can be shown that the method for improving the isolation of the sealing ring provided by the patent has obvious effect.
Fig. 14 is a comparison graph of transmission characteristics, in which a thick line S1 is a curve corresponding to a conventional duplexer, and a thin line S2 is a curve corresponding to a duplexer according to an embodiment of the present invention. It can be seen that the mutual suppression is also improved in the two frequency bands of 1740 MHz-1780 MHz and 1810 MHz-1850 MHz.
Fig. 15 is a comparison graph of passband amplification curves, wherein a thick line S1 is a curve corresponding to a conventional duplexer, and a thin line S2 is a curve corresponding to a duplexer according to an embodiment of the present invention. It can be seen that the passband transmission characteristic curves obtained by the two design methods are not different and are basically overlapped, which indicates that the method for improving the isolation degree by the sealing ring provided by the patent cannot generate any adverse effect on the passband performance.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.