CN110335811B - Deposition method of oxygen-containing polycrystalline silicon passivation film and chip with passivation film - Google Patents
Deposition method of oxygen-containing polycrystalline silicon passivation film and chip with passivation film Download PDFInfo
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- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
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Abstract
The invention belongs to the technical field of semiconductor chip passivation, and particularly relates to a deposition method of an oxygen-containing polycrystalline silicon passivation film and a chip with the passivation film. The invention provides a deposition method of an oxygen-containing polycrystalline silicon passivation film, which is characterized in that raw material silyl ether and oxygen are subjected to chemical vapor deposition reaction in a reaction chamber under the conditions of normal pressure and low temperature, nitrogen is used as a carrying gas and a diluent gas, and a mixture of reaction products of silicon, silicon monoxide and silicon dioxide is deposited on a wafer placed in the reaction chamber in a film form under a certain reaction condition by adjusting the molar ratio of the oxygen to the silyl ether. The deposition method can deposit the polycrystalline passivation film of silicon, silicon monoxide and silicon dioxide on the wafer under the conditions of normal pressure and low temperature, does not need special gas equipment and vacuum equipment, and has simple method and low cost.
Description
Technical Field
The invention relates to the technical field of chip passivation, in particular to a deposition method of an oxygen-containing polycrystalline silicon passivation film and a chip with the passivation film.
Background
In order to ensure that the electrical characteristics of each PN junction are not affected by the natural environment, the surface of the junction exposed to the environment is usually first subjected to a protective sealing treatment during the manufacturing process, and isolation from the environment is generally achieved by covering the junction surface with a protective film, which is technically referred to as surface passivation. Chips having different electrical characteristics have different requirements for passivation, and surface passivation is generally achieved by changing the type and thickness of the protective film. The kind of film may be classified into glass, silicon oxide, silicon nitride, semi-insulating polysilicon (SIPOS), etc. depending on the material of its composition, and different forming methods result in different physical characteristics and different costs even for the same film.
For mesa structured chips, a glass passivation process is typically used to coat the periphery of the mesa with glass that covers all of the PN junction surfaces exposed at the sides of the mesa. Glass is a good insulating material, but there are bubbles in the glass that cannot be removed, and the breakdown voltage of the bubbles is low, which is related to the size of the bubbles. When the bubble on the surface of the junction breaks down under a certain voltage, a tiny current flows through the broken bubble, and when the sum of the current and other leakage currents on the surface and reverse currents in the chip body reaches a test current of breakdown voltage, the breakdown voltage is made to reach a breakdown judgment condition in advance when the breakdown voltage is smaller than that in the body, so that the breakdown voltage is reduced, and the reduced amount is the breakdown voltage of a plurality of bubbles connected in parallel. The current flowing through the breakdown bubble will be the bypass current of the PN junction at that voltage, and if the applied voltage at that time is the voltage that tests the PN junction leakage current, the leakage current at that time will be the leakage current of the PN junction itself plus the bypass current flowing through the bubble. So the leakage current increases at this time and the lower the breakdown voltage of the PN junction, the narrower its space charge region at that voltage, the larger the increase in leakage current of the junction, with the increase in bypass current through the bubble.
In order to eliminate the influence of bubbles on the glass-silicon interface on the reverse characteristic of the PN junction, the deposited thin film can be used for replacing the glass on the side surface of the table-board for the low-voltage PN junction in a tunnel breakdown mode or a tunnel-avalanche mixed breakdown mode, and the bypass current formed after the bubble breakdown does not exist because no bubble exists in the film, so that the leakage current in the test under the same reverse voltage can be greatly reduced compared with the glass passivation. The common passivation film is typically silicon dioxide, semi-insulating polysilicon, deposited on the wafer surface by Low Pressure Chemical Vapor Deposition (LPCVD), and then removed by photolithography to remove unwanted films outside the passivation region. However, the equipment for realizing LPCVD is extremely expensive, and the raw material gas Silane (SiH) is4) Is inflammable and explosive, while the raw material gas nitrous oxide (laughing gas) has an anesthetic effect, and both of them need to be treated as special gases.
Disclosure of Invention
The invention aims to solve the problems that equipment is expensive and raw material gas is special gas when a low-pressure chemical vapor deposition method is adopted in the prior art, and provides a deposition method of an oxygen-containing polycrystalline silicon passivation film and a chip with the passivation film.
The technical scheme of the invention is as follows:
the deposition process of oxygen-containing polycrystalline silicon passive film includes the steps of using silicon ether and oxygen as material at normal pressure and low temperatureThe chemical vapor deposition reaction is carried out in a reaction chamber under the condition, nitrogen is taken as a carrying gas and a diluent gas, and the mixture of reaction products of silicon, silicon monoxide and silicon dioxide is deposited on a wafer placed in the reaction chamber in a film form under certain reaction conditions by adjusting the molar ratio of oxygen to silyl ether. Silyl ethers of the formula C6H18OSi2After decomposition in the reaction chamber, a passivation film containing silicon, silicon monoxide and silicon dioxide polycrystal (oxygen-containing polysilicon for short) and gaseous hydrocarbon are formed, the oxygen-containing polysilicon is deposited on the surface of the wafer and the inner wall of the reaction chamber, and the hydrocarbon is carried out of the reaction chamber by nitrogen. When the temperature in the reaction chamber is fixed, the concentration of the silicon ether in the reaction chamber is controlled by controlling the flow of the nitrogen used as the carrying gas, so that the deposition rate of the oxygen-containing polycrystalline silicon passivation film is controlled.
Further, the molar ratio of the oxygen to the silicon ether is 0-8. When the volume of oxygen in the reaction chamber is 0, the silyl ether is decomposed into a mixture of silicon, silicon monoxide and silicon dioxide, and the mixture is deposited on the surface of a wafer arranged in the reaction chamber and the inner wall of the reaction chamber in a form of a thin film; when the oxygen volume in the reaction chamber is more than 0, the silicon ether is firstly decomposed into a mixture of silicon, silicon monoxide and silicon dioxide, then the silicon and the silicon monoxide react with the oxygen to be partially or totally converted into the silicon dioxide, the conversion ratio is related to the molar ratio of the oxygen to the silicon ether, and the silicon dioxide is close to pure silicon dioxide when the molar ratio of the oxygen to the silicon ether is more than 3/2. The conversion process can only occur when two gas molecules collide, so that the proportion of silicon dioxide in the mixture can be ensured to be larger only when the concentration of oxygen is far greater than that of silicon ether and the probability of collision is higher.
Further, the low temperature range is 400-650 ℃.
Further, the reaction chamber is cylindrical and made of quartz or silicon carbide.
Further, the silicon ether is introduced into the reaction chamber in a nitrogen carrying mode, the silicon ether is carried by the nitrogen in a constant-temperature bubbling mode, the temperature is set to be 35 ℃, and the flow rate of the nitrogen as carrying gas is 5-10 ml/min. And (3) filling the silicon ether into a bubbling bottle, mixing the silicon ether steam and nitrogen in a bubbling mode, and taking the mixture out of the bubbling bottle, wherein the flow of the nitrogen can be regulated and controlled. In order to precisely control the concentration of the silyl ether in the reaction chamber as the flow rate of the nitrogen gas as the carrier gas is constant, it is necessary to precisely control the volatilization rate of the silyl ether, and a constant temperature apparatus is generally used to maintain the bubbling bottle and the silyl ether therein at a constant temperature to obtain a constant volatilization rate.
Further, the nitrogen gas is used as the diluting gas, the flow rate is 50-100ml/min, and the nitrogen gas for diluting is supplied to the reaction chamber and is introduced into the pipeline in a converging way. Usually, another nitrogen gas is fed into the same pipeline near the outlet of the bubbling bottle, the flow rate of the nitrogen gas is adjustable and is generally larger than that of the carrier gas flowing out of the bubbling bottle, and the high-concentration silicon ether gas carried out of the bubbling bottle can be diluted.
Furthermore, the method for introducing oxygen into the reaction chamber is that a pipeline is merged and introduced, and the flow range of the introduced oxygen is 0-50 ml/min. Oxygen is added to the carrier gas line at the inlet of the reaction chamber, the flow rate of oxygen is usually much less than the flow rate of the carrier gas and needs to be precisely controlled. It is apparent that if the amount of oxygen is 0, the amount of oxygen in the oxygen-containing polysilicon film is only that in the silicon ether molecules, and the proportion of oxygen in the polysilicon film is 1/3, when oxygen is added to the reaction chamber, the amount of oxygen in the film will increase on the basis of 1/3 as the amount of oxygen increases until all becomes silicon dioxide.
Further, the temperature gradient in the airflow direction in the reaction chamber is 3 ℃/10cm, and the reaction time is 90-120 min. In order to obtain the concentration of the reaction product silicon or silicon oxide as uniform as possible in the path of the flow of the silyl ether in the reaction chamber, it is necessary to control the decomposition rate, so that the balance between the deposition consumption and the decomposition yield is obtained by gradually increasing the concentration of the reaction product by providing a temperature gradient in the flow direction of the silyl ether. The temperature of the end of the raw material just entering the reaction chamber is higher than 400 ℃, and the temperature is increased by 3 ℃ within the range of not exceeding 650 ℃ every 10cm in the airflow direction. The deposition time is between 90-120min according to the requirement of the passivation effect of the film.
Further, a chip prepared by the deposition method of the oxygen-containing polycrystalline silicon passivation film is characterized in that the polycrystalline passivation film of silicon, silicon monoxide and silicon dioxide mixture or the silicon dioxide passivation film is deposited on the surface of the chip.
The invention has the beneficial effects that:
the deposition method of the oxygen-containing polycrystalline silicon passivation film provided by the invention can react under the conditions of normal pressure and low temperature, adopts the silicon ether and the oxygen as reaction raw materials, can obtain the passivation effect similar to that of a low-pressure chemical vapor deposition film with the same oxygen content without special gas equipment and vacuum equipment, and is simple to operate and low in cost compared with expensive equipment of the low-pressure chemical vapor deposition method.
Drawings
Fig. 1 shows a low breakdown voltage bidirectional TVS chip using a deposited film of silyl ether as a passivation film obtained in example 10 of the present invention.
Detailed Description
The technical solutions of the present invention are further described below with reference to specific embodiments, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, those skilled in the art can obtain other embodiments without creative efforts, which belong to the protection scope of the present invention.
The invention provides a deposition method of an oxygen-containing polycrystalline silicon passivation film.
Example 1
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 400 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 5ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 5ml/min into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 50 ml/min; the reaction time is 110min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
Example 2
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 450 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 6ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 20ml/min into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 60 ml/min; the reaction time is 110min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
Example 3
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 500 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 7ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 30ml/min into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 70 ml/min; the reaction time is 100min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
Example 4
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 550 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 8ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 40ml/min into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 80 ml/min; the reaction time is 90min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
Example 5
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 600 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 10ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 50ml/min into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 100 ml/min; the reaction time is 90min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
Example 6
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 550 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 5ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 5ml/min into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 100 ml/min; the reaction time is 100min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
Example 7
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 550 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 10ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 50ml/min into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 50 ml/min; the reaction time is 90min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
Example 8
Putting the wafer into a reaction chamber, setting the temperature of the gas flow inlet end of the reaction chamber to be 550 ℃, and setting the temperature gradient in the gas flow direction to be 3 ℃/10 cm; filling the silicon ether into a bubbling bottle, setting the temperature of a constant temperature device to be 35 ℃, setting the flow rate of nitrogen carrying the silicon ether to be 10ml/min, introducing the silicon ether into a reaction chamber, introducing oxygen with the flow rate of 0 into the reaction chamber, and introducing nitrogen for dilution with the flow rate of 50 ml/min; the reaction time is 90min, until the mixture of the reaction products of silicon, silicon monoxide and silicon dioxide is deposited on the surface of the wafer in the form of a film.
The invention also provides a chip prepared by the method.
Example 9
The passivation film containing oxygen polycrystalline silicon is used for passivating a rectifying chip with breakdown voltage of more than 1000V, and comprises the following steps:
(1) selecting a wafer: 4' N type <111> crystal orientation, rho is 35-40 omega cm, thickness is 0.28mm, and the surface is not polished.
(2) And (5) cleaning.
(3) Clamping a piece of phosphorus paper (phosphorus diffusion source) between every two wafers to form a group, and then stacking each group together and loading the group into a diffusion boat; thus, one side of each wafer will be diffused with phosphorus and a high concentration phosphorus diffusion layer will be formed.
(4) The diffusion boat carrying the wafer and the paper source is pushed into a constant temperature area in the diffusion furnace tube.
(5) Diffusion for 4 hours at 1215 ℃; the temperature rising slope from 600 ℃ to 1215 ℃ is 5 ℃/min, and the temperature falling slope from 1215 ℃ to 600 ℃ is 1.2 ℃/min.
(6) And soaking hydrofluoric acid to separate the wafer.
(7) And thinning the side without phosphorus diffusion by 10-15 microns by using a grinding or sand blowing method.
(8) And (5) cleaning.
(9) Spin-coating ethylene glycol ethyl ether solution dissolved with saturated boron trioxide on the side of the wafer not expanded with phosphorus; wherein boron is used as a P-type impurity diffusion source.
(10) And (3) oppositely overlapping the surfaces of every two wafers coated with the boron diffusion source to form a group, and then overlapping each group and loading into a diffusion boat.
(11) The diffusion boat carrying the wafer and the paper source is pushed into a constant temperature area in the diffusion furnace tube.
(12) Diffusion for 24 hours at 1260 ℃; the temperature rising slope from 600 ℃ to 1260 ℃ is 5 ℃/min, and the temperature falling slope from 1260 ℃ to 600 ℃ is 1.2 ℃/min.
(13) Soaking hydrofluoric acid to separate the wafer; the side which expands boron is now defined as P+And (5) kneading.
(14) Each surface is thinned by 1-3 microns.
(15) High-temperature wet oxygen oxidation for 40min at 1000 ℃.
(16)P+Etching window with one-time photoetching and ditching for trenchAnd (4) a mouth. The back is only coated with glue and is not patterned.
(17) And etching a channel and removing photoresist.
(18) And (5) RCA cleaning.
(19) The deposition method of the polycrystalline passivation film on the surface of the wafer is the same as that of examples 1-8.
(20)P+And carrying out secondary photoetching on the surface and opening a mesa metalized contact window.
(21) Electroless nickel or electroless nickel gold.
(22) And (6) point measurement.
(23) And (5) back laser cutting.
(24) And (4) splitting and separating chips.
Example 10
The oxygen-containing polycrystalline silicon passivation film is used for passivating a low breakdown voltage bidirectional TVS (transient diode) chip of 6.4-7.1V, and the obtained chip is shown in figure 1; the passivation steps are as follows:
(1) selecting a wafer: 4' P type <111> crystal orientation, rho is 0.002-0.004 omega.cm, the thickness is 0.28mm, and the surface is not polished.
(2) And (5) cleaning.
(3) The wafers were stacked together with the phosphor paper in the order wafer-phosphor paper (phosphor diffusion source) -wafer-phosphor paper … … wafers and loaded into a diffusion boat. Phosphorus contained in the phosphorus paper is taken as an N-type impurity source; thus, phosphorus is diffused into two sides of the wafer and PN is formed at a certain depth from the surface+And (6) knotting.
(4) The diffusion boat carrying the wafer and the paper source is pushed into a constant temperature area in the diffusion furnace tube.
(5) Diffusion for 6 hours at 1215 ℃; the temperature rising slope from 600 ℃ to 1215 ℃ is 5 ℃/min, and the temperature falling slope from 1215 ℃ to 600 ℃ is 1.2 ℃/min.
(6) And soaking hydrofluoric acid to separate the wafer.
(7) High-temperature wet oxygen oxidation for 40min at 1000 ℃.
(8) And photoetching the two sides once, and etching windows in the ditches.
(9) And etching a channel and removing photoresist.
(10) And (5) RCA cleaning.
(11) The deposition method of the polycrystalline passivation film on the surface of the wafer is the same as that of examples 1-8.
(12) And carrying out double-sided secondary photoetching or respectively carrying out secondary photoetching on the front surface and the back surface, and opening a mesa metalized contact window.
(13) Electroless nickel or electroless nickel gold.
(14) Double-sided spot measurement or spot measurement on the front and back sides respectively.
(15) And (5) laser cutting.
(16) And (4) splitting and separating chips.
Examples of the experiments
The 40 PN junctions in the 20 silicon ether deposited film passivated bidirectional TVS chip sample prepared in the embodiment 10 of the invention are tested, and the test data are shown in the left half part of the following table; for comparison, the experimental example also shows the test data of wafers and 20 glass passivated bi-directional TVS samples with the same manufacturing background, as shown in the right half of the following table:
wherein, the IR1 and the IR2 are respectively the leakage current of two junctions in each sample, and the unit is muA; VB1 and VB2 are the corresponding breakdown voltages, respectively, in V.
As can be seen from the data in the table, the average leakage currents of the glass passivation and the silicon ether deposited film passivation PN junction are 234.89uA and 47.00uA respectively, and the leakage current of the silicon ether deposited film passivation sample is much smaller than that of the glass passivation product.
The above description is only for the preferred embodiment of the present invention and should not be taken as limiting the invention, and it should be understood that any modification and equivalents within the scope of the present invention should be included in the patent protection scope of the present invention for those skilled in the art without departing from the principle of the present invention.
Claims (7)
1. A deposition method of an oxygen-containing polycrystalline silicon passivation film is characterized in that raw materials of silicon ether and oxygen are subjected to chemical vapor deposition reaction in a reaction chamber under the conditions of normal pressure and low temperature of 400-600 ℃, nitrogen is used as a carrying gas and a diluting gas, the reaction is carried out for 90-120min under the reaction condition that the temperature gradient in the airflow direction is 3 ℃/10cm by adjusting the molar ratio of the oxygen to the silicon ether, and a mixture of reaction products of silicon, silicon monoxide and silicon dioxide is deposited on a wafer placed in the reaction chamber in a form of a thin film.
2. The method as claimed in claim 1, wherein the molar ratio of oxygen to silicon ether is 0-8.
3. The deposition method of the oxygen-containing polycrystalline silicon passivation film according to claim 1, wherein the reaction chamber is cylindrical and made of quartz or silicon carbide.
4. The deposition method of the oxygen-containing polycrystalline silicon passivation film according to claim 1, wherein the silicon ether is introduced into the reaction chamber in a nitrogen carrying mode, the silicon ether is carried by the nitrogen in a constant-temperature bubbling mode, the temperature is set to be 35 ℃, and the flow rate of the nitrogen as the carrying gas is 5-10 ml/min.
5. The deposition method of the oxygen-containing polycrystalline silicon passivation film according to claim 1, wherein the flow rate of the nitrogen as the diluent gas is 50-100ml/min, and the nitrogen for dilution is supplied to the reaction chamber and is introduced into a pipeline in a converging manner.
6. The deposition method of the oxygen-containing polycrystalline silicon passivation film according to claim 1, wherein the oxygen is introduced into the reaction chamber by pipeline confluence, and the flow rate of the introduced oxygen is in a range of 0-50 ml/min.
7. The chip prepared by the deposition method of the oxygen-containing polycrystalline silicon passivation film according to any one of claims 1 to 6, wherein the surface of the chip is deposited with a polycrystalline passivation film of silicon, silicon monoxide, silicon dioxide mixture or a silicon dioxide passivation film.
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| CN102222601A (en) * | 2010-04-14 | 2011-10-19 | 中芯国际集成电路制造(上海)有限公司 | Method for enhancing sharpness of wafer ID |
| CN103757607A (en) * | 2013-12-31 | 2014-04-30 | 刘键 | Organic device packaging method and device |
| CN103958731A (en) * | 2011-09-30 | 2014-07-30 | 阿科玛股份有限公司 | Deposition of silicon oxide by atmospheric pressure chemical vapor deposition |
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| CN102222601A (en) * | 2010-04-14 | 2011-10-19 | 中芯国际集成电路制造(上海)有限公司 | Method for enhancing sharpness of wafer ID |
| CN103958731A (en) * | 2011-09-30 | 2014-07-30 | 阿科玛股份有限公司 | Deposition of silicon oxide by atmospheric pressure chemical vapor deposition |
| CN103757607A (en) * | 2013-12-31 | 2014-04-30 | 刘键 | Organic device packaging method and device |
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Denomination of invention: A deposition method for oxygen-containing polycrystalline silicon passivation film and a chip with the passivation film Granted publication date: 20210810 Pledgee: Bank of Beijing Co.,Ltd. Jinan Branch Pledgor: Shandong Bao Cheng Electronics Co.,Ltd. Registration number: Y2024980002269 |