CN110333933A - A Simulation Method of HPL Calculation Model - Google Patents

Abstract

An HPL calculation model simulation method disclosed by the present invention comprises the steps in the following sequence: obtaining system configuration parameters such as CPU, GPU, and MISC input by the user, and determining the amount of simulation calculation tasks on the CPU and GPU according to the computing power of the CPU and GPU The allocation ratio of the corresponding task is simulated and calculated on the CPU and GPU respectively, the time consumed by the simulation calculation is recorded, the floating-point performance of the system is calculated and analyzed, and the simulation results are displayed. The HPL calculation model simulation method of the present invention provides a visual interface, is easy to operate, and calculates and analyzes the floating-point calculation performance of the system through simulation. Compared with the traditional HPL test, the work efficiency is greatly improved, and it is also important for mining the bottleneck of system performance. helpful meaning.

Description

A Simulation Method of HPL Calculation Model

technical field

The invention relates to the field of computers, in particular to an HPL calculation model simulation method.

Background technique

With the rapid development of the information society, people's requirements for information processing capabilities are also rising. In recent years, driven by informatization, the HPC market has continued to expand and subdivide. The types and numbers of HPC applications have also continued to increase. In addition to traditional HPC applications (such as scientific research, oil exploration, meteorological environment, aerospace, national defense, etc.), especially the field of artificial intelligence that has attracted much attention in the past two years (such as self-driving cars , drones, face recognition, medical diagnosis, smart home, etc.) make HPC an important supporting platform, and gradually affect people's daily life.

Linpack is an international benchmark widely used to test the floating-point performance of high-performance computer systems. Through the test of high-performance computer using Gaussian elimination method to solve N-ary dense linear algebraic equations, evaluate the floating-point performance of high-performance computer.

HPL stands for High Performance Linpack, which is a Linpack test software package widely used in large-scale parallel systems, and it is a test scheme proposed for modern parallel computers. The user does not need to modify any test program, and executes the test program by adjusting the size of the problem N (matrix size), the number of CPUs used, and optimizing by various methods, so as to obtain better test performance. HPL uses Gaussian elimination method to solve linear equations, and its number of floating-point operations is fixed. When the problem size is N, it is (2N ³ /3+3N ² /2). Therefore, when the problem size N to be solved and the measured system computing time T are given, the peak value = (2N ³ /3+3N ² /2)/T can be easily calculated, and the unit is floating-point operations per second (Flops) .

With the continuous upgrading of product hardware, the computing power of computers is also increasing at an order of magnitude speed. Calculation peak has become an important criterion for measuring computer performance, such as floating-point calculation peak, which refers to the maximum number of floating-point operations that a computer can complete per second, including theoretical floating-point peaks and measured floating-point peaks.

The theoretical floating-point peak value is the maximum number of floating-point calculations that the computer can theoretically achieve per second, which is mainly determined by the main frequency of the CPU. Theoretical floating-point peak value = CPU main frequency × the number of times the CPU performs floating-point operations per clock cycle × the number of CPU cores in the system.

The measured floating-point peak value refers to the Linpack test value, that is, the test result of testing the floating-point capability of the machine by running the Linpack test program. As an indicator of machine performance, these two values are used to measure the processing power of the machine.

Although the traditional HPL system performance test software has been widely used in the performance test of various types of computers, and to a certain extent, its test results can correctly reflect some operating performance of the computing system, but with the rapid development of HPC Development, especially the promotion of heterogeneous computing systems, and the continuous expansion of application fields have also exposed the shortcomings of traditional HPL test software in many ways:

Traditional HPL test software only feeds back the test results to the user, but it cannot give the existing problems and the way to solve the problem, and cannot help the user quickly find out the performance bottleneck and the reason, and propose improvement suggestions for performance optimization.

Contents of the invention

The purpose of the present invention is to overcome the shortcomings and deficiencies of the prior art, and provide a HPL calculation model simulation method, which can overcome the technical problem that the existing HPL test software cannot detect system performance bottlenecks, and help users quickly find performance bottlenecks and Reasons, and put forward suggestions for improvement of performance optimization.

The purpose of the present invention is achieved through the following technical solutions:

A kind of HPL computing model emulation method, comprises the steps of following order:

Obtain system configuration parameters input by the user, the system configuration parameters including CPU, GPU, MISC parameters;

Determine the allocation ratio of simulation calculation tasks on CPU and GPU according to the computing power of CPU and GPU, perform simulation calculation on CPU and GPU respectively for corresponding tasks, record the time consumed by simulation calculation, and calculate and analyze the floating point of the system Performance, showing simulation results.

The CPU parameters include the number of CPU cores, frequency, the number of floating-point operations per clock cycle, and the number of CPUs; the GPU parameters include GPU frequency and the number of GPUs; the MISC parameters include problem scale, matrix block size, bus Bandwidth, bus efficiency factor, CPU parallel execution efficiency factor, GPU parallel execution efficiency factor, GEMM efficiency factor.

The configuration modes of the CPU, GPU, and MISC parameters include three modes: manual input, template input, and automatic input.

For the template input, the CPU type includes EPYC 7251, EPYC 7281, and Xeon Gold 6142, and the GPU type includes RX Vega 56, RX Vega 64, and Vega 10; when a CPU or GPU template is selected, the corresponding configuration parameters will be automatically filled.

The automatic input means that the HPL calculation model simulation method automatically obtains the configuration parameters of the machine.

According to the computing power of the CPU and the GPU, the distribution ratio of the simulated computing tasks on the CPU and the GPU is determined, which specifically includes the following steps:

(1) Calculate the total task volume:

W＝GFLOPS _CPU ·(t _CPU +t _T )+GFLOPS _GPU ·t _GPU

(2) Calculate the total amount of data transfer between CPU and GPU:

(3) Calculate the communication overhead of data transmission between CPU and GPU:

(4) Calculate the distribution ratio:

(5) Assign R·W tasks to GPU, and (1-R)·W tasks to CPU.

The corresponding tasks are respectively simulated and calculated on the CPU and the GPU, which specifically includes the following steps:

(1) Initialize the augmented matrix A|b: initialize the augmented matrix of the corresponding size according to the scale of the problem;

(2) Cyclic decomposition of the augmented matrix: based on the LU decomposition method, the augmented matrix is split according to the distribution ratio of the task amount, and the part of the matrix that needs to be transferred to the GPU memory after the split is transferred to the GPU memory;

The CPU executes cpu_dtrsm() to calculate the lower triangular matrix of the CPU part, and the GPU executes gpu_dtrsm() to calculate the lower triangular matrix of the GPU part;

The GPU transfers the result of the operation back to the memory, and at the same time performs HPL_dgemm() to split the augmented matrix according to the distribution ratio of the task amount, and transfers the part of the matrix that needs to be transferred to the GPU memory after the split to the GPU memory;

The CPU executes cpu_dgemm() to perform the CPU partial matrix multiplication operation, and the GPU executes gpu_dgemm() to perform the GPU partial matrix multiplication operation;

If the decomposition is not yet complete, the GPU will transmit the data back to the memory in parallel with the data required by the next round of HPL_dtrsm(). If the decomposition is complete, the results of the calculation will be transmitted back to the memory.

The time consumed by the record simulation calculation is specifically:

(1) Transfer part of the matrix that needs to be transferred to the GPU memory after the split to the GPU memory. If it is the first round, it will take t1 ₁ . Otherwise, it will be executed in parallel after the last round. Time-consuming: max(t1 _i ,t4 _{i- 1} );

(2) CPU executes cpu_dtrsm() time-consuming

(3) GPU executes gpu_dtrsm() time-consuming

(4) The above (2) (3) takes a total of time

(5) It takes time t2 _i for the GPU to transfer the completed calculation result back to the memory;

(6) Execute HPL_dgemm(), and transfer the part matrix that needs to be transferred to the GPU display memory after the split to the GPU display memory, which takes time t3 _i ;

(7) The above (5) (6) takes a total time max(t2 _i , t3 _i );

(8) CPU executes cpu_dgemm() time-consuming

(9) GPU executes gpu_dgemm() time-consuming

(10) The above (8) (9) total time-consuming

(11) It takes time t4 _i to transfer the completed result of the operation back to the memory;

(12) When the timing ends, the total time spent by the system is:

The floating-point performance of the calculation and analysis system is as follows:

(1) Measured floating-point performance, theoretical floating-point performance, and simulation calculation efficiency of the computing system;

Measured floating point performance:

Theoretical floating point performance:

v ₂ =FLOPS _CPU ·n _CPU ·η _{CPU_PARA} ·η _GEMM +FLOPS _GPU ·n _GPU ·η _{GPU_PARA} ·η _GEMM ;

Simulation calculation efficiency:

η=v ₁ /(FLOPS _CPU n _CPU +FLOPS _GPU n _GPU );

(2) Adjust the configuration parameters to obtain different simulation results, and then draw the relationship between the simulation calculation efficiency and the matrix block size under different configuration parameters.

The displayed simulation results include split constants, time-consuming simulation calculations, measured floating-point performance, theoretical floating-point performance, simulation calculation efficiency, change relationship diagram between simulation calculation efficiency and matrix block size under different configuration parameters, and system performance Bottlenecks and causes, and suggestions for performance optimization improvements.

Compared with the prior art, the present invention has the following advantages and beneficial effects:

1. The present invention uses a visual interface to perform the above operations, which is simple, fast and highly operable;

2. The present invention makes full use of the performance of the CPU and GPU, reasonably assigns tasks to the CPU and GPU for calculation, realizes load balancing, and improves the simulation test performance;

3. The simulation result of the present invention is similar to the real test result, which has important evaluation significance for the processing capacity of the machine;

4. The present invention can help users quickly find out performance bottlenecks and causes by analyzing simulation test data, and provide improvement suggestions for performance optimization.

Description of drawings

Fig. 1 is an overall working flow chart of an HPL calculation model simulation method according to the present invention.

Fig. 2 is a detailed working flow chart of an HPL calculation model simulation method according to the present invention.

Fig. 3 is a configuration parameter acquisition interface of an HPL calculation model simulation method according to the present invention.

FIG. 4 is an interface for displaying simulation results of an HPL calculation model simulation method according to the present invention.

Fig. 5 is a simulation efficiency diagram under different bus bandwidths of an HPL calculation model simulation method according to the present invention.

Fig. 6 is a simulation efficiency diagram under different GEMM efficiencies of an HPL calculation model simulation method according to the present invention.

Fig. 7 is a simulation result of an HPL calculation model simulation method described in the present invention under 2 Xeon Gold 6142 CPUs and 4 Vega 10 GPUs.

Fig. 8 is the real result of HPL test performed on a physical machine with 2 Xeon Gold 6142 CPUs and 4 Vega 10 GPUs by an HPL calculation model simulation method according to the present invention.

Detailed ways

The present invention will be further described in detail below in conjunction with the embodiments and the accompanying drawings, but the embodiments of the present invention are not limited thereto.

As shown in Figure 1-8, an HPL calculation model simulation method includes the following steps: obtain the system configuration parameters such as CPU, GPU, and MISC input by the user, and determine the amount of simulation calculation tasks between the CPU and GPU according to the computing capabilities of the CPU and GPU. For the distribution ratio on the GPU, simulate the corresponding tasks on the CPU and GPU respectively, record the time consumed by the simulation calculation, calculate and analyze the floating-point performance of the system, and display the simulation results.

(1) Acquisition of configuration parameters

As shown in Figure 3, a kind of HPL calculation model simulation platform provided by the present invention provides a visual operating environment, and by clicking the input box of the visual interface, the configuration of various parameters can be completed, and the configured CPU parameters include the number of CPU cores, frequency , the number of instructions executed in each clock cycle, the number of CPUs; the configured GPU parameters include GPU frequency and the number of GPUs; the MISC configuration includes problem scale, matrix block size, bus bandwidth, bus efficiency factor, CPU Parallel execution efficiency factor, GPU parallel execution efficiency factor, GEMM efficiency factor. In addition to manually entering parameters, it can also be configured according to the configuration template provided. The CPU types provided by this platform include EPYC 7251, EPYC 7281, Xeon Gold 6142, etc., and the GPU types include RX Vega 56, RX Vega 64, Vega 10, etc. You can also click Auto Fill to obtain the local configuration information to complete the automatic configuration. After the above configuration information is filled in, the system will automatically calculate the theoretical floating-point performance of the CPU and GPU, and fill them in the corresponding input boxes.

(2) HPL calculation model simulation platform starts simulation calculation

(1) Initialize the augmented matrix A|b of the corresponding size according to the input problem scale

(2) Start the HPL timing system

(3) Based on the LU decomposition method, the augmented matrix A|b is cyclically decomposed. Since the computing power of the CPU and the computing power of the GPU are quite different, and data transmission between the CPU and the GPU requires a certain amount of communication overhead, the allocation for the CPU and the GPU The calculation ratio will affect the overall performance of the system. According to the computing power of CPU and GPU, and considering the communication overhead of data transmission between CPU and GPU, the computing tasks of CPU and GPU are distributed in a balanced manner. The computing workload distribution ratio of CPU and GPU is as follows:

Then split the matrix that needs to be multiplied and added according to the task allocation ratio, and transfer the part of the matrix that needs to be transferred to the GPU memory after the split to the GPU memory. If it is the first round, it will take t1 ₁ , otherwise it will end with the last round. After parallel execution, time-consuming: max(t1 _i ,t4 _i-1 )

The CPU executes cpu_dtrsm() to calculate the lower triangular matrix of the CPU part. The GPU executes gpu_dtrsm() to calculate the time-consuming of the lower triangular matrix of the GPU part Parallel time-consuming

It takes time t2 _i for the GPU to transfer the result of the operation back to the memory, and at the same time perform HPL_dgemm() to split the matrix that needs to be multiplied and added according to the computing power of the CPU and GPU, and transfer the part of the matrix that needs to be transferred to the GPU memory after the split Transfer to GPU memory, time-consuming t3 _i , parallel time-consuming max(t2 _i ,t3 _i )

It takes time for the CPU to execute cpu_dgemm() to perform the matrix multiplication operation of the CPU part The GPU executes gpu_dgemm() to perform the matrix multiplication operation of the GPU part, which takes time Parallel time-consuming

If the decomposition of the GPU has not been completed, the GPU will transfer the data back to the memory in parallel with the data required by the next round of HPL_dtrsm(). If the decomposition is complete, it will take t4 _i to transfer the completed calculation result back to the memory

(4) The calculation is completed, the main time-consuming part of HPL is calculated, and the remaining operations such as the release of memory space are not considered time-consuming for the time being

(5) When the timing is over, the total time spent by the system is:

(6) Measured floating-point performance, theoretical floating-point performance, and simulation calculation efficiency of the computing system

Measured floating point performance:

Theoretical floating point performance:

v₂= FLOPS_CPUn_CPU·η_{CPU_PARA}·η_GEMM+FLOPS_GPUn_GPU·η_{GPU_PARA}· _GEMM

Simulation calculation efficiency:

η=v ₁ /(FLOPS _CPU n _CPU +FLOPS _GPU n _GPU )

(7) Adjust the configuration parameters to obtain different simulation results, and then draw the relationship between the simulation calculation efficiency and the matrix block size under different configuration parameters.

(3) Display the simulation results

As shown in Figure 4, the feedback simulation results include split constants, time-consuming simulation calculations, measured floating-point performance, theoretical floating-point performance, and simulation calculation efficiency. They will be automatically filled in the corresponding text boxes after the simulation calculation is completed.

The simulation results fed back by this simulation platform also include the change relationship diagram between simulation calculation efficiency and matrix block size under different configuration parameters, bottlenecks and reasons of system performance, and suggestions for performance optimization are given. This part of the content will be fed back to the user through a PDF document, and the user only needs to download it. As shown in Figure 5 and Figure 6, it is the simulation efficiency diagram under the partial bus bandwidth and GEMM efficiency given by this simulation platform.

(4) Comparison of simulation results and real results

As shown in Figure 7, it is the simulation result under 2 Xeon Gold 6142CPUs and 4 Vega 10GPUs. Figure 8 is the real result of the HPL test on a physical machine with the same conditions. The time is quite close, so the reliability of this simulation platform can be verified.

The above-mentioned embodiment is a preferred embodiment of the present invention, but the embodiment of the present invention is not limited by the above-mentioned embodiment, and any other changes, modifications, substitutions, combinations, Simplifications should be equivalent replacement methods, and all are included in the protection scope of the present invention.

Claims (10)

1. A HPL computing model emulation method, is characterized in that, comprises the steps of following order: Obtain system configuration parameters input by the user, the system configuration parameters including CPU, GPU, MISC parameters; Determine the allocation ratio of simulation calculation tasks on CPU and GPU according to the computing power of CPU and GPU, perform simulation calculation on CPU and GPU respectively for corresponding tasks, record the time consumed by simulation calculation, and calculate and analyze the floating point of the system Performance, showing simulation results. 2. according to the described HPL calculation model emulation method of claim 1, it is characterized in that, described CPU parameter comprises CPU core number, frequency, the number of times of floating-point operations per clock cycle, CPU number; Described GPU parameter comprises GPU frequency, The number of GPUs; the MISC parameters include problem scale, matrix block size, bus bandwidth, bus efficiency factor, CPU parallel execution efficiency factor, GPU parallel execution efficiency factor, and GEMM efficiency factor. 3. The HPL calculation model simulation method according to claim 1, wherein the configuration modes of the CPU, GPU, and MISC parameters include three modes: manual input, template input, and automatic input. 4. The HPL calculation model simulation method according to claim 3, wherein, for the template input, the CPU type includes EPYC 7251, EPYC 7281, Xeon Gold 6142, and the GPU type includes RX Vega 56, RX Vega 64, Vega10; When selecting a CPU or GPU template, the corresponding configuration parameters will be automatically populated. 5. according to the described HPL calculation model simulation method of claim 3, it is characterized in that, described automatic input is that this HPL calculation model simulation method obtains the configuration parameter of this machine automatically. 6. according to the described HPL calculation model simulation method of claim 1, it is characterized in that, described according to the computing power of CPU and GPU, determine the allocation ratio of simulation calculation task amount on CPU and GPU, specifically comprise the following steps: (1) Calculate the total task volume: W＝GFLOPS _CPU ·(t _CPU +t _T )+GFLOPS _GPU ·t _GPU (2) Calculate the total amount of data transfer between CPU and GPU: (3) Calculate the communication overhead of data transmission between CPU and GPU: (4) Calculate the distribution ratio: (5) Assign R·W tasks to GPU, and (1-R)·W tasks to CPU. 7. according to the described HPL calculation model simulation method of claim 1, it is characterized in that, described corresponding task is carried out simulation calculation on CPU and GPU respectively, specifically comprises the following steps: (1) Initialize the augmented matrix A|b: initialize the augmented matrix of the corresponding size according to the scale of the problem; (2) Cyclic decomposition of the augmented matrix: based on the LU decomposition method, the augmented matrix is split according to the distribution ratio of the task amount, and the part of the matrix that needs to be transferred to the GPU memory after the split is transferred to the GPU memory; The CPU executes cpu_dtrsm() to calculate the lower triangular matrix of the CPU part, and the GPU executes gpu_dtrsm() to calculate the lower triangular matrix of the GPU part; The GPU transfers the result of the operation back to the memory, and at the same time performs HPL_dgemm() to split the augmented matrix according to the distribution ratio of the task amount, and transfers the part of the matrix that needs to be transferred to the GPU memory after the split to the GPU memory; The CPU executes cpu_dgemm() to perform the CPU partial matrix multiplication operation, and the GPU executes gpu_dgemm() to perform the GPU partial matrix multiplication operation; If the decomposition is not yet complete, the GPU will transmit the data back to the memory in parallel with the data required by the next round of HPL_dtrsm(). If the decomposition is complete, the results of the calculation will be transmitted back to the memory. 8. according to the described HPL calculation model simulation method of claim 1, it is characterized in that, the time consumed by the described record simulation calculation is specifically: (1) Transfer part of the matrix that needs to be transferred to the GPU memory after the split to the GPU memory. If it is the first round, it will take t1 ₁ . Otherwise, it will be executed in parallel with the end of the last round. Time-consuming: max(t1 _i , t4 _{i- 1} ); (2) CPU executes cpu_dtrsm() time-consuming (3) GPU executes gpu_dtrsm() time-consuming (4) The above (2) (3) takes a total of time (5) It takes time t2 _i for the GPU to transfer the completed calculation result back to the memory; (6) Execute HPL_dgemm(), and transfer the part matrix that needs to be transferred to the GPU display memory after the split to the GPU display memory, which takes time t3 _i ; (7) The above (5) (6) takes a total time max(t2 _i , t3 _i ); (8) CPU executes cpu_dgemm() time-consuming (9) GPU executes gpu_dgemm() time-consuming (10) The above (8) (9) total time-consuming (11) It takes time t4 _i to transfer the completed result of the operation back to the memory; (12) When the timing ends, the total time spent by the system is: 9. according to the described HPL calculation model emulation method of claim 1, it is characterized in that, the floating-point performance of described calculation analysis system, specifically as follows: (1) Measured floating-point performance, theoretical floating-point performance, and simulation calculation efficiency of the computing system; Measured floating point performance: Theoretical floating point performance: v ₂ =FLOPS _CPU ·n _CPU ·η _{CPU_PARA} ·η _GEMM +FLOPS _GPU ·n _GPU ·η _{GPU_PARA} ·η _GEMM ; Simulation calculation efficiency: η=v ₁ /(FLOPS _CPU ·n _CPU +FLOPS _GPU ·n _GPU ); (2) Adjust the configuration parameters to obtain different simulation results, and then draw the relationship between the simulation calculation efficiency and the matrix block size under different configuration parameters. 10. The HPL calculation model simulation method according to claim 1, wherein said display simulation results include split constants, time-consuming simulation calculations, measured floating-point performance, theoretical floating-point performance, simulation calculation efficiency, and different configuration parameters Below is a diagram of the relationship between the simulation calculation efficiency and the size of the matrix block, the bottleneck and the reason of the system performance, and the improvement suggestions for performance optimization are given.