The present application claims priority from korean patent application No. 10-2018-0027701, which was filed on 3 months and 8 days of 2018, and korean patent application No. 10-2019-0026475, which was filed on 7 months and 3 days of 2019, the disclosures of which are incorporated herein by reference in their entirety.
Detailed Description
Hereinafter, exemplary embodiments of the present disclosure will be described more fully with reference to the accompanying drawings. Like reference numerals may refer to like elements throughout the drawings.
It will be understood that the terms "first," "second," "third," etc. are used herein to distinguish one element from another, and that the element is not limited by these terms. Thus, a "first" element in an exemplary embodiment may be described as a "second" element in another exemplary embodiment.
The singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It will be understood that when an element such as a film, region, layer or element is referred to as being "on," "connected to," or "coupled to" another element, it can be directly on, connected to, coupled to or coupled to the other element or intervening elements may be present. It will also be understood that when a component is referred to as being "between" two components, the component can be the only component between the two components, or one or more intervening components may also be present. It will also be understood that when a component is referred to as "overlying" another component, it can be the only component that overlies the other component, or there can be one or more intervening components that overlie the other component.
For ease of description, spatially relative terms such as "under," "lower," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "under" or "beneath" other elements or features would then be oriented "over" the other elements or features. Thus, the exemplary terms "under" and "beneath" can encompass both an orientation of over and under.
Here, when two or more elements or values are described as being substantially identical to each other or about identical to each other, it will be understood that the elements or values are identical to each other, are not distinguishable from each other, or are distinguishable from each other but functionally identical to each other as will be understood by one of ordinary skill in the art. It will also be understood that when two components or directions are described as extending substantially parallel or perpendicular to each other, the two components or directions extend precisely parallel or perpendicular to each other, or approximately parallel or perpendicular to each other within measurement errors as will be appreciated by those of ordinary skill in the art. Further, it will be appreciated that while the parameters may be described herein as having a "about" certain value according to an exemplary embodiment, the parameters may be precisely or approximately a certain value within a measurement error, as will be appreciated by one of ordinary skill in the art.
Fig. 1 is a plan view schematically showing an example of a display apparatus 10 according to an exemplary embodiment of the present disclosure. Fig. 2 is a sectional view schematically showing an example of a section of the display device 10 taken along the line I-I' shown in fig. 1. Fig. 3 is a plan view schematically showing an area a of the display device 10 shown in fig. 1. Fig. 4 is a sectional view schematically showing an example of a section of the display device 10 taken along the line II-II' shown in fig. 3.
The display device 10 includes a display area DA provided with a plurality of pixels and a peripheral area PA located at the periphery of the display area DA. The plurality of pixels are not disposed in the peripheral area PA. The substrate 100 includes a display area DA and a peripheral area PA. The peripheral area PA includes a pad (or "bonding pad") area PADA. The pad area PADA is an area to which various electronic devices or printed circuit boards are electrically attached and provided with a first voltage line 210 and a second voltage line 220.
Fig. 1 may also be understood as a plan view showing an image of, for example, a substrate 100 in a process of manufacturing the display device 10. In the display device 10 or an electronic device such as a smart phone including the display device 10 to be finally manufactured, a portion of the substrate 100 or other components may be bent in order to minimize or reduce the width of the peripheral area PA visible to a user.
For example, as shown in fig. 3, the curved area BA may be located between the pad area PADA and the display area DA by being included in the peripheral area PA. In this case, at least a portion of the pad area PADA may overlap the display area DA by bending the substrate 100 in the bending area BA. The bending direction is set such that the pad area PADA is disposed behind the display area DA without shielding the display area DA. Accordingly, the user recognizes that the display area DA occupies a large portion of the display apparatus 10.
The substrate 100 may include various flexible or bendable materials, such as polymer resins, for example, polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate (PAR), polyimide (PI), or Cellulose Acetate Propionate (CAP). Various modifications may be made to the structure of the substrate 100. For example, the substrate 100 may have a multi-stack layer structure including two layers respectively including the above-described polymer resin and a barrier layer disposed between the two layers, the barrier layer including an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, etc.).
The pixels in the display area DA include display elements. The display element may be, for example, the organic light emitting device 300. However, the display element is not limited thereto. In an exemplary embodiment, the display area DA includes a first thin film transistor T1, a second thin film transistor T2, an organic light emitting device 300, and a first planarization insulating layer 141 and a second planarization insulating layer 142 (see fig. 2) disposed between the first and second thin film transistors T1 and T2 and the organic light emitting device 300. The structure of the pixel is described in more detail with reference to fig. 2.
In an exemplary embodiment, the organic light emitting device 300 is electrically connected to the first thin film transistor T1, the second thin film transistor T2, and the storage capacitor Cst. The first thin film transistor T1 includes a first semiconductor layer Act1 and a first gate electrode G1, and the second thin film transistor T2 includes a second semiconductor layer Act2 and a second gate electrode G2.
The first semiconductor layer Act1 and the second semiconductor layer Act2 may include, for example, amorphous silicon, polycrystalline silicon, an oxide semiconductor, or an organic semiconductor material. In an exemplary embodiment, the first semiconductor layer Act1 includes a first channel region C1, a first source region S1, and a first drain region D1. The first source region S1 and the first drain region D1 are disposed at two opposite sides of the first channel region C1, respectively. In an exemplary embodiment, the second semiconductor layer Act2 includes a second channel region C2, a second source region S2, and a second drain region D2. The second source region S2 and the second drain region D2 are disposed at two opposite sides of the second channel region C2, respectively.
The first source region S1 and the first drain region D1 of the first semiconductor layer Act1 may be understood as a source electrode and a drain electrode of the first thin film transistor T1, respectively. The second source region S2 and the second drain region D2 of the second semiconductor layer Act2 may be understood as a source electrode and a drain electrode of the second thin film transistor T2, respectively.
In the exemplary embodiment, the first gate electrode G1 and the second gate electrode G2 are disposed to overlap the first channel region C1 of the first semiconductor layer Act1 and the second channel region C2 of the second semiconductor layer Act2, respectively. The gate insulating layer 120 is disposed between the first gate electrode G1 and the first semiconductor layer Act1 and between the second gate electrode G2 and the second semiconductor layer Act 2. Each of the first gate electrode G1 and the second gate electrode G2 may be, for example, a single layer or a multi-stacked layer formed of a conductive material including at least one of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti), for example.
In the exemplary embodiment of fig. 2, the first gate electrode G1 and the second gate electrode G2 are disposed on the same layer. However, the exemplary embodiments of the present disclosure are not limited thereto. For example, in the exemplary embodiment, the first gate electrode G1 and the second gate electrode G2 are disposed on two different layers. Further, in the exemplary embodiment of fig. 2, the display device 10 is shown as a top gate display device in which the first gate electrode G1 and the second gate electrode G2 are disposed over the first semiconductor layer Act1 and the second semiconductor layer Act2, respectively. However, the exemplary embodiments of the present disclosure are not limited thereto. For example, in the exemplary embodiment, the display device 10 is a bottom gate display device in which the first gate electrode G1 and the second gate electrode G2 are disposed below the first semiconductor layer Act1 and the second semiconductor layer Act2, respectively.
In an exemplary embodiment, the storage capacitor Cst includes a first storage capacitor electrode CE1 and a second storage capacitor electrode CE2. The first storage capacitor electrode CE1 and the second storage capacitor electrode CE2 are stacked on each other. The first storage capacitor electrode CE1 and the second storage capacitor electrode CE2 may include low-resistance conductive materials including at least one of Mo, al, cu, and Ti, for example, respectively.
In an exemplary embodiment, the storage capacitor Cst is stacked with the first thin film transistor T1. The first thin film transistor T1 may be a driving thin film transistor. Although fig. 2 illustrates an exemplary embodiment in which the storage capacitor Cst is stacked with the first thin film transistor T1 and the first storage capacitor electrode CE1 is the first gate electrode G1 of the first thin film transistor T1, exemplary embodiments of the present disclosure are not limited thereto. For example, in an exemplary embodiment, the storage capacitor Cst is not overlapped with the first thin film transistor T1.
In an exemplary embodiment, the buffer layer 110 is disposed between the substrate 100 and the first and second thin film transistors T1 and T2. The buffer layer 110 may include an inorganic insulating material. For example, the buffer layer 110 may be a single layer or a multi-stacked layer including at least one of silicon oxynitride, silicon oxide, and silicon nitride.
In an exemplary embodiment, the gate insulating layer 120 is disposed between the first gate electrode G1 and the first semiconductor layer Act1 and between the second gate electrode G2 and the second semiconductor layer Act 2. The gate insulating layer 120 may include an inorganic insulating material. For example, the gate insulating layer 120 may be a single layer or a multi-stacked layer including at least one of silicon oxynitride, silicon oxide, and silicon nitride.
In an exemplary embodiment, the interlayer insulating layer 130 covers the first and second thin film transistors T1 and T2. In fig. 2, the interlayer insulating layer 130 is shown to include a first interlayer insulating layer 131 and a second interlayer insulating layer 132. According to an exemplary embodiment, the first interlayer insulating layer 131 is directly disposed on the first and second thin film transistors T1 and T2 and/or is directly disposed on the first storage capacitor electrode CE 1. The second interlayer insulating layer 132 is disposed on the second storage capacitor electrode CE 2. Each of the first interlayer insulating layer 131 and the second interlayer insulating layer 132 may be, for example, a single layer or a multi-stacked layer including at least one of silicon oxynitride, silicon oxide, and silicon nitride. For example, the first interlayer insulating layer 131 may be a single layer formed of silicon nitride, and the second interlayer insulating layer 132 may be a multi-stacked layer formed of silicon nitride and silicon oxide.
In an exemplary embodiment, the data line DL is disposed on the interlayer insulating layer 130. The data line DL is electrically connected to the switching thin film transistor and supplies a data signal thereto. The data line DL may be, for example, a single layer or a multi-stacked layer including at least one of Al, cu, ti, and an alloy thereof. In an exemplary embodiment, the data line DL is a three-layer structure having a Ti/Al/Ti structure.
In an exemplary embodiment, the inorganic protective layer PVX covers the data line DL. The inorganic protective layer PVX may be, for example, a single layer or a multi-stacked layer formed of at least one of silicon nitride (SiN x) and silicon oxide (SiO x). The inorganic protective layer PVX covers and protects the wirings (e.g., the first voltage line 210 and the second voltage line 220 of fig. 3) exposed in the peripheral region PA. For example, in a portion of the substrate 100 (e.g., a portion of the peripheral area PA), the wiring simultaneously formed in the same process as the process of forming the data line DL may be exposed. Although the exposed portion of the wiring may be damaged due to an etchant for patterning the pixel electrode 310, which will be described below, since the inorganic protective layer PVX covers the data line DL and a portion of the wiring formed simultaneously with the data line DL, the wiring may be protected from damage during patterning the pixel electrode 310.
In the exemplary embodiment, the driving voltage line PL and the data line DL are disposed on two different layers. Here, the phrase "a and B are arranged/disposed on two different layers" means a case where at least one insulating layer is disposed between a and B, and one is disposed under the at least one insulating layer and the other is disposed on the at least one insulating layer among a and B. In an exemplary embodiment, the first planarization insulating layer 141 is disposed between the driving voltage line PL and the data line DL.
The driving voltage line PL may be, for example, a single layer or a multi-stacked layer including at least one of Al, cu, ti, and an alloy thereof. For example, the driving voltage line PL may be three layers having a structure of Ti/Al/Ti. Although fig. 2 illustrates a configuration in which the driving voltage line PL is disposed only on the first planarization insulating layer 141, exemplary embodiments of the present disclosure are not limited thereto. For example, in the exemplary embodiment, the driving voltage line PL is connected to an additional voltage line formed at a lower portion together with the data line DL through a via hole formed in the first planarization insulating layer 141. Therefore, the resistance of the driving voltage line PL can be reduced.
In an exemplary embodiment, the second planarization insulating layer 142 covers the driving voltage line PL. The first and second planarization insulating layers 141 and 142 may include an organic material. The organic material may include, for example, PI, a commercial polymer such as polymethyl methacrylate (PMMA), polystyrene (PS), a high molecular derivative having a phenol group, an acrylic polymer, an aryl ether polymer, an amide polymer, a fluoropolymer, a para-xylene polymer, a vinyl alcohol polymer, and a blend thereof.
In an exemplary embodiment, the organic light emitting device 300 is disposed on the second planarization insulating layer 142. The organic light emitting device 300 includes a pixel electrode 310, a counter electrode 330, and an intermediate layer 320 disposed between the pixel electrode 310 and the counter electrode 330 and including an emission layer.
In an exemplary embodiment, the pixel defining layer 150 is disposed on the second planarization insulating layer 142 and the pixel electrode 310. The pixel defining layer 150 defines pixels by including an opening corresponding to each pixel, wherein the opening exposes at least a central portion of the corresponding pixel electrode 310. In an exemplary embodiment, the pixel defining layer 150 increases a distance between an edge of the pixel electrode 310 and an edge of the counter electrode 330, thereby preventing arcing between the edge of the pixel electrode 310 and the edge of the counter electrode 330. The pixel defining layer 150 may be formed of, for example, an organic material including PI, hexamethyldisiloxane, and the like.
In an exemplary embodiment, the pixel electrode 310 is connected to a pixel circuit including a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst through a first connection metal CM1 and a second connection metal CM 2.
The intermediate layer 320 may comprise a low molecular weight material or a polymeric material. When the intermediate layer 320 includes a low molecular weight material, the intermediate layer 320 may have a structure in which a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an emission layer (EML), an Electron Transport Layer (ETL), an Electron Injection Layer (EIL), and the like are stacked one or more times. The low molecular weight material may include various organic materials such as copper phthalocyanine (CuPc), N '-di (naphthalen-1-yl) -N, N' -diphenyl-benzidine (NPB), or tris-8-hydroxyquinoline aluminum (Alq 3). These layers can be formed by using a vacuum deposition method.
When the intermediate layer 320 includes a polymer material, the intermediate layer 320 may generally have a structure including an HTL and an EML. In this case, the HTL may include poly (3, 4-ethylenedioxythiophene) (PEDOT), and the EML may include a polymer material such as polyphenylene vinylene (PPV) and polyfluorene, for example. However, the structure of the intermediate layer 320 is not limited to the above-described configuration, and the intermediate layer 320 may have any one of various structures. For example, in an exemplary embodiment, the intermediate layer 320 may include an integral layer corresponding to a plurality of pixel electrodes (each pixel electrode is identical to the pixel electrode 310), or a plurality of layers patterned to correspond to the plurality of pixel electrodes 310, respectively.
In one aspect, in the present embodiment, the intermediate layer 320, for example, the light emitting layer (EML) may include a quantum dot (QuantumDot) substance. The core of the quantum dot may be selected from group II-VI compounds, group III-V compounds, group IV-VI compounds, group IV elements, group IV compounds, and combinations thereof.
The group II-VI compounds may be selected from the group consisting of binary compounds selected from CdSe, cdTe, znS, znSe, znTe, znO, hgS, hgSe, hgTe, meSe, mgS and mixtures thereof, ternary compounds selected from AgInS、CuInS、CdSeS、CdSeTe、CdSTe、ZnSeS、ZnSeTe、ZnSTe、HgSeS、HgSeTe、HgSTe、CdZnS、CdZnSe、CdZnTe、CdHgS、CdHgSe、CdHgTe、HgZnS、HgZnSe、HgZnTe、MgZnSe、MgZnS and mixtures thereof, and quaternary compounds selected from HgZnTeS, cdZnSeS, cdZnSeTe, cdZnSTe, cdHgSeS, cdHgSeTe, cdHgSTe, hgZnSeS, hgZnSeTe, hgZnSTe and mixtures thereof.
The III-V compounds may be selected from the group consisting of binary compounds selected from GaN, gaP, gaAs, gaSb, alN, alP, alAs, alSb, inN, inP, inAs, inSb and mixtures thereof, ternary compounds selected from GaNP, gaNAs, gaNSb, gaPAs, gaPSb, alNP, alNAs, alNSb, alPAs, alPSb, inGaP, inNP, inNAs, inNSb, inPAs, inPSb, gaAlNP and mixtures thereof, and quaternary compounds selected from GaAlNAs、GaAlNSb、GaAlPAs、GaAlPSb、GaInNP、GaInNAs、GaInNSb、GaInPAs、GaInPSb、InAlNP、InAlNAs、InAlNSb、InAlPAs、InAlPSb and mixtures thereof.
The group IV-VI compounds may be selected from the group consisting of binary compounds selected from SnS, snSe, snTe, pbS, pbSe, pbTe and mixtures thereof, ternary compounds selected from SnSeS, snSeTe, snSTe, pbSeS, pbSeTe, pbSTe, snPbS, snPbSe, snPbTe and mixtures thereof, and quaternary compounds selected from SnPbSSe, snPbSeTe, snPbSTe and mixtures thereof. The group IV element may be selected from Si, ge, and mixtures thereof. The group IV compound may be a binary compound selected from SiC, siGe, and mixtures thereof.
In this case, the binary compound, the ternary compound, or the quaternary compound may be present in the particle at a uniform concentration, or may be present in the same particle in a state in which the concentration distribution is partially different. Furthermore, one quantum dot may also have a core/shell structure surrounding other quantum dots. The interface of the core and the shell may have a concentration gradient (gradient) in which the concentration of the element present in the shell decreases toward the center.
In some embodiments, the quantum dot may have a core-shell structure including a core including the above-described nanocrystals and a shell surrounding the core. The shell of the quantum dot may serve as a protective layer to prevent chemical denaturation of the core to maintain semiconductor properties and/or as a charge layer (CHARGING LAYER) to impart electrophoretic properties to the quantum dot. The shell may be a single layer or multiple layers. The interface of the core and the shell may have a concentration gradient in which the concentration of the element present in the shell decreases toward the center. Examples of shells of the quantum dots include oxides of metals or non-metals, semiconductor compounds, or combinations thereof.
For example, the metal or nonmetal oxide may be exemplified by binary compounds of SiO2、Al2O3、TiO2、ZnO、MnO、Mn2O3、Mn3O4、CuO、FeO、Fe2O3、Fe3O4、CoO、Co3O4 and NiO, etc., or ternary compounds of MgAl 2O4、CoFe2O4、NiFe2O4 and CoMn 2O4, etc., but the present invention is not limited thereto.
The semiconductor compound may be exemplified by CdS、CdSe、CdTe、ZnS、ZnSe、ZnTe、ZnSeS、ZnTeS、GaAs、GaP、GaSb、HgS、HgSe、HgTe、InAs、InP、InGaP、InSb、AlAs、AlP、AlSb and the like, but the present invention is not limited thereto.
The quantum dot may have a full width at half maximum (FWHM) of an emission wavelength spectrum of about 45nm or less, preferably 40nm or less, more preferably about 30nm or less, and in this range, color purity or color reproducibility may be improved. Also, light emitted through the quantum dots is emitted in a front direction, so that a wide viewing angle can be improved.
The shape of the quantum dot is not particularly limited as it is commonly used in the art, but more specifically, spherical, pyramidal, multi-arm (multi-arm), or cubic (cubic) nanoparticle, nanotube, nanowire, nanofiber, nano-plate particle, etc. forms may be used.
The quantum dots may adjust the color of emitted light according to the particle size, and thus the quantum dots may have various light emission colors such as blue, red, green, and the like.
In an exemplary embodiment, the counter electrode 330 covers the display area DA. For example, the counter electrode 330 may be formed in an integrated type to cover a plurality of organic light emitting devices, each equivalent to the organic light emitting device 300.
The encapsulation layer 400 is disposed on the counter electrode 330. The encapsulation layer 400 protects the organic light emitting device 300 from moisture or oxygen from the outside of the display apparatus 10. For example, the encapsulation layer 400 encapsulates the organic light emitting device 300. In order to protect the organic light emitting device 300, the encapsulation layer 400 extends over the display area DA where the organic light emitting device 300 is disposed and over the peripheral area PA at the periphery of the display area DA. As shown in fig. 2, the encapsulation layer 400 may include a multi-stack layer structure. For example, in an exemplary embodiment, the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420, and a second inorganic encapsulation layer 430, which are sequentially stacked.
The first inorganic encapsulation layer 410 is formed on the counter electrode 330, and may include, for example, silicon oxide, silicon nitride, and/or silicon oxynitride, etc. The first inorganic encapsulation layer 410 may be conformally formed along structures disposed below the first inorganic encapsulation layer 410.
In an exemplary embodiment, the organic encapsulation layer 420 is disposed on the first inorganic encapsulation layer 410 and is sufficiently thick such that an upper surface of the organic encapsulation layer 420 is substantially planar. The organic encapsulation layer 420 may include, for example, at least one of PET, PEN, polycarbonate, PI, polyethylene sulfonate, polyoxymethylene, PAR, and hexamethyldisiloxane.
The second inorganic encapsulation layer 430 covers the organic encapsulation layer 420. The second inorganic encapsulation layer 430 may include, for example, silicon oxide, silicon nitride, and/or silicon oxynitride, etc. In an exemplary embodiment, the first and second inorganic encapsulation layers 410 and 430 have an area larger than that of the organic encapsulation layer 420, and contact each other outside the organic encapsulation layer 420. Accordingly, in the exemplary embodiment, the organic encapsulation layer 420 is not exposed to the outside due to the first and second inorganic encapsulation layers 410 and 430.
As described above, according to the exemplary embodiments of the present disclosure, since the encapsulation layer 400 includes the first inorganic encapsulation layer 410, the organic encapsulation layer 420, and the second inorganic encapsulation layer 430, even if cracks occur in the encapsulation layer 400 by using such a multi-layer structure, the cracks are not connected between the first inorganic encapsulation layer 410 and the organic encapsulation layer 420, or between the organic encapsulation layer 420 and the second inorganic encapsulation layer 430. Accordingly, in the exemplary embodiment, the formation of a path through which moisture or oxygen from the outside permeates into the display area DA may be prevented or reduced.
In an exemplary embodiment, the first voltage line 210 and the second voltage line 220 are disposed in the peripheral area PA. Each of the first voltage line 210 and the second voltage line 220 supplies a driving voltage to the organic light emitting device 300. In addition, in the exemplary embodiment, the curved region BA is disposed in the peripheral region PA.
For example, in an exemplary embodiment, the first voltage line 210 is a first power supply voltage (ELVDD) line and the second voltage line 220 is a second power supply voltage (ELVSS) line. In an exemplary embodiment, the second voltage line 220 is directly connected to the counter electrode 330 or connected to the counter electrode 330 via another wiring.
In an exemplary embodiment, as shown in fig. 1, the first voltage line 210 is disposed between one side of the display area DA (e.g., a first side of the display area DA) and the pad area PADA. In an exemplary embodiment, the first voltage line 210 includes a first main voltage line 212 and a first connection unit 214. The first main voltage line 212 and the first connection unit 214 are disposed to correspond to the one side of the display area DA. For example, when the display area DA is rectangular, the first main voltage line 212 may be set to correspond to either side of the display area DA. In an exemplary embodiment, the first main voltage line 212 is substantially parallel to the arbitrary side and has a length greater than that of the arbitrary side. Any side corresponding to the first main voltage line 212 is a side adjacent to the pad area PADA.
In an exemplary embodiment, the first connection unit 214 protrudes from the first main voltage line 212 and extends in the first direction. The first direction is a direction extending from the display area DA toward the pad area PADA. The first connection unit 214 may be connected to the pad unit.
In an exemplary embodiment, the second voltage line 220 is disposed at other sides of the display area DA (e.g., a side of the display area DA where the first voltage line 210 is not disposed). For example, in an exemplary embodiment, the second voltage line 220 surrounds the remaining side of the display area DA (e.g., the remaining side of the display area DA where the first voltage line 210 is not disposed). For example, referring to the exemplary embodiment of fig. 1, the display device 10 includes four sides, the first voltage line 210 is disposed between the first side of the display area DA and the pad area PADA, and the second voltage line 220 surrounds the remaining three sides (e.g., sides other than the first side) of the display area DA. In an exemplary embodiment, the second voltage line 220 includes a second main voltage line 222 corresponding to both opposite ends of the first main voltage line 212 and the remaining sides of the display area DA, and a second connection unit 224 protruding from the ends of the second main voltage line 222 toward the first direction and extending in the first direction. The second connection unit 224 may be connected to the pad unit.
As described above, as shown in fig. 3, an exemplary embodiment of the present disclosure includes the bending area BA. The bending area BA disposed between the display area DA and the pad area PADA is an area from which portions of the buffer layer 110, the gate insulating layer 120, and the interlayer insulating layer 130 are removed. Hereinafter, the buffer layer 110, the gate insulating layer 120, and the interlayer insulating layer 130 are collectively referred to as an inorganic insulating layer IL. The inorganic insulating layer IL may be understood as a layer including grooves at positions corresponding to the bending regions BA (see fig. 4). By removing a portion of the inorganic insulating layer IL from the bending region BA, the bending operation can be easily performed in the bending region BA, and the occurrence of cracks in the inorganic insulating layer IL during the bending operation can be prevented.
In an exemplary embodiment, the region from which the inorganic insulating layer IL is removed is filled with the organic material layer 160.
In an exemplary embodiment, the organic material layer 160 disposed mainly in the bending region BA extends to a non-bending region adjacent to the bending region BA. The organic material layer 160 may compensate for the height difference of the bending region BA where the inorganic insulating layer IL is removed, and absorb stress caused by the bending operation. Therefore, according to the exemplary embodiments of the present disclosure, concentration of stress due to bending operations on various types of wirings disposed in the bending area BA and used to transmit electrical signals from pad (or "pad") units disposed in the pad area PADA to the display area DA is effectively reduced.
The organic material layer 160 may include, for example, at least one of acrylic, methacrylic, polyester, polyethylene, polypropylene, PET, PEN, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, PAR, and hexamethyldisiloxane.
Fig. 5 is a plan view schematically showing an example of the region B of the display device 10 shown in fig. 3. Fig. 6 is a sectional view schematically showing an example of a section of the region B taken along the line III-III' shown in fig. 5. Fig. 7 is a sectional view schematically showing an example of a section of the region B taken along the line IV-IV' shown in fig. 5.
First, referring to fig. 5, in the peripheral area PA (see fig. 1), a portion of the second planarization insulating layer 142 is removed. When a portion of the second planarization insulating layer 142 is removed, the first planarization insulating layer 141 (see fig. 2) disposed under the second planarization insulating layer 142 is also removed. Therefore, when the second planarization insulating layer 142 is described hereinafter, the description of the second planarization insulating layer 142 may also be applied to the first planarization insulating layer 141 (see fig. 2).
The area from which the second planarization insulating layer 142 is removed surrounds the display area DA. Accordingly, moisture from the outside is prevented from penetrating into the display area DA through the second planarization insulating layer 142 and the first planarization insulating layer 141 formed of an organic material.
According to an exemplary embodiment, although at least the first and second connection units 214 and 224 may be exposed in the region where the second planarization insulating layer 142 is removed, since the inorganic protective layer PVX is formed over the first and second connection units 214 and 224, the first and second connection units 214 and 224 may be protected from damage during a process of patterning the pixel electrode 310 (see fig. 2).
According to an exemplary embodiment, when the encapsulation layer 400 (see fig. 2) is formed, more specifically, when the organic encapsulation layer 420 is formed, it is defined that a material for forming the organic encapsulation layer 420 is coated in a previously set region. To define the material, as shown in fig. 5, a first dam 610 may be disposed in the peripheral area PA (see fig. 1). The first dam 610 is located in the peripheral area PA (see fig. 1) to be separated from the second planarization insulating layer 142.
The first dam 610 may have a multi-stacked layer structure. For example, as shown in fig. 7, in an exemplary embodiment, the first dam 610 has a structure in which a first layer 611, a second layer 613, and a third layer 615 are continuously stacked. In an exemplary embodiment, the first layer 611 is formed simultaneously with the second planarization insulating layer 142 and is formed of the same material as the second planarization insulating layer 142, and the second layer 613 is formed simultaneously with the pixel defining layer 150 and is formed of the same material as the pixel defining layer 150. The third layer 615 may be additionally formed on the second layer 613 by using the same material as that of the second layer 613.
The first dam 610 supports a mask for forming the intermediate layer 320 (see fig. 2) or the counter electrode 330 (see fig. 2) of the organic light emitting device 300 (see fig. 2), and may protect previously formed components from contacting the mask and being damaged. In addition, the first dam 610 may prevent the material for forming the organic encapsulation layer 420 from moving in the edge direction of the substrate 100 during the formation of the organic encapsulation layer 420 on the first inorganic encapsulation layer 410.
As shown in fig. 7, in an exemplary embodiment, the first and second inorganic encapsulation layers 410 and 430 cover the first dam 610 and extend to an area outside the first dam 610. Accordingly, penetration of moisture and oxygen into the display device 10 from the outside can be more effectively prevented.
In an exemplary embodiment, the second dam 620 is formed at a position more inside than the first dam 610. In an exemplary embodiment, since the second dam 620 includes a lower layer 623 that may be formed simultaneously with the second layer 613 of the first dam 610 and formed of the same material as the second layer 613 of the first dam 610 and an upper layer 625 that may be formed simultaneously with the third layer 615 of the first dam 610 and formed of the same material as the third layer 615 of the first dam 610, the height of the second dam 620 is smaller than the height of the first dam 610. In an exemplary embodiment, the first dam 610 and the second dam 620 are separated from the second planarization insulating layer 142. For example, in the exemplary embodiment, first dam 610 and second dam 620 are each different components made of a different material than that of second planarizing insulating layer 142.
As described above, according to an exemplary embodiment of the present disclosure, the first dam 610 and the second dam 620 may prevent the material for forming the organic encapsulation layer 420 from diffusing toward the edge of the substrate 100 by covering the display area DA (see fig. 1). Therefore, the formation of edge tails at the organic encapsulation layer 420 may be prevented.
However, due to the rapid change of the step difference in the region where the second planarization insulating layer 142 is removed, when the organic encapsulation material (e.g., liquid organic material) for forming the organic encapsulation layer 420 is coated, reflow of the material for forming the organic encapsulation layer 420 may be more severe in the region where the second planarization insulating layer 142 is removed. Further, as the width of the peripheral area PA is reduced/minimized, the distance between the first dam 610 and the second dam 620 is gradually reduced. Therefore, it may be difficult to restrict the flow of the material for forming the organic encapsulation layer 420. Since the material for forming the organic encapsulation layer 420 diffuses faster along the sides of the first and second connection units 214 and 224 in the direction toward the pad area PADA (see fig. 1) than in the direction along which the first and second dams 610 and 620 are formed, the diffusion of the material for forming the organic encapsulation layer 420 toward the pad area PADA (see fig. 1) should be interrupted in order to prevent the formation of an edge tail at the organic encapsulation layer 420.
To this end, in an exemplary embodiment, island mole a 162 extending substantially parallel to the first main voltage line 212 is additionally formed. For example, the length direction of island mole a 162 extends substantially parallel to the first main voltage line 212. Island mole 162 a 162 may be formed in part in regions where the material used to form the organic encapsulation layer 420 has a strong flow. For example, in the exemplary embodiment island mole a 162 is located between the display area DA (see fig. 1) and the pad area PADA (see fig. 1). More specifically, in the exemplary embodiment, island mole a 162 is positioned in a position such that it overlaps both first connection unit 214 and second connection unit 224. In an exemplary embodiment, island mole a 162 extends in a direction substantially perpendicular to the direction in which the first and second connection units 214 and 224 extend. In an exemplary embodiment, two opposite ends of island mole a 162 overlap the first and second connection units 214 and 224, respectively. For example, in the exemplary embodiment, a first end of island mole a 162 overlaps with first connection unit 214 and a second end of island mole a 162 opposite to the first end of island mole a 162 overlaps with second connection unit 224.
In an exemplary embodiment, island mole a includes the same materials as the aforementioned organic material layer 160 (see fig. 4). For example, in an exemplary embodiment, island mole a 162 is formed simultaneously with the organic material layer 160 (see fig. 4) and is formed of the same material as that of the organic material layer 160. Accordingly, in the exemplary embodiment, island mole a 162 is disposed on a layer lower than the first and second connection units 214 and 224, and the inorganic protective layer PVX covers the upper surface of the region between the first and second connection units 214 and 224.
As described above, when island mole a is formed in a region where the material for forming the organic encapsulation layer 420 has a strong flow, resistance is caused in the flow of the material for forming the organic encapsulation layer 420. Thus, according to an exemplary embodiment, when the material for forming the organic encapsulation layer 420 is coated, the material for forming the organic encapsulation layer 420 may be effectively prevented from crossing the first dam 610 and diffusing to the edge of the substrate 100.
In an exemplary embodiment, the inorganic protective layer PVX is formed on island mole a 162 and island mole a is not in direct contact with the first inorganic encapsulation layer 410. For example, since the first inorganic encapsulation layer 410 directly contacts the inorganic protective layer PVX at a position where the first inorganic encapsulation layer 410 overlaps island mole a 162, the bonding strength of the first inorganic encapsulation layer 410 is not weakened by contact with island mole a 162 formed of an organic material. Accordingly, island mole a 162 can be formed at various locations. For example, although fig. 5 illustrates an exemplary embodiment in which island mole a 162 is disposed inside the second dam 620, exemplary embodiments of the present disclosure are not limited thereto. For example, according to an exemplary embodiment, a plurality island mole may be formed at various locations.
Fig. 8 to 11 are plan views schematically showing an exemplary embodiment of the region B of the display device 10 shown in fig. 3. Hereinafter, further descriptions of elements and processes previously described with reference to fig. 5 to 7 may be omitted for convenience of explanation.
Fig. 8 illustrates an exemplary embodiment of island mole B located between a first dam 610 and a second dam 620. Since island mole B is used to provide resistance to the flow of the material used to form the organic encapsulation layer 420 (see fig. 2), island mole 162B controls the reflow of the material used to form the organic encapsulation layer 420 (see fig. 2) even when island mole B is disposed between the first dam 610 and the second dam 620. Island mole 162B may be formed simultaneously with island mole 162 described with reference to fig. 7.
As shown in fig. 9, island mole C is disposed at a location outside of the first dam 610 in the exemplary embodiment. Similar to the above, in the exemplary embodiment, even when island mole C is disposed outside the first dam 610, island mole C controls reflow of the material for forming the organic encapsulation layer 420 (see fig. 2), and since island mole C does not directly contact the first inorganic encapsulation layer 410 (see fig. 2), adhesive properties of the first inorganic encapsulation layer 410 are not weakened. Island mole 162C may be formed simultaneously with island mole B of fig. 8 or island mole 162 described with reference to fig. 7.
Fig. 10 illustrates an exemplary embodiment in which island mole D is formed at a position overlapping the second dam 620. In the exemplary embodiment, when island mole D overlaps second dam 620, the height of second dam 620 increases locally at the portion overlapping island mole D162. Accordingly, the reflow of the material for forming the organic encapsulation layer 420 (see fig. 2) can be more effectively prevented. However, the exemplary embodiments of the present disclosure are not limited thereto. For example, in the exemplary embodiment island mole D also overlaps first dam 610. As another example, as shown in fig. 11, in the exemplary embodiment island mole E is formed such that it overlaps both the first dam 610 and the second dam 620. In this case, in an exemplary embodiment, the height of at least one of the first dam 610 and the second dam 620 increases in the overlapping area. For example, at least one of the first dam 610 and the second dam 620 may have a greater height in the overlap region (associated with island mole E) than in the non-overlap region (associated with island mole E). In these exemplary embodiments, island mole (e.g., 162D, 162E) may be disposed below the first dam 610 and the second dam 620.
According to exemplary embodiments of the present disclosure, by preventing an edge tail from being formed at an organic encapsulation layer, infiltration of moisture or oxygen from the outside into a display device may be prevented.
While the present disclosure has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure as defined by the following claims.