CN110246890A - epitaxial structure of HEMT device - Google Patents
epitaxial structure of HEMT device Download PDFInfo
- Publication number
- CN110246890A CN110246890A CN201910513344.5A CN201910513344A CN110246890A CN 110246890 A CN110246890 A CN 110246890A CN 201910513344 A CN201910513344 A CN 201910513344A CN 110246890 A CN110246890 A CN 110246890A
- Authority
- CN
- China
- Prior art keywords
- buffer layer
- silicon
- epitaxial structure
- hemt device
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 37
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 37
- 239000010703 silicon Substances 0.000 claims abstract description 37
- 230000007704 transition Effects 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 26
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 22
- 239000000203 mixture Substances 0.000 claims abstract description 21
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims abstract description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 5
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims description 8
- VGGSQFUCUMXWEO-UHFFFAOYSA-N Ethene Chemical compound C=C VGGSQFUCUMXWEO-UHFFFAOYSA-N 0.000 claims description 3
- 239000005977 Ethylene Substances 0.000 claims description 3
- 229910007264 Si2H6 Inorganic materials 0.000 claims description 2
- 150000001335 aliphatic alkanes Chemical class 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 11
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 19
- 229910002601 GaN Inorganic materials 0.000 description 18
- 239000000463 material Substances 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 8
- 239000013078 crystal Substances 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000001294 propane Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
Landscapes
- Junction Field-Effect Transistors (AREA)
Abstract
Description
技术领域technical field
本发明涉及一种HEMT器件（GaN基高电子迁移率晶体管）的外延结构，尤其是一种可减少漏电通道的HEMT器件的外延结构。The invention relates to an epitaxial structure of a HEMT device (GaN-based high electron mobility transistor), in particular to an epitaxial structure of a HEMT device capable of reducing leakage channels.
背景技术Background technique
作为继第一代半导体硅（Si）和第二代半导体砷化镓（GaAs）之后的第三代半导体材料代表，氮化镓（GaN）具有宽禁带、耐高温、高电子浓度、高电子迁移率、高导热性等独特的材料特性。因此，GaN基高电子迁移率晶体管（HEMT）在微波通讯和电力电子转换领域拥有卓越的性能。现有GaN基高电子迁移率晶体管（HEMT）的外延生长方法是在衬底（硅或者蓝宝石）上直接依次生长AlN缓冲层、AlxGa1-xN缓冲层及GaN层（掺C的GaN层和本征GaN层）。由于硅衬底和AlN层之间的材料特性，AlN缓冲层生长过程中会出现大量的韧性位错，导致后续的GaN薄膜材料具有很高的位错密度（晶体质量差）并可能产生较多漏电通道，使GaN器件具有较大的漏电流密度而在远低于临界电场的条件下被击穿。As a representative of the third-generation semiconductor material after the first-generation semiconductor silicon (Si) and the second-generation semiconductor gallium arsenide (GaAs), gallium nitride (GaN) has a wide band gap, high temperature resistance, high electron concentration, and high electron density. Unique material properties such as mobility and high thermal conductivity. Therefore, GaN-based high electron mobility transistors (HEMTs) have excellent performance in the fields of microwave communication and power electronic conversion. The existing epitaxial growth method of GaN-based high electron mobility transistor (HEMT) is to directly grow AlN buffer layer, AlxGa 1-x N buffer layer and GaN layer (C-doped GaN layer and intrinsic GaN layer). Due to the material properties between the silicon substrate and the AlN layer, a large number of ductile dislocations will appear during the growth of the AlN buffer layer, resulting in a high dislocation density (poor crystal quality) in the subsequent GaN thin film material and may generate more The leakage channel makes the GaN device have a large leakage current density and is broken down under the condition of far below the critical electric field.
发明内容Contents of the invention
本发明是为了解决现有技术所存在的上述技术问题，提供一种可减少漏电通道的HEMT器件的外延结构。The purpose of the present invention is to solve the above-mentioned technical problems in the prior art, and provide an epitaxial structure of a HEMT device that can reduce leakage channels.
本发明的技术解决方案是：一种HEMT器件的外延结构，包括硅衬底及依次形成的AlN缓冲层、AlxGa1-xN缓冲层及GaN层，在所述硅衬底和AlN缓冲层之间有厚度为10~100nm的含碳化硅多晶混合物的过渡层，所述含碳化硅多晶混合物的过渡层按照如下方法制备：将硅衬底置于MOCVD机台，在900~1100℃条件下通入硅源气体，流量为20~60sccm，生长时间为1~30s，之后在保持所述硅源输入的同时以流量为200~400sccm通入碳源，生长时间为1~10mins。The technical solution of the present invention is: an epitaxial structure of a HEMT device, comprising a silicon substrate and an AlN buffer layer, an AlxGa 1-x N buffer layer and a GaN layer formed in sequence, between the silicon substrate and the AlN buffer layer There is a transition layer containing a silicon carbide polycrystalline mixture with a thickness of 10-100 nm in between, and the transition layer containing a silicon carbide polycrystalline mixture is prepared according to the following method: the silicon substrate is placed on an MOCVD machine, and the temperature is 900-1100 ° C. The silicon source gas is fed in at a flow rate of 20-60 sccm, and the growth time is 1-30 s, and then the carbon source is fed at a flow rate of 200-400 sccm while maintaining the input of the silicon source, and the growth time is 1-10 mins.
所述含碳化硅多晶混合物的过渡层的生长压力优选为100~200mbar。The growth pressure of the transition layer containing the silicon carbide polycrystalline mixture is preferably 100-200 mbar.
所述硅源气体优选为SiH4和Si2H6中的至少一种。The silicon source gas is preferably at least one of SiH4 and Si2H6.
所述碳源气体优选为乙烯、丙烷和甲烷中的至少一种。The carbon source gas is preferably at least one of ethylene, propane and methane.
所述AlN缓冲层的厚度优选为100nm~400nm。The thickness of the AlN buffer layer is preferably 100 nm to 400 nm.
所述AlN缓冲层的生长温度优选为1000~1100℃、生长压力为50~100 mbar。The growth temperature of the AlN buffer layer is preferably 1000-1100° C., and the growth pressure is 50-100 mbar.
本发明是在硅衬底与AlN缓冲层之间形成由硅和碳形成晶格常数和热膨胀系数接近于AlN和GaN的厚度为10~100nm的含碳化硅多晶混合物的过渡层，避免AlN缓冲层长成后出现大量的韧性位错，保证后续外延层的晶体质量，减少漏电通道的产生；同时该含碳化硅多晶混合物的过渡层可阻挡Al原子扩散进入硅衬底，亦可防止界面处形成漏电通道，从而改善整体材料的电学特性，有效降低漏电密度。The present invention is to form a transition layer containing silicon carbide polycrystalline mixture with a thickness of 10-100nm, which is formed by silicon and carbon and whose lattice constant and thermal expansion coefficient are close to AlN and GaN, between the silicon substrate and the AlN buffer layer, so as to avoid AlN buffer After the layer grows, a large number of ductile dislocations appear to ensure the crystal quality of the subsequent epitaxial layer and reduce the generation of leakage channels; at the same time, the transition layer containing the silicon carbide polycrystalline mixture can prevent Al atoms from diffusing into the silicon substrate and prevent the interface A leakage channel is formed at the place, thereby improving the electrical characteristics of the overall material and effectively reducing the leakage density.
附图说明Description of drawings
图1是本发明实施例1~2和对比例1~2漏电流密度测试图。Fig. 1 is embodiment 1～2 of the present invention and comparative example 1～2 leakage current density test figure.
具体实施方式Detailed ways
实施例1：Example 1:
本发明的HEMT器件的外延结构，与现有技术相同，有硅衬底及依次形成的AlN缓冲层、AlxGa1-xN缓冲层及GaN层，与现有技术所不同的是在硅衬底和AlN缓冲层之间有厚度为10nm含碳化硅多晶混合物的过渡层，所述含碳化硅多晶混合物的过渡层按照以下方法制备：将硅衬底置于MOCVD机台，先以1000℃烘烤硅衬底，去除表面的SiO2层；在1000℃、压力为100mbar条件下通入SiH4（200ppm）气体，流量为50sccm，生长时间为20s，之后在保持SiH4气体输入的同时以流量为300sccm通入乙烯，生长时间为1mins，长成含碳化硅多晶混合物的过渡层；在1000℃、压力为50mbar条件下，在含碳化硅多晶混合物的过渡层上生长AlN缓冲层，之后按照现有技术的方法依次生长AlxGa1-xN缓冲层及GaN层。The epitaxial structure of the HEMT device of the present invention is the same as the prior art, there are silicon substrate and AlN buffer layer, AlxGa 1-x N buffer layer and GaN layer formed successively, what is different from the prior art is in the silicon substrate There is a transition layer with a thickness of 10nm between the AlN buffer layer and the silicon carbide polycrystalline mixture, and the transition layer containing the silicon carbide polycrystalline mixture is prepared according to the following method: the silicon substrate is placed on the MOCVD machine, and the silicon substrate is first heated at 1000 ° C Bake the silicon substrate to remove the SiO 2 layer on the surface ; feed SiH 4 (200ppm) gas at 1000°C and a pressure of 100mbar, the flow rate is 50sccm, and the growth time is 20s. The flow rate is 300sccm and ethylene is fed, and the growth time is 1mins to grow into a transition layer containing silicon carbide polycrystalline mixture; at 1000°C and a pressure of 50mbar, an AlN buffer layer is grown on the transition layer containing silicon carbide polycrystalline mixture. Afterwards, the AlxGa 1-x N buffer layer and the GaN layer are sequentially grown according to the method in the prior art.
实施例2：Example 2:
本发明的HEMT器件的外延结构，与现有技术相同，有硅衬底及依次形成的AlN缓冲层、AlxGa1-xN缓冲层及GaN层，与现有技术所不同的是在硅衬底和AlN缓冲层之间有厚度为50nm含碳化硅多晶混合物的过渡层，所述含碳化硅多晶混合物的过渡层按照以下方法制备：将硅衬底置于MOCVD机台，先以1100℃烘烤硅衬底，去除表面的SiO2层；在1000℃、压力为200mbar条件下通入Si2H6（200ppm）气体，流量为50sccm，生长时间为20s，之后在保持所述Si2H6气体输入的同时以流量为300sccm通入甲烷，生长时间为5mins，长成含碳化硅多晶混合物的过渡层；在1100℃、压力为100mbar条件下，在含碳化硅多晶混合物的过渡层上生长AlN缓冲层，之后按照现有技术的方法依次生长AlxGa1-xN缓冲层及GaN层。The epitaxial structure of the HEMT device of the present invention is the same as the prior art, there are silicon substrate and AlN buffer layer, AlxGa 1-x N buffer layer and GaN layer formed successively, what is different from the prior art is in the silicon substrate There is a transition layer with a thickness of 50nm between the AlN buffer layer and the silicon carbide polycrystalline mixture, and the transition layer containing the silicon carbide polycrystalline mixture is prepared according to the following method: the silicon substrate is placed on the MOCVD machine, and the silicon substrate is first heated at 1100 ° C Bake the silicon substrate to remove the SiO 2 layer on the surface; feed Si 2 H 6 (200ppm) gas at 1000°C and a pressure of 200mbar, the flow rate is 50sccm, and the growth time is 20s, and then keep the Si 2 H 6 At the same time as the gas input, methane was introduced at a flow rate of 300 sccm, and the growth time was 5 minutes to grow into a transition layer containing a silicon carbide polycrystalline mixture; at 1100 ° C and a pressure of 100 mbar, the transition layer containing a silicon carbide polycrystalline mixture An AlN buffer layer is grown on it, and then an AlxGa 1-x N buffer layer and a GaN layer are grown sequentially according to the method in the prior art.
对比例1：Comparative example 1:
按照实施例1、实施例2所述现有技术的方法，直接在硅衬底上依次生长AlN缓冲层、AlxGa1-xN缓冲层及GaN层。According to the prior art methods described in Embodiment 1 and Embodiment 2, an AlN buffer layer, an AlxGa1 - xN buffer layer and a GaN layer are grown sequentially directly on a silicon substrate.
对比例2：Comparative example 2:
有硅衬底及依次形成的AlN缓冲层、AlxGa1-xN缓冲层及GaN层，与现有技术所不同的是在硅衬底和AlN缓冲层之间有厚度为110nm含碳化硅多晶混合物的过渡层，所述含碳化硅多晶混合物的过渡层按照以下方法制备：在MOCVD机台，以1100℃烘烤硅衬底，去除表面的SiO2层；在1000℃、压力为200mbar条件下通入Si2H6（200ppm）气体，流量为50sccm，生长时间为20s，之后在保持所述Si2H6气体输入的同时以流量为300sccm通入甲烷，生长时间为11mins，长成含碳化硅多晶混合物的过渡层；在1100℃、压力为100mbar条件下，在含碳化硅多晶混合物的过渡层上生长AlN缓冲层，之后按照现有技术的方法依次生长AlxGa1-xN缓冲层及GaN层。There is a silicon substrate and an AlN buffer layer, an AlxGa 1-x N buffer layer and a GaN layer formed in sequence. The difference from the prior art is that there is a silicon carbide polycrystalline layer with a thickness of 110nm between the silicon substrate and the AlN buffer layer. The transition layer of the mixture, the transition layer containing silicon carbide polycrystalline mixture is prepared according to the following method: in the MOCVD machine, bake the silicon substrate at 1100 ° C to remove the SiO2 layer on the surface; at 1000 ° C, the pressure is 200 mbar conditions Si 2 H 6 (200ppm) gas was introduced at a flow rate of 50 sccm, and the growth time was 20s. Then, methane was introduced at a flow rate of 300 sccm while maintaining the Si 2 H 6 gas input, and the growth time was 11 mins. The transition layer of silicon carbide polycrystalline mixture; under the conditions of 1100°C and pressure of 100mbar, an AlN buffer layer is grown on the transition layer containing silicon carbide polycrystalline mixture, and then AlxGa 1-x N buffer is grown sequentially according to the method of the prior art layer and GaN layer.
实验：experiment:
测试本发明实施例1、2及对比例1、2在电压为650V时薄膜材料的漏电流密度。The leakage current densities of the thin film materials in Examples 1 and 2 of the present invention and Comparative Examples 1 and 2 were tested at a voltage of 650V.
测试结果如图1及表1所示。The test results are shown in Figure 1 and Table 1.
表1Table 1
结果表明：对比例1因无过渡层，漏电流密度最大；实施例1过渡层厚度为10nm，薄膜的耐压性能和材料质量都有所提高，漏电流密度相对实施例1有所降低；实施例2过渡层厚度为50nm，薄膜的耐压性能和材料质量进一步提高，漏电流密度相对实施例1进一步降低；对比例2过渡层厚度为110nm，薄膜的耐压性能和材料质量有所下降，因为过厚的过渡层晶体质量相对比较差，而在此基础上生长的GaN材料质量也会变差，漏电流密度虽相对实施例1有所降低，但较实施例1、2均有所提高。The result shows: comparative example 1 is because there is no transition layer, leakage current density is maximum; Embodiment 1 transition layer thickness is 10nm, and the withstand voltage performance of film and material quality all improve to some extent, and leakage current density reduces to some extent relative to embodiment 1; Implementation The transition layer thickness of example 2 is 50nm, and the withstand voltage performance and material quality of film are further improved, and leakage current density is further reduced relative to embodiment 1; The transition layer thickness of comparative example 2 is 110nm, and the withstand voltage performance and material quality of film decline to some extent, Because the crystal quality of the transition layer that is too thick is relatively poor, and the quality of the GaN material grown on this basis will also deteriorate. Although the leakage current density is lower than that of Example 1, it is higher than that of Examples 1 and 2. .
Claims (6)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910513344.5A CN110246890A (en) | 2019-06-14 | 2019-06-14 | epitaxial structure of HEMT device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910513344.5A CN110246890A (en) | 2019-06-14 | 2019-06-14 | epitaxial structure of HEMT device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110246890A true CN110246890A (en) | 2019-09-17 |
Family
ID=67887036
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910513344.5A Pending CN110246890A (en) | 2019-06-14 | 2019-06-14 | epitaxial structure of HEMT device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110246890A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111354791A (en) * | 2020-03-23 | 2020-06-30 | 苏州晶界半导体有限公司 | HEMT device epitaxial structure and growth method thereof |
| CN117904719A (en) * | 2024-03-15 | 2024-04-19 | 浙江求是半导体设备有限公司 | N-type SiC epitaxial wafer and preparation method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101017864A (en) * | 2006-02-08 | 2007-08-15 | 中国科学院半导体研究所 | Silicon base covariant underlay with the ultrathin carbon silicon middle layer and its preparing method |
| US20110045281A1 (en) * | 2009-08-20 | 2011-02-24 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | Reduction of basal plane dislocations in epitaxial sic |
| CN106684139A (en) * | 2015-11-11 | 2017-05-17 | 中国科学院苏州纳米技术与纳米仿生研究所 | Si substrate-based GaN epitaxial structure and preparation method therefor |
| CN107849730A (en) * | 2015-07-23 | 2018-03-27 | 华威大学 | Extension 3C SiC are grown on the monosilicon |
| CN109346513A (en) * | 2018-09-29 | 2019-02-15 | 大连芯冠科技有限公司 | Nitride epitaxial layer capable of improving crystal quality and voltage resistance and preparation method thereof |
-
2019
- 2019-06-14 CN CN201910513344.5A patent/CN110246890A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101017864A (en) * | 2006-02-08 | 2007-08-15 | 中国科学院半导体研究所 | Silicon base covariant underlay with the ultrathin carbon silicon middle layer and its preparing method |
| US20110045281A1 (en) * | 2009-08-20 | 2011-02-24 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | Reduction of basal plane dislocations in epitaxial sic |
| CN107849730A (en) * | 2015-07-23 | 2018-03-27 | 华威大学 | Extension 3C SiC are grown on the monosilicon |
| CN106684139A (en) * | 2015-11-11 | 2017-05-17 | 中国科学院苏州纳米技术与纳米仿生研究所 | Si substrate-based GaN epitaxial structure and preparation method therefor |
| CN109346513A (en) * | 2018-09-29 | 2019-02-15 | 大连芯冠科技有限公司 | Nitride epitaxial layer capable of improving crystal quality and voltage resistance and preparation method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111354791A (en) * | 2020-03-23 | 2020-06-30 | 苏州晶界半导体有限公司 | HEMT device epitaxial structure and growth method thereof |
| CN117904719A (en) * | 2024-03-15 | 2024-04-19 | 浙江求是半导体设备有限公司 | N-type SiC epitaxial wafer and preparation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104409319B (en) | The preparation method of high-quality GaN cushion is grown on a kind of graphene-based bottom | |
| JP4677499B2 (en) | Epitaxial substrate for electronic device and manufacturing method thereof | |
| CN108400159B (en) | HEMT epitaxial structure with multi-quantum well high-resistance buffer layer and preparation method | |
| JP2003045899A (en) | Semiconductor element | |
| CN108899365B (en) | High-resistance GaN-based buffer layer epitaxial structure and preparation method thereof | |
| CN112466745B (en) | Control method for silicon carbide epitaxial growth and silicon carbide epitaxial wafer | |
| CN108878266B (en) | Method for growing single crystal gallium nitride film on polycrystalline or amorphous substrate | |
| CN109599329B (en) | Method for growing nitrogen polar III-nitride semiconductor layer on silicon substrate | |
| CN111009468A (en) | Preparation method and application of semiconductor heterostructure | |
| CN110246890A (en) | epitaxial structure of HEMT device | |
| CN114250510A (en) | Epitaxial structure for gallium nitride-based radio frequency device and preparation method thereof | |
| CN114551593A (en) | Epitaxial wafer, epitaxial wafer growth method and high-electron-mobility transistor | |
| CN114551594A (en) | Epitaxial wafer, epitaxial wafer growth method and high-electron-mobility transistor | |
| CN111863945A (en) | A kind of preparation method of high resistance gallium nitride and its heterostructure | |
| Chang et al. | Growth characteristics of Fe-doped GaN epilayers on SiC (001) substrates and their effects on high breakdown voltage devices | |
| CN114664642B (en) | HEMT structure based on III-nitride homoepitaxy, preparation method and application thereof | |
| CN101471245A (en) | Method for transversal epitaxial growth of gallium nitride on Si substrate | |
| CN110034174A (en) | High electron mobility transistor epitaxial wafer and preparation method thereof | |
| CN109346513B (en) | Nitride epitaxial layer capable of improving crystal quality and withstand voltage performance and preparation method thereof | |
| CN113913930A (en) | Epitaxial structure with N-type buffer layer and preparation method thereof | |
| CN110429128B (en) | Low-barrier multi-quantum-well high-resistance buffer layer epitaxial structure and preparation method thereof | |
| CN117334735A (en) | Si-based GaN-HEMT structure epitaxial wafer and preparation method thereof | |
| CN109830535B (en) | High-resistance gallium nitride-based buffer layer with nano step graded layer and preparation method thereof | |
| CN116646248A (en) | Epitaxial wafer preparation method, epitaxial wafer thereof and high-electron mobility transistor | |
| CN111312585B (en) | Epitaxial layer growth method of low dislocation density nitride |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190917 |