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CN110233110B - 一种GaN倒装芯片的焊接方法 - Google Patents

一种GaN倒装芯片的焊接方法 Download PDF

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CN110233110B
CN110233110B CN201910461458.XA CN201910461458A CN110233110B CN 110233110 B CN110233110 B CN 110233110B CN 201910461458 A CN201910461458 A CN 201910461458A CN 110233110 B CN110233110 B CN 110233110B
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solder balls
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崔素杭
白欣娇
王静辉
袁凤坡
田志怀
唐景庭
张志庆
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Tonghui Electronics Co ltd
CETC 13 Research Institute
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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Abstract

本发明涉及一种GaN倒装芯片的焊接方法，该方法的具体步骤包括，A、减少基板在化学镀镍钯浸金过程中Ni层厚度；B、在倒装芯片上植入第一层的锡球或者铜柱；C、在倒装芯片上的第一层的锡球或铜柱上使用点胶的方式涂抹助焊剂，利用真空吸附治具吸附第二层的锡球，将第二层的锡球放置在第一层的锡球或铜柱的助焊剂上，助焊剂将两层锡球或锡球与铜柱粘结，第二层的锡球的成分为SnAgCu；D、将粘结第二层的锡球的倒装芯片贴装在基板上，放入真空回流焊中进行焊接，该方法使倒装芯片的焊锡球与基板之间的焊接更为牢固，有效的避免了锡球与基板之间断裂情况的发生。

Description

一种GaN倒装芯片的焊接方法
技术领域
本发明属于半导体封装的技术领域，尤其涉及一种GaN倒装芯片的焊接方法。
背景技术
倒装芯片是一种无引脚结构，通过芯片上的涂点直接将芯片面朝下用焊料或者导电胶互联到基板上的一种技术。由于互联线短，寄生电容、电感比传统引线键合技术都要小，从而更适合高频电子产品，且所占基板面积小，安装密度高，并且简化互联工艺，快速、省时，适合于工业化生产。
在倒装芯片与基板的焊接过程中，由于基板的Cu焊盘采用了化学镀镍钯浸金(ENEPIG)技术，在这个过程中，溶剂中的磷元素会伴随着镍层残留在焊盘上，焊接后形成的界面金属共化物(IMC)中包含富磷镍层，经过电子束扫描可发现，富磷镍层会导致焊锡球与焊盘之间出现断裂，最终导致了产品的实效。
molding过程是用塑封料(EMC)将焊接后的芯片封装起来的过程，如果倒装芯片与PCB的间距比较小，塑封料不容易流入小间隙内，导致填充不足。填充不足对锡球断裂影响不大，但是在高温环境下，锡球有可能会融化，深入到填充不充分的空隙内，导致短路等情况的发生。
发明内容
为解决现有技术中存在的问题，本发明提供了一种GaN倒装芯片的焊接方法，可以有效的提高芯片上的焊锡球在基板上的焊接能力，减少锡球断裂的情况发生。
本发明采用的技术方案是：
一种GaN倒装芯片的焊接方法，关键在于，所述的方法的具体步骤包括，
A、减少基板在化学镀镍钯浸金过程中Ni层厚度；
B、在倒装芯片上植入第一层的锡球或者铜柱；
C、在倒装芯片上的第一层的锡球或铜柱上使用点胶的方式涂抹助焊剂，利用真空吸附治具吸附第二层的锡球，将第二层的锡球放置在第一层的锡球或铜柱的助焊剂上，助焊剂将两层锡球或锡球与铜柱粘结，第二层的锡球的成分为SnAgCu；
D、将粘结第二层的锡球的倒装芯片贴装在基板上，放入真空回流焊中进行焊接。
所述的真空吸附治具的吸附口的直径小于第二层的锡球的直径。
所述的第二层的锡球的直径为20-30μm。
所述的基板上Ni层的厚度为0.3-0.5μm。
本发明的有益效果是：本申请在倒装芯片上的锡球或铜柱上增加一层锡球，提高了倒装芯片与基板之间的高度，有利于改善molding过程底部填充不足的情况，在焊接过程中也减少了助焊剂的残留。通过减少基板上Ni层厚度，使锡球中的铜元素在焊接过程中有效的穿过焊盘中的Ni层，参与到IMC形成过程中使倒装芯片的焊锡球与基板之间的焊接更为牢固，有效的避免了锡球与基板之间断裂情况的发生。
附图说明
图1是倒装芯片利用本发明焊接完成后的结构示意图。
附图中，1、基板，2、倒装芯片，3、锡球。
具体实施方式
下面结合附图及具体实施例对本发明作进一步说明。
具体实施例，如图1所示，一种GaN倒装芯片的焊接方法，该方法的具体步骤为，
A、减少基板1在化学镀镍钯浸金过程中Ni层厚度，所使用的基板1上的Cu焊盘经过ENEPIG处理，其中将各部分的厚度分别设定为Ni 0.3-0.5μm，Pd 0.11-0.18μm，Au 0.07-0.12μm；本发明的ENEPIG的过程，在化学镀镍过程中，可以通过控制电流密度在5A/dm2以下，减缓镍的沉积速度，以获得较薄的镍层。镀液中采用磷酸盐作为还原剂，Ni层厚度过大，Ni层中残留的磷元素在焊接时会参与到金属化合物的成形过程中，容易导致焊点断裂，因此选用Ni层的厚度为0.3-0.5μm，既降低了磷元素的残留，又利于后期Cu元素穿过。
B、在倒装芯片2上植入第一层的锡球3，该锡球3植入可选用目前成熟的现有技术，如锡球3植入法、锡膏印刷方法等，第一层锡球成分可以采用SnAg或者SnAgCu；
C、在倒装芯片2上的第一层的锡球3或铜柱上使用点胶的方式涂抹助焊剂，按照倒装芯片2上锡球3的布局设计带有真空吸附作用的真空吸附治具，真空吸附治具上的吸附口的直径略小于第二层的锡球3的直径，吸附口直径与锡球直径比较范围为0.7～0.9，最优比值为0.85，保证吸附口能够有效、平稳地吸附锡球3，利用真空吸附治具吸附制备好的第二层的锡球3，将第二层的锡球3放置在第一层的锡球3或铜柱的助焊剂上，助焊剂将两层锡球3或锡球3与铜柱粘结，第二层的锡球3的成分为SnAgCu，直径约为25μm；
D、将粘结第二层的锡球3的倒装芯片2贴装在基板1上，放入真空回流焊中进行回流，回流过程中经过甲酸还原、焊接。
通过该方法可以使锡球中的Cu元素在焊接过程中有效的穿过焊盘中的Ni层，更好的参与到IMC的过程中，使倒装芯片的焊锡球与基板之间的焊接更为牢固，有效的避免锡球与基板之间发生断裂的问题，并可以减少助焊剂残留，提升了焊接后倒装芯片的高度，避免molding过程中出现底部填充不充分的情况。若助焊剂有残留，在molding过程中会产生空洞，在200℃的高温下，融化的锡球会流入这些空洞中，导致产品短路等失效情况，而锡球高度的增加有助于助焊剂的挥发；高度的增加也利于焊接完成后使用去离子水清洗助焊剂残留。此方法可以有效的提高封装后的GaN器件可靠性。

Claims (4)

1.一种GaN倒装芯片的焊接方法，其特征在于：所述的方法的具体步骤包括，
A、减少基板(1)在化学镀镍钯浸金过程中Ni层厚度；
B、在倒装芯片(2)上植入第一层的锡球(3)或者铜柱；
C、在倒装芯片(2)上的第一层的锡球(3)或铜柱上使用点胶的方式涂抹助焊剂，利用真空吸附治具吸附第二层的锡球(3)，将第二层的锡球(3)放置在第一层的锡球(3)或铜柱的助焊剂上，助焊剂将两层锡球(3)或锡球(3)与铜柱粘结，第二层的锡球(3)的成分为SnAgCu；
D、将粘结第二层的锡球(3)的倒装芯片(2)贴装在基板(1)上，放入真空回流焊中进行焊接。
2.根据权利要求1所述的一种GaN倒装芯片的焊接方法，其特征在于：所述的真空吸附治具的吸附口的直径小于第二层的锡球(3)的直径。
3.根据权利要求1所述的一种GaN倒装芯片的焊接方法，其特征在于：所述的第一层、第二层的锡球(3)的直径为20-30μm。
4.根据权利要求1所述的一种GaN倒装芯片的焊接方法，其特征在于：所述的基板(1)上Ni层的厚度为0.3-0.5μm。
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