CN110213863B - Circuit structure and adjustment method for linear adjustment rate of LED driving chip - Google Patents

Abstract

The invention discloses a circuit structure of linear adjustment rate of an LED driving chip, which comprises a switch K1, wherein the switch K1 is connected with a protection resistor RC in series and then connected to the forward end of an operational amplifier EA; the negative phase of EA is connected with reference voltage VREF; the output end of EA is connected with a capacitor CC and then fed back to the forward end of the operational amplifier EA to form a differential positive feedback circuit; the output end of EA is connected with the first input end of the comparator COMP; a second input end of the comparator COMP is connected with a reference voltage VREF; the output end of the comparator COMP is connected with the input end of the homophase device; the output end of the phase-shifter is connected with the control end of the switch K1; a delay circuit Dely is connected in series between the output end of the phase-shifter and the output interface DRV; the LED driving chip solves the technical problems that the LED current can be reduced along with the increase of the input voltage, the linear adjustment rate can be relatively poor and the like along with the increase of the input voltage due to the existence of leb time of the existing low-end current sampling buck LED driving chip.

Description

A circuit structure and adjustment method for linear adjustment rate of LED driver chip

Technical Field

The present invention belongs to the field of electronic technology, and in particular relates to a circuit structure and an adjustment method for a linear adjustment rate of an LED driver chip.

Background technique

The existing low-end current sampling buck LED driver chip application circuit (see Figure 1), VIN is the input signal, the top diode is the protection circuit. When the voltage value is greater than the preset value, the current is shunted through the diode to prevent the LED from being damaged by instantaneous high voltage. The resistor behind plays the role of current limiting, and the function of the two capacitors on the lower left is filtering, converting the input electrical signal into a stable electrical signal. As shown in the figure, when the input voltage increases sharply, the controller turns on the voltage, DRV outputs a high level and adds it to the gate of the N-type tube, the transistor turns on for current limiting; CS samples the signal from the resistor. The controller, MOS tube and resistor constitute a constant current source.

The circuit implementation of the controller is shown in Figure 2. The switch K1 is used to simulate the on and off of the MOS tube. The signal input from the sampling terminal CS is connected to the positive terminal of the operational amplifier EA through the protection resistor RC. The negative terminal of EA is connected to the reference voltage VREF. On the one hand, the output of EA is fed back to the positive terminal of the operational amplifier EA through the capacitor CC, forming a differential positive feedback circuit, which increases the reversal speed of the level, prevents the subsequent voltage mutation, and converts the waveform into a rectangular wave. On the other hand, the comparator COMP is input, and the output voltage of EA is compared with the reference voltage, and the output is formed into a DRV signal through the same direction device.

Such a buck drive timing diagram is shown in Figure 3. When the DRV voltage rises, due to the existence of LEB, the rising edge of the K1 signal is delayed, and the CS signal is also delayed. The resulting sampling time is short, and the sampling point is higher than the reference voltage.

Due to the existence of leb (leading edge blanking) time, there is a time difference between the switch opening and the start of signal sampling by the CS port. When the switch is turned on and off, due to the existence of parasitic components, the noise generated will be superimposed on the sampling signal of CS, resulting in inaccurate signals. The averaged signal will be higher than the actual value, and the current flowing through the LED will be smaller than the set value. The smaller the signal duty cycle, the more obvious the impact of leb time will be: when the output is fixed, as the input voltage increases, the LED current will decrease with the increase of input voltage, and the linear regulation rate will be poor.

Summary of the invention

The technical problem to be solved by the present invention is to provide a circuit structure and adjustment method for the linear regulation rate of an LED driver chip, so as to solve the technical problems that the low-end current sampling buck LED driver chip in the prior art will cause the averaged vfb signal to be higher than the actual value due to the existence of leb time, thereby causing the LED current to be smaller than the set value. The smaller the duty cycle, the more obvious the influence of leb time will be: when the output is fixed, as the input voltage increases, the LED current will decrease as the input voltage increases, and the linear regulation rate will be relatively poor.

Technical solution of the present invention:

A circuit structure for linear regulation rate of an LED driver chip comprises: a switch K1, which is connected in series with a protection resistor RC and then connected to the positive end of an operational amplifier EA; the negative end of EA is connected to a reference voltage VREF; the output end 1 of EA is connected to a capacitor CC and then fed back to the positive end of the operational amplifier EA, forming a differential positive feedback circuit; the output end 2 of EA is connected to the first input end of a comparator COMP; the second input end of the comparator COMP is connected to the reference voltage VREF; the output end of the comparator COMP is connected to the input end of a phase detector; the output end of the phase detector is connected to a control end of the switch K1; and a delay circuit Dely is connected in series between the output end of the phase detector and an output interface DRV.

The delay circuit Dely is an output delay circuit.

The method for adjusting the linear regulation rate of the circuit structure of the LED driver chip is as follows: the switch K1 simulates the sampling voltage added to the sampling resistor when the MOS tube is turned on and off; the signal inputted by the sampling terminal CS is connected to the positive terminal of the operational amplifier EA through the protection resistor RC; the negative terminal of EA is connected to the reference voltage VREF; the output terminal of EA is connected to the capacitor CC and then fed back to the positive terminal of the operational amplifier EA, forming a differential positive feedback circuit, improving the reversal speed of the level, preventing the subsequent sudden change of the voltage, and converting the waveform into a rectangular wave; on the other hand, the output signal of EA is inputted into the comparator COMP, compared with the reference voltage, and the output is outputted through the isotropic device to control the switch K1; and the delay circuit Delay is connected to the delay time Leb, avoiding the shielding time Leb between the output and the input, and forming a DRV signal.

Beneficial effects of the present invention:

When the present invention outputs a drv signal to control the sampling circuit, the falling edge of the signal obtained by CS sampling and the turn-off signal of the switch k1 are staggered by the same time as LEB by delaying the drv signal, thereby offsetting the influence of LEB on the voltage VFB applied to the LED. The LED current is made the same as the set value and does not change with the duty cycle, thereby improving the linear regulation rate; the problem that the low-end current sampling buck LED driver chip in the prior art will cause the averaged vfb signal to be higher than the actual value due to the existence of the leb time, thereby causing the LED current to be smaller than the set value. The smaller the duty cycle, the more obvious the influence of the leb time will be: when the output is fixed, as the input voltage increases, the LED current will decrease as the input voltage increases, and the linear regulation rate will be relatively poor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of an application circuit of an existing low-end current sampling buck-type LED driver chip;

FIG2 is a circuit diagram of an existing low-end current sampling buck-type LED driver chip controller;

FIG3 is a timing diagram of a low-end current sampling buck-type LED driver chip buck driving in the prior art;

FIG4 is a schematic diagram of a circuit of the present invention;

FIG5 is a timing diagram of the present invention.

Detailed ways

A circuit structure of a linear regulation rate of an LED driver chip (see FIG4 ), comprising: a switch K1, which is connected in series with a protection resistor RC and then connected to the positive end of an operational amplifier EA; the negative end of EA is connected to a reference voltage VREF; the output end 1 of EA is connected to a capacitor CC and then fed back to the positive end of the operational amplifier EA, forming a differential positive feedback circuit; the output end 2 of EA is connected to the first input end of a comparator COMP; the second input end of the comparator COMP is connected to the reference voltage VREF; the output end of the comparator COMP is connected to the input end of a phase detector; the output end of the phase detector is connected to the control end of the switch K1; and a delay circuit Dely is connected in series between the output end of the phase detector and the output interface DRV.

The delay circuit Dely is an output delay circuit and can be implemented by using a delayed-on relay.

The method for adjusting the linear regulation rate of the circuit structure of the LED driver chip is as follows: the switch K1 simulates the sampling voltage added to the sampling resistor when the MOS tube is turned on and off; the signal inputted by the sampling terminal CS is connected to the positive terminal of the operational amplifier EA through the protection resistor RC; the negative terminal of EA is connected to the reference voltage VREF; the output terminal of EA is connected to the capacitor CC and then fed back to the positive terminal of the operational amplifier EA, forming a differential positive feedback circuit, improving the reversal speed of the level, preventing the subsequent sudden change of the voltage, and converting the waveform into a rectangular wave; on the other hand, the output signal of EA is inputted into the comparator COMP, compared with the reference voltage, and the output is outputted through the isotropic device to control the switch K1; and the delay circuit Delay is connected to the delay time Leb, avoiding the shielding time Leb between the output and the input, and forming a DRV signal.

The timing diagram (see Figure 5) shows that the circuit output s1 has a delay in the control time of k1 due to the existence of LEB; on the other hand, the S1 signal is output from DRV after a delay t2 that is the same as the time of leb. The signal of the cs sampling signal avoids the noise signal generated by the parasitic components when the switch k1 is turned on and off due to the delay of t2.

Claims (2)

1. A method for adjusting the linear regulation rate of an LED driver chip, comprising: a switch K1, the switch K1 is connected in series with a protection resistor RC and then connected to the positive terminal of an operational amplifier EA; the negative terminal of EA is connected to a reference voltage VREF; the output terminal of EA is connected to a capacitor CC and then fed back to the positive terminal of the operational amplifier EA, forming a differential positive feedback circuit; the output terminal of EA is also connected to a comparator COMP The first input terminal of the comparator COMP is connected to the reference voltage VREF; the output terminal of the comparator COMP is connected to the input terminal of the phase detector; it is characterized in that: the output terminal of the phase detector is connected to the control terminal of the switch K1; a delay circuit Dely is connected in series between the output terminal of the phase detector and the output interface DRV; the adjustment method is: the switch K1 simulates the sampling voltage added to the sampling resistor when the MOS tube is turned on and off, the signal input by the sampling terminal CS is connected to the positive terminal of the operational amplifier EA through the protection resistor RC, and the negative phase terminal of EA is connected to the reference voltage VREF. On the one hand, the output terminal of EA is connected to the capacitor CC and then fed back to the positive terminal of the operational amplifier EA, forming a differential positive feedback circuit, which improves the reversal speed of the level, prevents the subsequent sudden change of voltage, and converts the waveform into a rectangular wave; on the other hand, the output signal of EA is input to the comparator COMP, compared with the reference voltage, and the output passes through the phase detector to control the switch K1; and the delay circuit Delay is connected to the delay time Leb to avoid the shielding time Leb between the output and the input, forming a DRV signal. 2. The method for adjusting the linear regulation rate circuit structure of an LED driver chip according to claim 1, wherein the delay circuit Dely is an output delay circuit.