CN110212651B - Dual-coil antenna board and control circuit thereof - Google Patents
Dual-coil antenna board and control circuit thereof Download PDFInfo
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- CN110212651B CN110212651B CN201910424709.7A CN201910424709A CN110212651B CN 110212651 B CN110212651 B CN 110212651B CN 201910424709 A CN201910424709 A CN 201910424709A CN 110212651 B CN110212651 B CN 110212651B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q23/00—Antennas with active circuits or circuit elements integrated within them or attached to them
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q7/00—Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/10—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/40—Circuit arrangements or systems for wireless supply or distribution of electric power using two or more transmitting or receiving devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/80—Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
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Abstract
A dual-coil antenna board control circuit is provided, which avoids multiplexing of coil transmitting and receiving functions by adding a transmitting coil array only used for externally transmitting power signals and a receiving coil array only used for receiving input signals, thereby realizing simultaneous transmission of transmitting signals and receiving signals, providing sufficient transmitting power to ensure power supply of a handwriting pen, stably receiving the input signals and obtaining data from the received input signals for a long time, and solving the problems of insufficient transmitting power, unstable receiving signals and large generated data deviation in the traditional technical scheme.
Description
Technical Field
The invention belongs to the technical field of antenna boards, and particularly relates to a double-coil antenna board and a control circuit thereof.
Background
At present, the transmitting coil and the receiving coil of the traditional antenna board are the same coil, but the multiplexing mode of the coil often leads to low switching efficiency between the transmitting and receiving of the antenna board, so that insufficient transmitting power and unstable receiving signals of the antenna board are caused, the handwriting pen cannot continuously supply power, the unstable receiving signals of the antenna board can cause that the antenna board cannot guarantee long-time sine wave signal frequency calculation, and data calculation deviation is large.
Therefore, the conventional technical scheme has the problems of insufficient transmitting power, unstable received signals and large generated data deviation.
Disclosure of Invention
In view of the above, the embodiment of the invention provides a dual-coil antenna board and a control circuit thereof, which aim to solve the problems of insufficient transmitting power, unstable receiving signals and large data calculation deviation in the traditional technical scheme.
A first aspect of an embodiment of the present invention provides a dual coil antenna board control circuit, including: a transmit coil array configured to transmit power signals externally; a receive coil array, the receive coil array and the transmit coil array being disposed overlapping the same surface area of the dual-coil antenna plate, the receive coil array being configured to receive an input signal; and the input end of the signal processing module is connected with the receiving coil array, the first output end of the signal processing module is connected with the transmitting coil array, the second output end of the signal processing module is connected with the upper computer, and the signal processing module is used for extracting the input signal and converting the input signal into data information to be transmitted to the upper computer, generating the power signal and transmitting the power signal to the transmitting coil array.
In one embodiment, the receive coil array includes at least one receive coil set disposed along a first direction and at least one receive coil set disposed along a second direction different from the first direction, each receive coil set disposed along the first direction intersecting a respective receive coil set disposed along the second direction.
In one embodiment, each receiving coil group comprises more than seven receiving coils arranged side by side, adjacent receiving coils in the group being mutually intersected.
In one embodiment, in each receiving coil group, the mth receiving coil and the mth-2 receiving coils, the mth-1 receiving coil, the (m+1) th receiving coil and the (m+2) th receiving coil are intersected, and m is equal to or greater than 3.
In one embodiment, the transmit coil array includes more than two transmit coils disposed side by side along a third direction, and adjacent ones of the transmit coils are interdigitated.
In one embodiment, the signal processing module comprises: the input end of the signal extraction unit is connected with the receiving coil array, and the signal extraction unit is used for extracting the input signal and converting the input signal into a first signal and a second signal; the first input end of the data processing unit is connected with the first output end of the signal extraction unit, the second input end of the data processing unit is connected with the second output end of the signal extraction unit, and the data processing unit is used for generating an excitation signal used for controlling the generation of the power signal and generating the data information according to the first signal and the second signal and transmitting the data information to the upper computer; and the input end of the power signal generating unit is connected with the first output end of the data processing unit, the output end of the power signal generating unit is connected with the transmitting coil array, and the power signal generating unit generates the power signal according to the excitation signal and transmits the power signal to the transmitting coil array.
In one embodiment, the signal extraction unit comprises: a coil selection subunit, connected to the receiving coil array and the data processing unit, configured to gate a target coil of the receiving coil array and output an input signal received by the target coil under control of the data processing unit; the input end of the signal amplification subunit is connected with the output end of the coil selection subunit, and the signal amplification subunit is used for amplifying the input signal and outputting an amplified input signal; the filtering subunit is connected with the signal amplifying subunit and is used for filtering high-frequency interference signals in the amplified input signals and outputting target input signals; a first conversion subunit connected to the filtering subunit, the first conversion subunit being configured to convert the target input signal into a first signal; and a second conversion subunit configured to convert the target input signal into a second signal.
In one embodiment, the coil selecting subunit includes a multi-one analog switch chip, multiple input branches of the multi-one analog switch chip are connected with the receiving coil array, a control end and an address end of the multi-one analog switch chip are connected with the data processing unit, a common input end of the multi-one analog switch chip is an output end of the coil selecting subunit, and the multi-one analog switch chip is configured to gate channels of the target coil and the signal amplifying subunit under the control of the data processing unit.
In one embodiment, the first converter subunit comprises: the device comprises a first diode, a first resistor, a second resistor, a third resistor, a first capacitor, a first switch tube and a first amplifier, wherein the positive electrode of the first diode is connected with a target input signal, the negative electrode of the first diode is connected with the first end of the first resistor, the second end of the first resistor is connected with the first input end of the first amplifier, the first end of the first capacitor and the source electrode of the first switch tube, the second input end of the first amplifier is grounded through the second resistor, the control end of the first switch tube is connected with the data processing unit, the drain electrode of the first switch tube is connected with the second end of the first capacitor, the output end of the first amplifier and the first end of the third resistor, and the second end of the third resistor is the output end of the first conversion subunit.
In one embodiment, the second conversion subunit comprises: the output end of the Schmitt trigger is the output end of the second conversion subunit.
In one embodiment, the power signal generating unit includes a third amplifier, a control end of the third amplifier is connected to the data processing unit, an input end of the third amplifier is connected to the data processing unit, and an output end of the third amplifier is connected to the transmitting coil array.
A second aspect of the embodiment of the present invention provides a dual-coil antenna board, including the dual-coil antenna board control circuit described above.
According to the double-coil antenna board control circuit, the transmitting coil array only used for externally transmitting power signals and the receiving coil array only used for receiving input signals are added, so that multiplexing of coil transmitting and receiving functions is avoided, the transmitting signals and the receiving signals are carried out simultaneously, sufficient transmitting power is provided for guaranteeing power supply of a handwriting pen, the input signals can be stably received, data can be obtained from the received input signals for a long time, and the problems of insufficient transmitting power, unstable receiving signals and large generated data deviation in the traditional technical scheme are solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a dual-coil antenna board control circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an exemplary circuit of a transmit coil array and a receive coil array in the dual coil antenna board control circuit shown in FIG. 1;
FIG. 3 is an exemplary circuit schematic of a signal processing module in the dual coil antenna panel control circuit shown in FIG. 1;
FIG. 4 is a schematic circuit diagram of an example signal extraction unit in the signal processing module shown in FIG. 3;
FIG. 5 is an exemplary circuit schematic of a coil selection subunit of the signal extraction unit shown in FIG. 4;
FIG. 6 is an exemplary schematic circuit diagram of a first converter unit of the signal extraction unit shown in FIG. 4;
fig. 7 is a schematic circuit diagram of an example of a second conversion subunit of the signal extraction unit shown in fig. 4.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1, a circuit schematic diagram of a dual-coil antenna board control circuit according to an embodiment of the present invention is shown, for convenience of explanation, only the portions related to the embodiment are shown, and the details are as follows:
the control circuit of the double-coil antenna board comprises a transmitting coil array 100, a receiving coil array 200 and a signal processing module 300, wherein the receiving coil array 200 and the transmitting coil array 100 can be overlapped on the same surface area of the double-coil antenna board, the input end of the signal processing module 300 is connected with the receiving coil array 200, the first output end of the signal processing module 300 is connected with the transmitting coil array 100, and the second output end of the signal processing module 300 is connected with an upper computer 400; the transmitting coil array 100 is configured to transmit power signals to the outside, the receiving coil array 200 is configured to receive input signals, and the signal processing module 300 is configured to extract the input signals and convert them into data information to be transmitted to the host computer 400 and generate power signals to be transmitted to the transmitting coil array 100.
It should be appreciated that the transmit coil array 100 includes a plurality of transmit coils, each of which are arranged in a staggered and/or staggered order; the receiving coil array 200 includes a plurality of receiving coils, and the receiving coils are crossed and/or staggered in a certain sequence; the signal processing module 300 may be comprised of one or more chips or integrated circuits that provide signal extraction, data processing, and signal generation.
The dual-coil antenna board control circuit in this embodiment avoids the multiplexing of the coil transmitting and receiving functions by adding the transmitting coil array 100 only for transmitting the power signal to the outside and the receiving coil array 200 only for receiving the input signal, thereby realizing the simultaneous operation of the transmitting signal and the receiving signal, providing sufficient transmitting power to ensure the power supply of the stylus pen, stably receiving the input signal and obtaining data from the received input signal for a long time, and solving the problems of insufficient transmitting power, unstable receiving signal and large generated data deviation in the traditional technical scheme.
In one embodiment, the receive coil array 100 includes at least one receive coil set disposed along a first direction and at least one receive coil set disposed along a second direction different from the first direction, each receive coil set disposed side-by-side along the first direction intersecting each receive coil set disposed side-by-side along the second direction. It should be appreciated that when the receive coil array 100 includes more than two receive coil sets disposed in a first direction and/or more than two receive coil sets disposed in a second direction different from the first direction, the more than two receive coil sets disposed in the same direction may be disposed side-by-side.
In one embodiment, two or more receiving coil sets in the same direction are arranged side by side, and adjacent receiving coil sets are spaced apart by a gap, that is: when the receiving coil array 100 includes two or more receiving coil groups arranged side by side in the first direction, the respective receiving coil groups arranged side by side in the first direction may be separated by a gap; when the receiving coil array 100 includes two or more receiving coil groups arranged side by side in the second direction, the respective receiving coil groups arranged side by side in the second direction may be separated by a gap. It should be appreciated that in other embodiments, the adjacent receiving coil sets in the same side-by-side arrangement may be separated from each other without any gap.
In one embodiment, each receiving coil group includes seven or more receiving coils arranged side by side, adjacent receiving coils within the group intersecting each other. Optionally, in each receiving coil group, the mth receiving coil and the mth-2 receiving coils, the mth-1 receiving coil, the (m+1) th receiving coil and the (m+2) th receiving coil are intersected, and m is more than or equal to 3.
For ease of understanding, one example is as follows, referring to fig. 2, in one embodiment, the receive coil array 100 includes: the X-axis receiving coil group is arranged in parallel along the first direction and is in X-axis direction, the Y-axis receiving coil group is arranged in parallel along the second direction and is in Y-axis direction, the X-axis receiving coil group and the Y-axis receiving coil group are arranged in a crossing way, wherein the X-axis receiving coil group comprises more than seven X-axis receiving coils arranged in parallel, the Y-axis receiving coil group comprises more than seven Y-axis receiving coils arranged in parallel, an mth X-axis coil and an mth-2X-axis coil in the X-axis receiving coil group, an mth-1X-axis coil, an mth+1th X-axis coil and an mth+2th X-axis coil are arranged in a staggered way, and m is more than or equal to 3; the m-th Y-axis coil, the m-2-th Y-axis coil, the m-1-th Y-axis coil, the m+1th Y-axis coil and the m+2th Y-axis coil in the Y-axis receiving coil group are arranged in a staggered way, and m is more than or equal to 3.
The receiving coil array 100 in this embodiment, by arranging seven or more receiving coils side by side in each receiving coil group and arranging the respective coils alternately according to a certain rule, more accurately receives an input signal and makes it easy for the signal processing module 300 to accurately extract the input signal and convert it into data information.
In one embodiment, the transmit coil array 100 includes more than two transmit coils disposed side-by-side along a third direction, with adjacent transmit coils intersecting one another.
It should be understood that the third direction may be the same direction as the first direction or the second direction, or may be a direction different from the first direction and the second direction. Each transmitting coil is intersected with each receiving coil group arranged side by side along the first direction and/or the second direction on a plane.
It should be understood that the individual transmit coils in the transmit coil array 100 may be arranged in a regular cross arrangement, for ease of understanding, and one example of such an arrangement is as follows, referring to fig. 2, in one embodiment, the transmit coil array 100 includes more than two transmit coils arranged side by side along the third direction, and the nth transmit coil and the n-1 th transmit coil and the n+1 th transmit coil are arranged in a cross arrangement, that is: the 1 st transmitting coil and the 2 nd transmitting coil are arranged in a crossed way; the 2 nd transmitting coil, the 1 st transmitting coil and the 3 rd transmitting coil are arranged in a cross way, and the 3 rd transmitting coil, the 2 nd transmitting coil and the 4 th transmitting coil are arranged in a cross way; and so on, the nth transmitting coil, the n-1 th transmitting coil and the n+1th transmitting coil are arranged in a crossed way, and n is more than or equal to 3.
Referring to fig. 3, in one embodiment, the signal processing module 300 includes: the signal extraction unit 310, the data processing unit 320 and the power signal generating unit 330, the input end of the signal extraction unit 310 is connected with the receiving coil array 200, the first input end of the data processing unit 320 is connected with the first output end of the signal extraction unit 310, the second input end of the data processing unit 320 is connected with the second output end of the signal extraction unit 310, the input end of the power signal generating unit 330 is connected with the first output end of the data processing unit 320, the output end of the power signal generating unit 330 is connected with the transmitting coil array 100, the signal extraction unit 310 is configured to extract an input signal and convert the input signal into a first signal and a second signal, and the data processing unit 320 is configured to generate an excitation signal for controlling the generation of the power signal and generate data information according to the first signal and the second signal and transmit the data information to the upper computer 400; the power signal generating unit 330 generates a power signal according to the excitation signal and transmits the power signal to the transmitting coil array 100.
The first signal may be an amplitude signal and the second signal may be an interrupt signal; the signal extraction unit 310 may be composed of a switching chip, a filter device, an amplifying device, etc.; the data processing unit 320 may be composed of a chip with functional modules such as an analog-to-digital converter, an interrupt calculator, and a pulse generator, for example, an 80C51 series single-chip microcomputer; the power signal generation unit 330 may be composed of a multi-stage amplifying circuit.
Referring to fig. 4, in one embodiment, the signal extraction unit 310 includes: the coil selection subunit 311, the signal amplification subunit 312, the filtering subunit 313, the first conversion subunit 314 and the second conversion subunit 315, the coil selection subunit 311 is connected to the receiving coil array 200 and the data processing unit 320, the input end of the signal amplification subunit 312 is connected to the output end of the coil selection subunit 311, the filtering subunit 313 is connected to the signal amplification subunit 312, the first conversion subunit 314 is connected to the filtering subunit 313, the coil selection subunit 311 is configured to gate the target coil of the receiving coil array 200 and output the input signal received by the target coil under the control of the data processing unit 320, the signal amplification subunit 312 is configured to amplify the input signal and output the amplified input signal, the filtering subunit 313 is configured to filter the high-frequency interference signal in the amplified input signal and output the target input signal, and the first conversion subunit 314 is configured to convert the target input signal into the first signal; the second conversion subunit 315 is arranged to convert the target input signal into a second signal.
It should be understood that the coil selection subunit 311 may be formed by a chip or a device that is turned on or off under a control signal, for example, a multiplexer, a multiple-select analog switch chip, or a switch tube array formed by a plurality of switch tubes, etc.; the signal amplifying subunit 312 may be composed of a multi-stage amplifying circuit composed of a plurality of amplifiers; the filtering subunit 313 may be formed by a high-pass filter and/or a low-pass filter formed by devices such as a capacitor, a resistor, an amplifier, etc., and the filtering subunit 313 may filter interference of a high-frequency power signal sent by the transmitting coil array; the first conversion subunit 314 is constituted by an integrating circuit, and the second conversion subunit may be constituted by a flip-flop or the like.
Referring to fig. 5, in one embodiment, the coil selecting subunit 311 includes a multi-one analog switch chip U1, a plurality of input terminals of the multi-one analog switch chip U1 are connected to the receiving coil array 200, a control terminal and an address terminal of the multi-one analog switch chip U1 are connected to the data processing unit 320, a common input terminal of the multi-one analog switch chip U1 is an output terminal of the coil selecting subunit 311, and the multi-one analog switch chip U1 is configured to gate a channel between the target coil and the signal amplifying subunit 312 under the control of the data processing unit 320.
The operation of one of the coil selection sub-units 311 in this embodiment may be as follows:
step one: the data processing unit 320 issues address codes to the address terminals of the one-to-many analog switch chip U1 according to a certain rule, for example, issuing the address codes in a positive order or a reverse order according to a small-to-large order, a large-to-small order, or after any address code is designated;
step two: after the input signals of the coils which are selected by one-to-one from the analog switch chips U1 are transmitted to the data processing unit 320 through the signal amplifying subunit 312, the filtering subunit 313 and the first converting subunit 314 and/or the second converting subunit 315, the data processing unit 320 compares the received input signals of the coils and confirms the target address codes of the coils corresponding to one or more input signals with the highest signal intensity;
step three: the data processing unit 320 issues a target address code to the one-to-many analog switch chip U1, and the one-to-many analog switch chip U1 re-gates the target coil according to the target address code.
It should be appreciated that step three may be eliminated.
Referring to fig. 6, in one embodiment, the first converter subunit 314 includes: the first diode D1, the first resistor R1, the second resistor R2, the third resistor R3, the first capacitor C1, the first switching tube Q1 and the first amplifier U2, the positive pole of the first diode D1 is connected with a target input signal, the negative pole of the first diode D1 is connected with the first end of the first resistor R1, the second end of the first resistor R1 is connected with the first input end of the first amplifier U2, the first end of the first capacitor C1 and the source electrode of the first switching tube Q1, the second input end of the first amplifier U2 is grounded through the second resistor R2, the control end of the first switching tube Q1 is connected with the data processing unit 320, the drain electrode of the first switching tube Q1 is connected with the second end of the first capacitor C1, the output end of the first amplifier U2 and the first end of the third resistor R3, and the second end of the third resistor R3 is the output end of the first switching unit 314.
It should be understood that in the present embodiment, the first input terminal of the first amplifier U2 is the negative phase input terminal of the first amplifier U2, and the second input terminal of the first amplifier U2 is the positive phase input terminal of the first amplifier U2, and in other embodiments, other types of amplifiers may be used.
In the first converter 314 of this embodiment, by adding the first resistor R1, the second resistor R2, the third resistor R3, the first capacitor C1, the first switching tube Q1, and the first amplifier U2 to form an integrating circuit, the input target input signal is filtered out after passing through the first diode D1, and only the positive half-axis signal is left behind and is transmitted to the integrating circuit, and the data processing unit 320 controls the timing of the integrating circuit by controlling the on-off of the first switching tube Q1, so as to obtain the integrated amplitude of the target input signal input by each coil, and it should be understood that the first signal obtained by conversion in this embodiment is the integrated amplitude of the target input signal input by each coil.
Referring to fig. 7, in one embodiment, the second conversion subunit 315 includes: the second amplifier U3, the Schmitt trigger J1, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6, wherein the first end of the fourth resistor R4 is connected with a target input signal, the second end of the fourth resistor R4 is connected with the second input end of the second amplifier U3, the first input end of the second amplifier U3 is connected with the first end of the fifth resistor R5 and the first end of the sixth resistor R6, the second end of the fifth resistor R5 is grounded, the second end of the sixth resistor R6 and the output end of the second amplifier U3 are connected with the input end of the Schmitt trigger J1, and the output end of the Schmitt trigger J1 is the output end of the second conversion subunit 315.
It should be understood that in the present embodiment, the first input terminal of the second amplifier U3 is the negative phase input terminal of the second amplifier U3, and the second input terminal of the second amplifier U3 is the positive phase input terminal of the second amplifier U3, and in other embodiments, other types of amplifiers may be used.
The second converting subunit 315 in this embodiment converts the target input signal into a second signal by adding the schmitt trigger J1, and it should be understood that the second signal generated by passing through the schmitt trigger J1 is an interrupt square wave signal or an interrupt square wave signal; and the target input signal is amplified and then input to the schmitt trigger J1 by adding the second amplifier U3, so that the schmitt trigger J1 can be triggered by the input signal received by any coil, and it is understood that in order to ensure that the schmitt trigger J1 can be triggered by the input signal received by any coil, an amplifier and a filter can be added as required to complete multi-stage filtering and multi-stage amplification.
In one embodiment, the power signal generating unit 330 includes a third amplifier, a control terminal of the third amplifier is connected to the data processing unit 320, an input terminal of the third amplifier is connected to the data processing unit 320, and an output terminal of the third amplifier is connected to the transmitting coil array 100.
It should be appreciated that the output of one third amplifier may be connected to each transmit coil in the transmit coil array 100; the amplifier circuit may be formed by a plurality of third amplifiers, and the output ends of the third amplifiers are connected with the transmitting coils in the transmitting coil array 100 one by one; a third amplifier comprising an amplifier chip having a plurality of outputs may also be used, the plurality of outputs of the third amplifier being connected one-to-one with each transmit coil in the transmit coil array 100.
A second aspect of the embodiments of the present invention provides a dual-coil antenna board, including a dual-coil antenna board control circuit as described above.
For ease of understanding, one working procedure of the dual coil antenna panel of the present invention is briefly described as follows:
step one: the data processing unit 320 transmits the excitation signal to the power signal generating unit 330; wherein the excitation signal may be a high frequency pulse signal.
Step two: the power signal generating unit 330 amplifies the excitation signal into a power signal of the same frequency and transmits the power signal outward through the transmitting coil array 100;
it should be understood that when the dual-coil antenna board and the electromagnetic pen are matched with each other, the receiving end of the power signal is the electromagnetic pen, and when the electromagnetic pen approaches the transmitting coil array 100, the internal circuit of the electromagnetic pen receives the transmitting power signal and resonates with the transmitting coil array 100, so that the power signal is converted into an electrical signal, and power supply to the internal circuit of the electromagnetic pen is realized.
Step three: after the receiving coil array 200 receives the input signal, the data processing unit 320 gates the receiving coils of each receiving coil group of the receiving coil array 200 one by one through the coil selecting subunit 311.
It should be appreciated that data processing unit 320 may gate the individual coils by issuing address codes to coil selection subunit 311 according to a certain rule, such as in a small to large order, a large to small order, or a positive or reverse order after designating any one address code, etc.
Step four: input signals of receiving coils of each receiving coil group in the receiving coil array 200 pass through the coil selection subunit 311, the signal amplification subunit 312 and the filtering subunit 313 one by one to obtain each corresponding target input signal;
it should be appreciated that the input signal may be a low frequency sine wave signal that the electromagnetic pen emits to the dual coil antenna plate after being powered.
Step five: each target input signal is converted into a first signal through the first conversion subunit 314 one by one and is input into the data processing unit 320, and the data processing unit 320 selects a target receiving coil of each receiving coil group according to the received first signal input by each coil and converts the target receiving coil into first data information;
it should be appreciated that the data processing unit 320 may select the target receiving coil of each receiving coil group according to the received first signal input by each coil as: the data processing unit 320 determines to select the target receiving coil of each receiving coil group based on comparing the signal strengths of the respective first signals input from the target receiving coils of each receiving coil group, for example, if the sender of the input signal is an electromagnetic pen, the closer the electromagnetic pen is to a certain coil, the stronger the input signal received by the certain coil is, and the stronger the converted first signal is.
It is understood that the first data information may be physical coordinate information.
Step six: each target input signal is converted into a second signal through the second conversion subunit 315 one by one and is input to the data processing unit 320, and the data processing unit 320 converts the second signal into second data information;
it should be understood that the second signal may be an interrupt signal, the second data information may be frequency information, pressure sensing information, etc., for example, if the sender of the input signal is an electromagnetic pen, the oscillation frequency of the electromagnetic pen is proportional to the pressure variation, the frequency variation of the input signal is proportional to the pressure variation, the data processing unit 320 may convert the received second signal into frequency information, and then convert the pressure information according to the frequency information, or input the frequency information into the upper computer 400 to convert the pressure information by the upper computer 400.
Step seven: the data processing unit 320 integrates and transmits the first data information and the second data information to the host computer 400.
It should be appreciated that the data processing unit 320 may transmit the first data information and the second data information to the host computer 400 through a serial interface such as a USB interface or bluetooth and/or WIFI or the like.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (8)
1. A dual coil antenna panel control circuit, comprising:
a transmit coil array configured to transmit power signals externally;
a receive coil array, the receive coil array and the transmit coil array being disposed overlapping the same surface area of the dual-coil antenna plate, the receive coil array being configured to receive an input signal; and
the input end of the signal processing module is connected with the receiving coil array, the first output end of the signal processing module is connected with the transmitting coil array, the second output end of the signal processing module is connected with an upper computer, and the signal processing module is used for extracting the input signal and converting the input signal into data information to be transmitted to the upper computer, generating the power signal and transmitting the power signal to the transmitting coil array;
the signal processing module includes:
the input end of the signal extraction unit is connected with the receiving coil array, and the signal extraction unit is used for extracting the input signal and converting the input signal into a first signal and a second signal;
the first input end of the data processing unit is connected with the first output end of the signal extraction unit, the second input end of the data processing unit is connected with the second output end of the signal extraction unit, and the data processing unit is used for generating an excitation signal used for controlling the generation of the power signal and generating the data information according to the first signal and the second signal and transmitting the data information to the upper computer; and
the input end of the power signal generating unit is connected with the first output end of the data processing unit, the output end of the power signal generating unit is connected with the transmitting coil array, and the power signal generating unit generates the power signal according to the excitation signal and transmits the power signal to the transmitting coil array;
the signal extraction unit includes:
a coil selection subunit, connected to the receiving coil array and the data processing unit, configured to gate a target coil of the receiving coil array and output an input signal received by the target coil under control of the data processing unit;
the input end of the signal amplification subunit is connected with the output end of the coil selection subunit, and the signal amplification subunit is used for amplifying the input signal and outputting an amplified input signal;
the filtering subunit is connected with the signal amplifying subunit and is used for filtering high-frequency interference signals in the amplified input signals and outputting target input signals;
a first conversion subunit connected to the filtering subunit, the first conversion subunit being configured to convert the target input signal into a first signal; and
a second conversion subunit configured to convert the target input signal into a second signal;
the first converter subunit includes: the device comprises a first diode, a first resistor, a second resistor, a third resistor, a first capacitor, a first switch tube and a first amplifier, wherein the positive electrode of the first diode is connected with the target input signal, the negative electrode of the first diode is connected with the first end of the first resistor, the second end of the first resistor is connected with the first input end of the first amplifier, the first end of the first capacitor and the source electrode of the first switch tube, the second input end of the first amplifier is grounded through the second resistor, the control end of the first switch tube is connected with the data processing unit, the drain electrode of the first switch tube is connected with the second end of the first capacitor, the output end of the first amplifier and the first end of the third resistor, and the second end of the third resistor is the output end of the first conversion subunit;
the second conversion subunit includes: the output end of the Schmitt trigger is the output end of the second conversion subunit.
2. The dual coil antenna panel control circuit of claim 1 wherein the receiver coil array comprises at least one receiver coil assembly disposed in a first direction and at least one receiver coil assembly disposed in a second direction different from the first direction, each receiver coil assembly disposed in the first direction being interdigitated with a respective receiver coil assembly disposed in the second direction.
3. The dual coil antenna panel control circuit of claim 2 wherein each receive coil assembly includes more than seven receive coils disposed side by side, adjacent ones of said receive coils in the assembly intersecting one another.
4. The dual-coil antenna panel control circuit of claim 3, wherein in each of the receiver coil groups, an mth receiver coil and an mth-2 receiver coil, an mth-1 receiver coil, an mth +1th receiver coil, and an mth +2th receiver coil intersect, and m is equal to or greater than 3.
5. The dual coil antenna board control circuit of any of claims 2 to 4, wherein the transmit coil array comprises two or more transmit coils disposed side by side in a third direction, and adjacent ones of the transmit coils are interdigitated.
6. The dual coil antenna board control circuit of claim 1, wherein the coil selection subunit comprises a multi-choice analog switch chip, a plurality of input taps of the multi-choice analog switch chip are connected with the receiving coil array, a control terminal and an address terminal of the multi-choice analog switch chip are connected with the data processing unit, a common input terminal of the multi-choice analog switch chip is an output terminal of the coil selection subunit, and the multi-choice analog switch chip is configured to gate channels of the target coil and the signal amplification subunit under control of the data processing unit.
7. The dual coil antenna panel control circuit of claim 1 wherein the power signal generation unit comprises a third amplifier, a control terminal of the third amplifier being coupled to the data processing unit, an input terminal of the third amplifier being coupled to the data processing unit, an output terminal of the third amplifier being coupled to the transmit coil array.
8. A dual coil antenna panel comprising a dual coil antenna panel control circuit as claimed in any one of claims 1 to 7.
Priority Applications (2)
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| CN201910424709.7A CN110212651B (en) | 2019-05-21 | 2019-05-21 | Dual-coil antenna board and control circuit thereof |
| PCT/CN2019/097303 WO2020232822A1 (en) | 2019-05-21 | 2019-07-23 | Dual-coil antenna board and control circuit thereof |
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| CN201910424709.7A CN110212651B (en) | 2019-05-21 | 2019-05-21 | Dual-coil antenna board and control circuit thereof |
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| CN110212651B true CN110212651B (en) | 2024-04-05 |
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| CN114649681A (en) * | 2022-04-12 | 2022-06-21 | 李明星 | Independent double-coil wireless passive electromagnetic antenna board wiring system and working method thereof |
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| CN110212651A (en) | 2019-09-06 |
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