CN110112154B - Semiconductor substrate structure and manufacturing method thereof - Google Patents
Semiconductor substrate structure and manufacturing method thereof Download PDFInfo
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- CN110112154B CN110112154B CN201910307679.1A CN201910307679A CN110112154B CN 110112154 B CN110112154 B CN 110112154B CN 201910307679 A CN201910307679 A CN 201910307679A CN 110112154 B CN110112154 B CN 110112154B
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- 239000000758 substrate Substances 0.000 title claims abstract description 94
- 239000004065 semiconductor Substances 0.000 title claims abstract description 73
- 238000004519 manufacturing process Methods 0.000 title abstract description 16
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 88
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 88
- 239000010409 thin film Substances 0.000 claims abstract description 87
- 238000000034 method Methods 0.000 claims abstract description 17
- 230000005641 tunneling Effects 0.000 claims description 62
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 22
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 22
- 238000002161 passivation Methods 0.000 claims description 19
- 229910004205 SiNX Inorganic materials 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 15
- 230000004888 barrier function Effects 0.000 claims description 9
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 8
- 229910052750 molybdenum Inorganic materials 0.000 claims description 8
- 239000011733 molybdenum Substances 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 4
- 229910052593 corundum Inorganic materials 0.000 claims description 4
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 4
- 238000002360 preparation method Methods 0.000 claims 1
- 238000001514 detection method Methods 0.000 abstract description 11
- 230000003287 optical effect Effects 0.000 abstract description 11
- 230000000903 blocking effect Effects 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 230000008569 process Effects 0.000 description 10
- 239000010408 film Substances 0.000 description 8
- 238000003475 lamination Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 238000012544 monitoring process Methods 0.000 description 4
- 229910016027 MoTi Inorganic materials 0.000 description 3
- 230000004075 alteration Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
- H10F39/014—Manufacture or treatment of image sensors covered by group H10F39/12 of CMOS image sensors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/803—Pixels having integrated switching, control, storage or amplification elements
- H10F39/8037—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
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- Thin Film Transistor (AREA)
Abstract
本揭示提供了半导体基板结构及其制作方法。所述半导体基板结构包括基板、金属氧化物薄膜晶体管以及隧穿二极管。所述金属氧化物薄膜晶体管设置在所述基板上。所述隧穿二极管设置在所述基板上和所述金属氧化物薄膜晶体管旁。本揭示的半导体基板结构具有光学侦测性能。
The present disclosure provides semiconductor substrate structures and fabrication methods thereof. The semiconductor substrate structure includes a substrate, a metal oxide thin film transistor and a tunnel diode. The metal oxide thin film transistor is disposed on the substrate. The tunnel diode is disposed on the substrate and beside the metal oxide thin film transistor. The semiconductor substrate structure of the present disclosure has optical detection performance.
Description
[ technical field ] A method for producing a semiconductor device
The present disclosure relates to the field of display technologies, and in particular, to a semiconductor substrate structure and a method for fabricating the same.
[ background of the invention ]
The semiconductor substrate structures of existing displays (e.g., cell phones and televisions) do not have inductors. The sensor is independently arranged at a position outside the semiconductor substrate structure, so that fixed-point sensing cannot be performed on the semiconductor substrate structure, and the performance of mobile phone fingerprint identification and/or ambient light monitoring and remote control of a television is poor.
Therefore, it is desirable to provide a semiconductor substrate structure and a method for fabricating the same to solve the problems of the prior art.
[ summary of the invention ]
In order to solve the above technical problems, an object of the present disclosure is to provide a semiconductor substrate structure having optical detection performance and a method for fabricating the same.
To achieve the above objective, the present disclosure provides a semiconductor substrate structure. The semiconductor substrate structure comprises a substrate, a metal oxide thin film transistor and a tunneling diode. The metal oxide thin film transistor is disposed on the substrate. The tunneling diode is arranged on the substrate and beside the metal oxide thin film transistor.
In one embodiment of the present disclosure, the gate of the metal oxide thin film transistor and the anode of the tunneling diode are disposed on the same layer on the substrate.
In an embodiment of the present disclosure, the gate of the metal oxide thin film transistor and the anode of the tunneling diode are made of the same material, and both the gate of the metal oxide thin film transistor and the anode of the tunneling diode are a molybdenum/copper stack or a molybdenum/aluminum stack.
In one embodiment of the present disclosure, the semiconductor substrate structure further includes a gate insulating layer disposed on the substrate, the gate of the metal oxide thin film transistor, and the anode of the tunneling diode.
In one embodiment of the present disclosure, the gate insulating layer is a SiOx layer, a SiOx/SiNx stack, a SiNx/SiOx stack, SiOx, a mutual stack of SiNx and SiNO, a stack of SiOx, SiNx and Al2O3, or an AlN layer.
In an embodiment of the present disclosure, the metal oxide thin film transistor further includes a stacked active layer channel, a first blocking layer, and a source drain electrode, the tunneling diode further includes a stacked semiconductor layer, a second blocking layer, and a cathode, the gate insulating layer includes an opening, and the semiconductor layer and the second blocking layer of the tunneling diode are disposed in the opening of the gate insulating layer.
In an embodiment of the present disclosure, the semiconductor substrate structure further includes a passivation layer and a pixel electrode layer stacked on the source and drain electrodes and the cathode, the passivation layer includes an opening, and the pixel electrode layer contacts the source and drain electrodes through the opening of the passivation layer.
The disclosure also provides a method for fabricating a semiconductor substrate structure. The manufacturing method of the semiconductor substrate structure comprises the steps of providing a substrate, forming a metal oxide thin film transistor on the substrate, and forming a tunneling diode on the substrate and beside the metal oxide thin film transistor.
In one embodiment of the present disclosure, the gate of the metal oxide thin film transistor and the anode of the tunneling diode are formed on the same layer on the substrate.
In an embodiment of the present disclosure, a gate insulating layer is formed on the substrate, the gate of the metal oxide thin film transistor, and the anode of the tunneling diode, an active layer channel, a first blocking layer, and a source drain electrode of the metal oxide thin film transistor are formed on the gate insulating layer in a stacked manner, a semiconductor layer, a second blocking layer, and a cathode of the tunneling diode are formed on the gate insulating layer in a stacked manner, the gate insulating layer includes an opening, and the semiconductor layer and the second blocking layer of the tunneling diode are disposed in the opening of the gate insulating layer.
In the semiconductor substrate structure and the manufacturing method thereof in the embodiments of the present disclosure, the semiconductor substrate structure includes a substrate, a metal oxide thin film transistor, and a tunneling diode. The metal oxide thin film transistor is disposed on the substrate. The tunneling diode is arranged on the substrate and beside the metal oxide thin film transistor, so that the semiconductor substrate structure has optical detection performance.
In order to make the aforementioned and other aspects of the present disclosure more comprehensible, preferred embodiments accompanied with figures are described in detail below:
[ description of the drawings ]
FIG. 1 shows a schematic structural diagram of a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 2 is a schematic circuit diagram of a semiconductor substrate structure according to an embodiment of the disclosure;
FIG. 3 shows a flow chart of a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 4 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 5 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 6 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 7 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 8 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 9 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure;
FIG. 10 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure; and
FIG. 11 illustrates a method of fabricating a semiconductor substrate structure according to an embodiment of the present disclosure.
[ detailed description ] embodiments
In order to make the aforementioned and other objects, features and advantages of the present disclosure comprehensible, preferred embodiments accompanied with figures are described in detail below. Furthermore, directional phrases used in this disclosure, such as, for example, upper, lower, top, bottom, front, rear, left, right, inner, outer, lateral, peripheral, central, horizontal, lateral, vertical, longitudinal, axial, radial, uppermost or lowermost, etc., refer only to the orientation of the attached drawings. Accordingly, the directional terms used are used for the purpose of illustration and understanding of the present disclosure, and are not used to limit the present disclosure.
In the drawings, elements having similar structures are denoted by the same reference numerals.
Referring to fig. 1 and 2, one embodiment of the present disclosure provides a semiconductor substrate structure 100. The semiconductor substrate structure 100 includes a substrate 110, a metal oxide thin film transistor 120, and a tunnel diode (tunnel diode) 130. The metal oxide thin film transistor 120 is disposed on the substrate 110. The tunneling diode 130 is disposed on the substrate 110 and beside the metal oxide thin film transistor 120.
In one embodiment of the present disclosure, the gate 122 of the metal oxide thin film transistor 120 and the anode 132 of the tunneling diode 130 are disposed on the same layer on the substrate 110. The gate 122 of the metal oxide thin film transistor 120 and the anode 132 of the tunneling diode 130 are made of the same material, and both the gate 122 of the metal oxide thin film transistor 120 and the anode 132 of the tunneling diode 130 are molybdenum/copper lamination or molybdenum/aluminum lamination.
In one embodiment of the present disclosure, the semiconductor substrate structure 100 further includes a gate insulating layer 140, and the gate insulating layer 140 is disposed on the substrate 110, the gate 122 of the metal oxide thin film transistor 120, and the anode 132 of the tunneling diode 130. The gate insulating layer 140 is a SiOx layer, a SiOx/SiNx stacked layer, a SiNx/SiOx stacked layer, a mutual stacked layer of SiOx, SiNx and SiNO, a stacked layer of SiOx, SiNx and Al2O3, or an AlN layer.
In one embodiment of the present disclosure, the metal oxide thin film transistor 120 further includes a stacked active layer channel 124, a first blocking layer 126, and a source/drain electrode 128. The tunneling diode 130 further includes a stacked semiconductor layer 134, a second barrier layer 136, and a cathode 138. The gate insulating layer 140 includes an opening 142, and the semiconductor layer 134 and the second blocking layer 136 of the tunneling diode 130 are disposed in the opening 142 of the gate insulating layer 140. The height of the opening 142 ranges between 5nm and 50 nm.
Specifically, the material of the active layer channel 124 of the metal oxide thin film transistor 120 and the material of the semiconductor layer 134 of the tunneling diode 130 are the same, and the material of the active layer channel 124 of the metal oxide thin film transistor 120 and the material of the semiconductor layer 134 of the tunneling diode 130 include IGZO or IZO.
In one embodiment of the present disclosure, the semiconductor substrate structure 100 further includes a passivation layer 150 and a pixel electrode layer 160 stacked one on another. The passivation layer 150 is disposed on the source and drain electrodes 128 and the cathode 138. The passivation layer 150 includes an opening 152, and the pixel electrode layer 160 contacts the source and drain electrodes 128 through the opening 152 of the passivation layer 150. The material of the passivation layer 150 includes SiNx, SiOx, or SiNO.
Referring to fig. 2, in an embodiment of the disclosure, the metal oxide thin film transistor 120 is connected to the tunneling diode 130, and the metal oxide thin film transistor 120 and the tunneling diode 130 form a logic circuit, which can be used for fingerprint recognition of an in-cell (in-cell) touch panel, brightness adjustment of ambient light, or detection of optical changes.
Specifically, one end of the metal oxide thin film transistor 120 is used for receiving a power supply end V of the deviceDDOne end of the tunneling diode 130 is used for receiving a low potential VssThe gate 122 of the metal oxide thin film transistor 120 is used for receiving an input potential ViOne end of the metal oxide thin film transistor 120 and one end of the tunneling diode 130 are connected to each other for outputting a potential Vo。
In an embodiment of the present disclosure, the semiconductor substrate structure 100 integrates the metal oxide thin film transistor 120 and the tunneling diode 130, and the tunneling diode 130 is fabricated on the substrate 110 together with the metal oxide thin film transistor 120 by a process compatible with the metal oxide thin film transistor 120. The tunneling diode 130 is used for optical detection or combined with the metal oxide thin film transistor 120 to form a logic circuit, for example, the logic circuit can be used for fingerprint recognition of an in-cell (in-cell) touch panel, brightness adjustment of ambient light, or detection of optical change.
The tunneling diode 130 can be applied to In-plane sensor (In cell sensor) and fingerprint recognition of mobile display devices In optical detection, or can be applied to large display panels, such as televisions, for monitoring ambient light changes and automatically adjusting display brightness In different areas. The process of the tunneling diode 130 is compatible with the process of the metal oxide thin film transistor 120, and no additional process is required.
Referring to fig. 3, a method 300 for fabricating a semiconductor substrate structure is provided in accordance with an embodiment of the present disclosure and includes the following steps.
Referring to fig. 4, in an embodiment of the present disclosure, the gate 122 of the metal oxide thin film transistor 120 and the anode 132 of the tunneling diode 130 are formed on the same layer on the substrate 110. The gate 122 of the metal oxide thin film transistor 120 and the anode 132 of the tunneling diode 130 are made of the same material, and both the gate 122 of the metal oxide thin film transistor 120 and the anode 132 of the tunneling diode 130 are molybdenum/copper lamination or molybdenum/aluminum lamination.
Referring to fig. 5, in an embodiment of the present disclosure, a gate insulating layer 140 is formed on the substrate 110, the gate 122 of the metal oxide thin film transistor 120, and the anode 132 of the tunneling diode 130. The gate insulating layer 140 is a SiOx layer, a SiOx/SiNx stacked layer, a SiNx/SiOx stacked layer, a mutual stacked layer of SiOx, SiNx and SiNO, a stacked layer of SiOx, SiNx and Al2O3, or an AlN layer.
Referring to fig. 6, in an embodiment of the present disclosure, the gate insulating layer 140 above the anode 132 corresponding to the tunneling diode 130 is partially etched to form an opening 142, and a thickness of the gate insulating layer 140 remaining after etching ranges between 5nm and 50 nm. I.e. the height of the openings 142 ranges between 5nm and 50 nm.
Referring to fig. 7 to 9, in an embodiment of the present disclosure, the active layer channel 124, the first blocking layer 126 and the source/drain electrode 128 of the metal oxide thin film transistor 120 are formed on the gate insulating layer 140, the semiconductor layer 134, the second blocking layer 136 and the cathode 138 of the tunneling diode 130 are formed on the gate insulating layer 140, and the semiconductor layer 134 and the second blocking layer 136 of the tunneling diode 130 are disposed in the opening 142 of the gate insulating layer 140.
Specifically, referring to fig. 7, a semiconductor metal oxide such as IGZO or IZO is deposited on the gate insulating layer 140 and etched to form the active layer channel 124 of the metal oxide thin film transistor 120 and the semiconductor layer 134 of the tunneling diode 130. The material of the active layer channel 124 of the metal oxide thin film transistor 120 and the material of the semiconductor layer 134 of the tunneling diode 130 are the same, and the material of the active layer channel 124 of the metal oxide thin film transistor 120 and the material of the semiconductor layer 134 of the tunneling diode 130 include IGZO or IZO.
Specifically, referring to fig. 8, a metal layer 180 and a blocking layer 190 are deposited on the active layer channel 124 of the metal oxide thin film transistor 120 and the semiconductor layer 134 of the tunneling diode 130. The metal layer 180 and the barrier layer 190 may constitute an electrode layer. The material of the metal layer 180 may include copper, aluminum or cobalt, and the barrier layer 190 may be a MoTi metal film layer, a Ti metal film layer or an oxide film layer. The thickness range of the MoTi metal film layer or the Ti metal film layer is between 10nm and 30 nm. The thickness of the oxide film layer is larger than that of the MoTi metal film layer or the Ti metal film layer.
Specifically, referring to fig. 8 to 9, the metal layer 180 and the blocking layer 190 are patterned by a yellow light process of a multi-gray mask and two etching processes to form the first blocking layer 126 and the source/drain electrode 128 of the metal oxide thin film transistor 120, and the second blocking layer 136 and the cathode 138 of the tunneling diode 130, which are stacked.
Referring to fig. 10 to 11, in an embodiment of the present disclosure, a passivation layer 150 and a pixel electrode layer 160 are formed on the source and drain electrodes 128 and the cathode electrode 138. The passivation layer 150 includes an opening 152, and the pixel electrode layer 160 contacts the source and drain electrodes 128 through the opening 152 of the passivation layer 150.
Specifically, referring to fig. 10, the passivation layer 150 is deposited on the source and drain electrodes 128 and the cathode 138. The material of the passivation layer 150 includes SiNx, SiOx, or SiNO. The opening 152 is formed on the passivation layer 150.
Specifically, referring to fig. 11, the pixel electrode layer 160 is deposited on the passivation layer 150 and the pixel electrode layer 160 is patterned.
In an embodiment of the present disclosure, the semiconductor substrate structure 100 integrates the metal oxide thin film transistor 120 and the tunneling diode 130, and the tunneling diode 130 is fabricated on the substrate 110 together with the metal oxide thin film transistor 120 by a process compatible with the metal oxide thin film transistor 120. The tunneling diode 130 is used for optical detection or combined with the metal oxide thin film transistor 120 to form a logic circuit, for example, the logic circuit can be used for fingerprint recognition of an in-cell (in-cell) touch panel, brightness adjustment of ambient light, or detection of optical change.
The tunneling diode 130 can be applied to In-plane sensor (In cell sensor) and fingerprint recognition of mobile display devices In optical detection, or can be applied to large display panels, such as televisions, for monitoring ambient light changes and automatically adjusting display brightness In different areas. The process of the tunneling diode 130 is compatible with the process of the metal oxide thin film transistor 120, and no additional process is required.
In the semiconductor substrate structure and the manufacturing method thereof in the embodiments of the present disclosure, the semiconductor substrate structure includes a substrate, a metal oxide thin film transistor, and a tunneling diode. The metal oxide thin film transistor is disposed on the substrate. The tunneling diode is arranged on the substrate and beside the metal oxide thin film transistor, so that the semiconductor substrate structure has optical detection performance.
The semiconductor substrate structure in the embodiments of the present disclosure has an inductor (i.e., a tunneling diode), so that the semiconductor substrate structure can sense a fixed point on the semiconductor substrate structure, and thus can be applied to displays (e.g., mobile phones and televisions) and improve the performance of mobile phone fingerprint identification and/or ambient light monitoring and remote control of televisions.
Although the disclosure has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. The present disclosure includes all such modifications and alterations, and is limited only by the scope of the appended claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification. In addition, while a particular feature of the specification may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for a given or particular application. Furthermore, to the extent that the terms "includes," has, "" contains, "or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term" comprising.
The foregoing is merely a preferred embodiment of the present disclosure, and it should be noted that modifications and refinements may be made by those skilled in the art without departing from the principle of the present disclosure, and these modifications and refinements should also be construed as the protection scope of the present disclosure.
Claims (8)
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| CN201910307679.1A CN110112154B (en) | 2019-04-17 | 2019-04-17 | Semiconductor substrate structure and manufacturing method thereof |
| PCT/CN2019/088314 WO2020211159A1 (en) | 2019-04-17 | 2019-05-24 | Semiconductor substrate structure and manufacturing method therefor |
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| CN201910307679.1A CN110112154B (en) | 2019-04-17 | 2019-04-17 | Semiconductor substrate structure and manufacturing method thereof |
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