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CN110096267A - DSP code automatic generation method and device - Google Patents

DSP code automatic generation method and device Download PDF

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Publication number
CN110096267A
CN110096267A CN201910398779.XA CN201910398779A CN110096267A CN 110096267 A CN110096267 A CN 110096267A CN 201910398779 A CN201910398779 A CN 201910398779A CN 110096267 A CN110096267 A CN 110096267A
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China
Prior art keywords
code
dsp
generation method
automatic generation
matlab
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CN201910398779.XA
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Chinese (zh)
Inventor
轩石磊
陆乐
谢勇
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Shenzhen Xingzhi Network Technology Co Ltd
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Shenzhen Xingzhi Network Technology Co Ltd
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Priority to CN201910398779.XA priority Critical patent/CN110096267A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
    • G06F8/31Programming languages or programming paradigms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
    • G06F8/35Creation or generation of source code model driven
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/41Compilation
    • G06F8/44Encoding
    • G06F8/447Target code generation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Stored Programmes (AREA)

Abstract

The invention discloses DSP code automatic generation method and device, steps are as follows: builds model under Matlab platform according to the mentality of designing of system first;Secondly algorithm is emulated in Simulink;The project file code towards TI editing machine is generated by the Real Time Workshop that Matlab is provided;And the further compiling of completion code, link generate DSP executable machine code;It finally downloads on target dsp board and runs, complete the exploitation of system.Automatically generating for code can replace manual compiling program under Matlab platform, and not only workers free from uninteresting programming for this, but also also simplify exploitation complexity, has saved the time, has improved accuracy rate.

Description

DSP code automatic generation method and device
Technical field
The technology of the present invention is related to field of computer technology, and in particular to a kind of DSP code automatic generation method and device.
Background technique
Traditional DSP source code exploitation generallys use two methods: source code is write using assembly instruction one is direct, Then target executable code is generated after being linked by assembler and connector;Another method is to utilize standard C/C++ language Speech writes source code.Compiled device, assembler and connector are compiled link, ultimately produce object code.Both methods Require that developer will devote a tremendous amount of time the correct setting and the programming of software for grasping the various registers inside DSP Method, the development cycle is long, delays the Time To Market of product.
Summary of the invention
The technical problem to be solved is that provide a kind of DSP code automatic generation method and device for the technology of the present invention.
The following technical solution is employed for the technical problems to be solved by the invention to realize:
DSP code automatic generation method, step are as follows:
1) model is built under Matlab platform according to the mentality of designing of system first;
2) secondly algorithm is emulated in Simulink;
3) the project file code towards TI editing machine is generated by the Real Time Workshop that Matlab is provided;
4) and the further compiling of completion code, link generate DSP executable machine code;
5) it finally downloads on target dsp board and runs, complete the exploitation of system.
The invention has the benefit that
Automatically generating for code can replace manual compiling program under Matlab platform, this not only workers from uninteresting Programming in free, and also simplify exploitation complexity, saved the time, improved accuracy rate.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing;
Fig. 1 is the design flow diagram based on Code automatic build under Matlab platform;
Fig. 2 is the minimum system schematic diagram based on TMS320F2812;
Fig. 3 is Code automatic build design diagram, and wherein Fig. 3 A is Simulink Simulation Interface figure;Fig. 3 B is new modeling Type figure;Fig. 3 C is RTW label figure;Fig. 3 D is new construction project figure;Fig. 3 E is to add file map in engineering;Fig. 3 F is engineering tune Attempt;Fig. 3 G is that operation result checks figure one;Fig. 3 H is that operation result checks figure two;Fig. 3 I is system module structure chart.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention, Technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is the present invention one Divide embodiment, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art are not making Every other embodiment obtained, shall fall within the protection scope of the present invention under the premise of creative work.
Such as Fig. 1, DSP code automatic generation method, step are as follows:
Model is built under Matlab platform according to the mentality of designing of system first;
Secondly algorithm is emulated in Simulink;
The project file code towards TI editing machine is generated by the Real Time Workshop that Matlab is provided;
And the further compiling of completion code, link generate DSP executable machine code;
It finally downloads on target dsp board and runs, complete the exploitation of system.
Specifically: step 1: design and algorithm mentality of designing;
Step 2: model (.mdl) is built under Matlab platform according to the mentality of designing of system;
(1) it is as shown in Figure 3A into Simulation Interface that " simulink " is inputted in MATLAB command window
(2) File → Modle is opened, creates a model, as shown in Figure 3B
(3) model that element building in library needs in Simulink is utilized;
Step 3: being emulated in Simulink for algorithm;
(1) to the model emulation built, result is observed;
(2) parameter can be modified after encountering problems in simulations repeatedly;
Step 4: generating the project file code towards CCS by the Real Time Workshop that Matlab is provided (.prj);
(1) Simulation parameters is selected in the Simulation menu of model, is then looked in dialog box RTW Shipping Options Page, shown in following Fig. 3 C
(3) Code Generation is found in label then on the right, single machine generates code file;
Step 5: in CCS further completion code compiling, link generate DSP executable machine code (.out);
Using CCS Integrated Development Environment, user can complete engineering definition, program editing, volume under an exploitation environment Translate the working links such as link, debugging and data analysis.
(1): creation engineering (project) file
Project → New is selected, the engineering project name that will be created, such as project are keyed in " Project " text box Entitled " test1 ".As shown in Figure 3D
(2): file is added into engineering
Select Project → Add Files to Project, by test1.asm file be automatically added to Project → In Source.Test1.cmd file is added in corresponding catalogue with same method.Shown in following Fig. 3 E
(3): building engineering
After the completion of Document Editing needed for engineering, it can be compiled link to the engineering, generate executable file, for debugging It prepares.Project → Build is selected, after system prompt does not have error message, one executable file of system automatically generated, Sine.out file.As illustrated in Figure 3 F
(4): being loaded into executable file
File → Load Program is selected to be loaded into the good executable file sine.out of compiling link.
(5): operation program
Debug → Run operation is selected, it can be by the methods of checking memory table or seeing image, it is seen that the knot of program operation Fruit.As shown in figures 3 g and 3h
It is run step 6: downloading on target dsp board, completes the exploitation of system.
A PID model is built in Matlab, is then generated the executable project file of DSP by RTW, is further led to Compiling, link are crossed, executable file is generated, finally observation obtains waveform;It, can be with by manual compiling in addition, under DSP platform The raw program of sine wave is generated, further compiling, debugging, can also obtain waveform, two waveforms is finally allowed to be tracked, if two A waveform is roughly the same, then just illustrates that DSP code automatically generates under Matlab platform method is that correctly, the method can be with It is write instead of complicated cumbersome manual program.
The design of PID control in Simulink
In analog control system, most common control law is PID control in controller.PID controller is a kind of line Property controller, it constitutes control deviation according to given value and real output value.The form that PID control rule is write as transmission function is
In formula, KPFor proportionality coefficient;KiFor integral coefficient;KdFor differential coefficient;For integration time constant;For derivative time constant;In simple terms, the effect of each correction link of PID control is as follows:
(1) proportional component: proportionally reflecting the deviation signal of control system, once generating, controller produces deviation immediately Raw control action, to reduce deviation.
(2) integral element: be mainly used for eliminate static difference, improve system without margin.The power of integral action depends on product Divide time constant Ti, TiBigger, integral action is weaker, on the contrary then stronger.
(3) differentiation element: reflect the variation tendency (rate of change) of deviation signal, and it can be become too big in deviation signal Before, an effective early stage revise signal is introduced in systems, to accelerate the movement speed of system, reduces regulating time.
Design procedure is as follows:
Step 1: inputting " simulink " in MATLAB command window enters Simulation Interface.
Step 2: building PID controller:
(1) Simulink model window (selection " File/New/Model ") is created, in Simulink Library The module of needs is dragged in newly-built window in Browser, is constructed according to the transmission function of PID controller such as Fig. 3 I system System model structure:
Each module is as follows:
Gain module in the module library Math Operations, it is gain.After being dragged in model window, module is double-clicked, In the dialog box of pop-up ' Gain ' is changed to ' Kp ', ' Ki ', ' Kd ' respectively, indicates these three gain coefficients.
Integrator module in the module library Continuous, it is integration module;Derivative module, it is micro- Sub-module.
Add module in the module library Math Operations, it is addition module, and default is that two inputs are added, and is double-clicked The module, by ' two plus siges (++) in List of Signs ' frame input a plus sige (+) afterwards, have thus been changed to three Plus sige, for indicating the superposition of three signals.
In1 module (input port module) and Out1 module (output end mouth mold in the module library Ports&Subsystems Block).
(2) above structure figure is packaged into PID controller.
1. creating subsystem.Choose reselection model window menu " Edit/Creat Subsystem " after above structure figure
2. encapsulating.Choose above-mentioned subsystem module, reselection model window menu " Edit/Mask Subsystem "
3. as needed, carrying out some encapsulation settings in encapsulation editing machine dialog box, including setting encapsulation text, dialogue Frame, icon etc..Following items setting: Icon (icon) item need to mainly be carried out: being inputted in " Drawing commands " edit box " disp (' PID ') ", Parameters (parameter) item: creation kp, tri- parameters of ki, kd.
Referring to Fig.2, dsp board, is made of DSP and its peripheral circuit, DSP peripheral circuit include power circuit, clock circuit, Reset circuit, jtag interface and extended menory;
Wherein, the supply voltage of the power circuit is 3.3~1.8V, and the power supply chip of power circuit is that binary channels is defeated Controllable electric power conversion chip out, response is fast, offset voltage is small, single supply power supply, dual output, quiescent current are minimum, interior Overheating protection circuit is contained in portion, has there are two the electrification reset pin for the 200ms that can be delayed, the two output voltage of power supply chip is 3.3V and 1.8V, maximum output current lA;
The reset circuit is the generation when circuit is powered on push switch by resistance, capacitor and manual reset switch Reset pulse;
The clock circuit is the most basic component part of sequential logical circuit, provides clock source for it, DSP could be normal It working, there is the PLL circuit of frequency multiplication inside DSP, we enable phaselocked loop herein, and in order to improve the anti-interference ability of system, There is source crystal oscillator to provide clock signal for system using 30M, 150MHz is multiplied to by PLL;
The extended menory is asked using IS61LV12816 extension 16 external storage skies of 64K X.
In the present invention, it provides and limits unless there are specific, it is interlaced between feature, not necessarily it is individually present.With On be shown and described with including basic principles and main features and its advantage of the invention.Being engaged in the technical professional need to know, this The limitation be not limited to the above embodiment is invented, the above embodiments are only preferred examples of the present invention with specification, rather than are used The present invention is limited, to become unique selection.In the case where the spirit and scope of invention require, the present invention can be also further change in and excellent Change, to the present invention carry out improve and optimizate all enter scope of the claimed invention in, claimed specific range It is defined by the appending claims and its equivalent thereof.

Claims (1)

1.DSP code automatic generation method, which is characterized in that step are as follows:
1) model is built under Matlab platform according to the mentality of designing of system first;
2) secondly algorithm is emulated in Simulink;
3) the project file code towards TI editing machine is generated by the Real Time Workshop that Matlab is provided;
4) and the further compiling of completion code, link generate DSP executable machine code;
5) it finally downloads on target dsp board and runs, complete the exploitation of system.
CN201910398779.XA 2019-05-14 2019-05-14 DSP code automatic generation method and device Pending CN110096267A (en)

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CN110096267A true CN110096267A (en) 2019-08-06

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114356315A (en) * 2022-01-10 2022-04-15 数字源生(武汉)科技有限公司 Model-driven automatic memory allocation technology for multi-core DSP

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170115969A1 (en) * 2015-10-21 2017-04-27 Vayavya Labs Pvt. Ltd System and method for automatically generating device drivers for run time environments
CN106681213A (en) * 2017-01-04 2017-05-17 北京润科通用技术有限公司 Automatic code generating loading platform system
CN107346249A (en) * 2017-07-13 2017-11-14 重庆电子工程职业学院 A kind of computer software development approach based on model

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170115969A1 (en) * 2015-10-21 2017-04-27 Vayavya Labs Pvt. Ltd System and method for automatically generating device drivers for run time environments
CN106681213A (en) * 2017-01-04 2017-05-17 北京润科通用技术有限公司 Automatic code generating loading platform system
CN107346249A (en) * 2017-07-13 2017-11-14 重庆电子工程职业学院 A kind of computer software development approach based on model

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114356315A (en) * 2022-01-10 2022-04-15 数字源生(武汉)科技有限公司 Model-driven automatic memory allocation technology for multi-core DSP

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Application publication date: 20190806