CN110088922A - A kind of LED chip construction and preparation method thereof - Google Patents
A kind of LED chip construction and preparation method thereof Download PDFInfo
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Abstract
本发明提供一种发光二极管芯片结构及其制作方法,结构包括:衬底;发光外延结构,位于所述衬底上,包括依次层叠的第一导电型半导体层、量子阱层以及第二导电型半导体层;电流扩展层,形成于所述外延结构的部分表面;绝缘层,包裹所述电流扩展层的侧壁,所述绝缘层具有一系列图案化通孔结构;金属层,形成于所述绝缘层表面,所述一部分金属层通过部分通孔结构与所述透明导电层接触,另一部分金属层通过部分通孔结构与所述发光外延结构接触。
The invention provides a light-emitting diode chip structure and a manufacturing method thereof. The structure includes: a substrate; a light-emitting epitaxial structure, located on the substrate, includes a first conductive type semiconductor layer, a quantum well layer and a second conductive type layered in sequence. a semiconductor layer; a current spreading layer, formed on a part of the surface of the epitaxial structure; an insulating layer, wrapping the sidewall of the current spreading layer, and the insulating layer has a series of patterned via structures; a metal layer, formed on the On the surface of the insulating layer, a part of the metal layer is in contact with the transparent conductive layer through a part of the through hole structure, and another part of the metal layer is in contact with the light-emitting epitaxial structure through a part of the through hole structure.
Description
技术领域technical field
本发明属于半导体照明领域,特别是涉及一种发光二极管芯片结构及其制作方法。The invention belongs to the field of semiconductor lighting, and in particular relates to a light emitting diode chip structure and a manufacturing method thereof.
背景技术Background technique
半导体照明作为新型高效固体光源,具有寿命长、节能、环保、安全等显著优点,将成为人类照明史上继白炽灯、光灯之后的又一次飞跃,其应用领域正在迅速扩大,正带动传统照明、显示等行业的升级换代,其经济效益和社会效益巨大。正因如此,半导体照明被普遍看作是21世纪最具发展前景的新兴产业之一,也是未来几年光电子领域最重要的制高点之一。发光二极管(英文简称LED)通常是由如GaN(氮化镓)、GaAs(砷化镓)、GaP(磷化镓)、GaAsP(磷砷化镓)等半导体制成的,其核心是具有发光特性的PN结,在正向电压下,电子由N区注入P区,空穴由P区注入N区,进入对方区域的少数载流子一部分与多数载流子复合而发光。As a new type of high-efficiency solid light source, semiconductor lighting has significant advantages such as long life, energy saving, environmental protection, and safety. It will become another leap in the history of human lighting after incandescent lamps and light lamps. The upgrading of display and other industries has huge economic and social benefits. Because of this, semiconductor lighting is generally regarded as one of the most promising emerging industries in the 21st century, and it is also one of the most important commanding heights in the field of optoelectronics in the next few years. Light-emitting diodes (LED for short) are usually made of semiconductors such as GaN (gallium nitride), GaAs (gallium arsenide), GaP (gallium phosphide), GaAsP (gallium arsenide phosphide) and other semiconductors. For the characteristic PN junction, under the forward voltage, electrons are injected into the P region from the N region, holes are injected into the N region from the P region, and part of the minority carriers entering the opposite region recombine with the majority carriers to emit light.
当前全球能源短缺的忧虑再度升高的背景下,节约能源是我们未来面临的重要的问题,在照明领域,LED被称为第四代照明光源或绿色光源,具有节能、环保、寿命长、体积小等特点,可以广泛应用于各种指示、显示、装饰、背光源、普通照明和城市夜景等领域。Under the background of the current global energy shortage worries, saving energy is an important issue we will face in the future. In the field of lighting, LED is called the fourth generation lighting source or green light source, which has the advantages of energy saving, environmental protection, long life, volume It can be widely used in various fields such as indication, display, decoration, backlight, general lighting and urban night scenes.
现有的一种LED芯片结构一般是在发光外延叠层上设置反射层,如采用具有高低折射率差较大的分布布拉格反射层(DBR)或者具有较高反射率的金属(如Ag)作为反射层,但DBR具有一定的角度性,且导热效果不理想,而高反射金属的反射率上限一般约为95%,反射率难以进一步提升,不利于LED芯片外部光萃取,从而导致芯片发光效率的提升得到制约。In an existing LED chip structure, a reflective layer is generally arranged on a light-emitting epitaxial stack, for example, a distributed Bragg reflector (DBR) with a large difference between high and low refractive index or a metal (such as Ag) with a high reflectivity is used as the structure. Reflective layer, but DBR has a certain angle, and the heat conduction effect is not ideal, and the upper limit of the reflectivity of high-reflection metals is generally about 95%, which is difficult to further improve the reflectivity, which is not conducive to the extraction of external light from the LED chip, resulting in the chip’s luminous efficiency. improvement is restricted.
发明内容SUMMARY OF THE INVENTION
鉴于以上所述现有技术的缺点,本发明的目的在于:提供一种发光二极管芯片结构及其制作方法,用于解决现有技术中发光二极管芯片外部光萃取较低而导致发光效率降低的问题。In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a light-emitting diode chip structure and a manufacturing method thereof, which are used to solve the problem that the light extraction efficiency of the light-emitting diode chip is low due to low external light extraction in the prior art. .
为实现上述目的及其他相关目的,本发明提供一种发光二极管芯片结构,其特征在于:包括:衬底;发光外延结构,位于所述衬底上,包括依次层叠的第一导电型半导体层、量子阱层以及第二导电型半导体层;电流扩展层,形成于所述发光外延结构的部分表面;绝缘层,包裹所述电流扩展层的侧壁,所述绝缘层具有一系列图案化通孔结构;金属层,形成于所述绝缘层表面,所述一部分金属层通过部分通孔结构与所述电流扩展层接触,另一部分金属层通过部分通孔结构与所述发光外延结构接触。In order to achieve the above object and other related objects, the present invention provides a light-emitting diode chip structure, which is characterized by: comprising: a substrate; a light-emitting epitaxial structure, located on the substrate, comprising a first conductive type semiconductor layer stacked in sequence, a quantum well layer and a second conductive type semiconductor layer; a current spreading layer, formed on a part of the surface of the light-emitting epitaxial structure; an insulating layer, wrapping the sidewall of the current spreading layer, and the insulating layer has a series of patterned through holes structure; a metal layer is formed on the surface of the insulating layer, a part of the metal layer is in contact with the current spreading layer through a part of the through hole structure, and another part of the metal layer is in contact with the light emitting epitaxial structure through a part of the through hole structure.
优选地,还包括局部缺陷区,位于部分所述第二导电型半导体层上,且向下延伸至所述第一导电型半导体层形成台面结构,所述台面结构露出有发光外延结构侧壁。Preferably, a local defect region is further included, which is located on a part of the second conductive type semiconductor layer and extends downward to the first conductive type semiconductor layer to form a mesa structure, and the mesa structure exposes sidewalls of the light emitting epitaxial structure.
优选地,第一电极,形成于所述局部缺陷区;以及第二电极,形成于所述金属层上。Preferably, a first electrode is formed on the local defect region; and a second electrode is formed on the metal layer.
优选地,所述绝缘层的图案化通孔结构包括位于所述电流扩展层之上的第一通孔结构和位于发光外延结构之上的第二通孔结构。Preferably, the patterned through-hole structure of the insulating layer includes a first through-hole structure on the current spreading layer and a second through-hole structure on the light-emitting epitaxial structure.
进一步地,所述第一通孔结构为阵列式,所述第二通孔结构为环状或带状。Further, the first through hole structure is in an array type, and the second through hole structure is in a ring shape or a strip shape.
优选地,所述第一、第二通孔结构的尺寸介于1~50μm,优选介于1~20μm。Preferably, the size of the first and second through hole structures is between 1 and 50 μm, preferably between 1 and 20 μm.
优选地,所述第一通孔结构与第二通孔结构的数量之比介于5:1~50:1,更优选第一通孔结构与第二通孔结构的数量之比介于10:1~30:1。Preferably, the ratio of the number of the first through-hole structure to the second through-hole structure is between 5:1 and 50:1, and more preferably, the ratio of the number of the first through-hole structure to the second through-hole structure is between 10 : 1~30: 1.
优选地,第一通孔结构横截面面积总和占所述发光二极管芯片结构的横截面面积比值的3%~50%,更优选第一通孔结构横截面面积总和占所述发光二极管芯片结构的横截面面积比值的5%~20%。Preferably, the total cross-sectional area of the first through-hole structure accounts for 3% to 50% of the ratio of the cross-sectional area of the light-emitting diode chip structure, and more preferably, the total cross-sectional area of the first through-hole structure accounts for the light-emitting diode chip structure. 5%~20% of the cross-sectional area ratio.
优选地,所述绝缘层覆盖于所述发光外延结构的侧壁。Preferably, the insulating layer covers the sidewalls of the light-emitting epitaxial structure.
优选地,所述绝缘层包括低折射率的材料层。Preferably, the insulating layer includes a low refractive index material layer.
优选地,所述绝缘层包括分布布拉格反射层。Preferably, the insulating layer includes a distributed Bragg reflection layer.
优选地,所述金属层为多层结构。Preferably, the metal layer has a multi-layer structure.
优选地,所述金属层包括金属反射层和金属阻挡层。Preferably, the metal layer includes a metal reflection layer and a metal barrier layer.
本发明还提供一种发光二极管芯片结构的制作方法,包括:以下工艺步骤:(1)提供一衬底,于所述衬底上形成发光外延结构,所述发光外延结构包括依次层叠的第一导电型半导体层、量子阱层以及第二导电型半导体层;(2)于所述发光外延结构形成台面结构,所述台面结构露出有发光外延结构侧壁;(3)于所述发光外延结构的部分表面形成电流扩展层;(4)形成绝缘层,包裹所述电流扩展层的侧壁,所述绝缘层具有一系列图案化通孔结构;(5)于所述具有图案化通孔结构的绝缘层表面形成金属层,所述一部分金属层通过部分通孔结构与所述电流扩展层接触,另一部分金属层通过部分通孔结构与所述发光外延结构接触。The present invention also provides a method for fabricating a light-emitting diode chip structure, including the following process steps: (1) providing a substrate, and forming a light-emitting epitaxial structure on the substrate, wherein the light-emitting epitaxial structure includes a first layer stacked in sequence. a conductive type semiconductor layer, a quantum well layer and a second conductive type semiconductor layer; (2) forming a mesa structure on the light emitting epitaxial structure, the mesa structure exposing sidewalls of the light emitting epitaxial structure; (3) forming the light emitting epitaxial structure on the light emitting epitaxial structure A current spreading layer is formed on a part of the surface of the insulating layer; (4) an insulating layer is formed, wrapping the sidewall of the current spreading layer, and the insulating layer has a series of patterned via structures; (5) the patterned via structures are formed on the insulating layer. A metal layer is formed on the surface of the insulating layer, a part of the metal layer is in contact with the current spreading layer through a part of the through hole structure, and another part of the metal layer is in contact with the light emitting epitaxial structure through a part of the through hole structure.
优选地,所述步骤(2)包括:于所述发光外延结构中刻蚀出局部缺陷区,形成台面结构。Preferably, the step (2) includes: etching local defect regions in the light-emitting epitaxial structure to form a mesa structure.
优选地,所述步骤(4)的绝缘层的图案化通孔结构包括:位于所述电流扩展层之上的第一通孔结构和位于发光外延结构之上的第二通孔结构。Preferably, the patterned through-hole structure of the insulating layer in step (4) includes: a first through-hole structure located on the current spreading layer and a second through-hole structure located on the light-emitting epitaxial structure.
进一步地,所述第一通孔结构为阵列式,所述第二通孔结构为环状或带状。Further, the first through hole structure is in an array type, and the second through hole structure is in a ring shape or a strip shape.
优选地,所述第一、第二通孔结构的尺寸介于1~50μm,优选介于1~20μm。Preferably, the size of the first and second through hole structures is between 1 and 50 μm, preferably between 1 and 20 μm.
优选地,所述第一通孔结构与第二通孔结构的数量之比介于5:1~50:1,更优选第一通孔结构与第二通孔结构的数量之比介于10:1~30:1。Preferably, the ratio of the number of the first through-hole structure to the second through-hole structure is between 5:1 and 50:1, and more preferably, the ratio of the number of the first through-hole structure to the second through-hole structure is between 10 : 1~30: 1.
优选地,第一通孔结构横截面面积总和占所述发光二极管芯片结构的横截面面积比值的3%~50%,更优选第一通孔结构横截面面积总和占所述发光二极管芯片结构的横截面面积比值的5%~20%。Preferably, the total cross-sectional area of the first through-hole structure accounts for 3% to 50% of the ratio of the cross-sectional area of the light-emitting diode chip structure, and more preferably, the total cross-sectional area of the first through-hole structure accounts for the light-emitting diode chip structure. 5%~20% of the cross-sectional area ratio.
优选地,所述步骤(4)的绝缘层还覆盖于所述发光外延结构的侧壁。Preferably, the insulating layer of the step (4) also covers the sidewall of the light-emitting epitaxial structure.
优选地,所述绝缘层包括低折射率的材料层。Preferably, the insulating layer includes a low refractive index material layer.
优选地,所述绝缘层包括分布布拉格反射层。Preferably, the insulating layer includes a distributed Bragg reflection layer.
优选地,所述金属层为多层结构。Preferably, the metal layer has a multi-layer structure.
优选地,所述金属层包括金属反射层和金属阻挡层。Preferably, the metal layer includes a metal reflection layer and a metal barrier layer.
优选地,还包括步骤(6):于所述局部缺陷区制作第一电极;以及于所述金属层上制作第二电极。Preferably, the method further includes step (6): forming a first electrode on the local defect region; and forming a second electrode on the metal layer.
如上所述,本发明的发光二极管芯片结构及其制作方法,包括以下有益效果:As described above, the light-emitting diode chip structure and the manufacturing method thereof of the present invention include the following beneficial effects:
(1)通过电流扩展层、绝缘层(如低折射率)、金属反射层形成全方位反射层(ODR)结构,其反射效果优于常规的金属反射层或分布布拉格反射层结构,增强发光二极管芯片外部光萃取几率,提高LED器件的亮度;(1) An omnidirectional reflective layer (ODR) structure is formed through a current spreading layer, an insulating layer (such as a low refractive index), and a metal reflective layer. The probability of light extraction outside the chip increases the brightness of the LED device;
(2)通过对绝缘层形成具有图案化的第一通孔结构,使金属层与电流扩展层连通,从而维持LED器件的电压(VF)不上升;(2) By forming a patterned first through hole structure on the insulating layer, the metal layer is communicated with the current spreading layer, thereby maintaining the voltage (VF) of the LED device from rising;
(3)通过对绝缘层形成具有图案化的第二通孔结构,使得金属层与发光外延结构(如P-GaN层)直接接触,从而改善金属层(如金属反射层)与绝缘层粘附性不佳问题,增强LED器件的可靠性。(3) By forming a patterned second through hole structure on the insulating layer, the metal layer is in direct contact with the light-emitting epitaxial structure (such as a P-GaN layer), thereby improving the adhesion of the metal layer (such as a metal reflective layer) to the insulating layer The problem of poor performance and enhance the reliability of LED devices.
附图说明Description of drawings
图1~图10显示为本发明的发光二极管芯片结构的制作方法各步骤所呈现的结构示意图,其中,图4显示为图5(LED芯片单元俯视图)沿A-A方向的剖视图,图8显示为图7的虚线框局部放大结构示意图,图10显示为本发明的发光二极管芯片结构示意图。1 to 10 are schematic structural diagrams of each step of the manufacturing method of the light-emitting diode chip structure of the present invention, wherein, FIG. 4 is a cross-sectional view along the A-A direction of FIG. 5 (top view of the LED chip unit), and FIG. 8 is a diagram 7 is a partial enlarged schematic view of the structure of the dotted line frame, and FIG. 10 is a schematic view of the structure of the light-emitting diode chip of the present invention.
元件标号说明:Component label description:
101衬底;1021局部缺陷区;102第一导电型半导体层;103量子阱层;104第二导电型半导体层;105电流扩展层;106绝缘层;1061第一通孔结构;1062第二通孔结构;107金属层;1071金属反射层;1072金属保护层;108第二绝缘层;1081第二绝缘层的第一通孔结构;1082第二绝缘层的第二通孔结构;109第一电极;110第二电极。101 Substrate; 1021 Local defect region; 102 First conductivity type semiconductor layer; 103 Quantum well layer; 104 Second conductivity type semiconductor layer; 105 Current spreading layer; hole structure; 107 metal layer; 1071 metal reflection layer; 1072 metal protection layer; 108 second insulating layer; 1081 first through hole structure of the second insulating layer; 1082 second through hole structure of the second insulating layer; 109 first electrode; 110 the second electrode.
具体实施方式Detailed ways
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
请参阅图1~图10。需要说明的是,本实施例中所提供的图示仅以示意方式说明本发明的基本构想,遂图示中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制,其实际实施时各组件的型态、数量及比例可为一种随意的改变,且其组件布局型态也可能更为复杂。Please refer to Figure 1~Figure 10. It should be noted that the diagrams provided in this embodiment are only to illustrate the basic concept of the present invention in a schematic way, so the diagrams only show the components related to the present invention rather than the number, shape and the number of components in the actual implementation. For dimension drawing, the type, quantity and proportion of each component can be changed at will in actual implementation, and the component layout may also be more complicated.
如图1~图10所示,本实施例提供一种发光二极管芯片结构的制作方法,所述制作方法包括以下步骤:As shown in FIG. 1 to FIG. 10 , this embodiment provides a method for fabricating a light-emitting diode chip structure, and the fabrication method includes the following steps:
如图1所示,首先进行工艺步骤(1),提供一衬底101,于所述衬底101上形成发光外延结构,所述外延结构包括依次层叠的第一导电型半导体层102、量子阱层103以及第二导电型半导体层104。As shown in FIG. 1 , process step (1) is first performed, a substrate 101 is provided, and a light-emitting epitaxial structure is formed on the substrate 101 , and the epitaxial structure includes a first conductive type semiconductor layer 102 and a quantum well stacked in sequence. layer 103 and the second conductive type semiconductor layer 104 .
所述衬底101包括平面型蓝宝石衬底、图形蓝宝石衬底、硅衬底、碳化硅衬底、氮化镓衬底、砷化镓衬底等。在本实施例中,所述衬底选用为图形蓝宝石衬底。The substrate 101 includes a planar sapphire substrate, a patterned sapphire substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, a gallium arsenide substrate, and the like. In this embodiment, the substrate is selected as a patterned sapphire substrate.
作为示例,采用MOCVD工艺于所述衬底101上形成外延结构,所述外延结构可以包含缓冲层(图中未示出)、第一导电型半导体层102、量子阱层103以及第二导电型半导体层104、电子阻挡层(EBL)等,其中,所述第一导电型半导体层102可以为N型GaN层,所述量子阱层103可以为GaN基量子阱层,所述第二导电型半导体层104可以为P型GaN层。当然,也可以依据实际需求选择其它种类的外延结构,并不限于此处所列举的示例。As an example, an epitaxial structure is formed on the substrate 101 by an MOCVD process, and the epitaxial structure may include a buffer layer (not shown in the figure), a first conductivity type semiconductor layer 102 , a quantum well layer 103 and a second conductivity type A semiconductor layer 104, an electron blocking layer (EBL), etc., wherein the first conductivity type semiconductor layer 102 may be an N-type GaN layer, the quantum well layer 103 may be a GaN-based quantum well layer, and the second conductivity type The semiconductor layer 104 may be a P-type GaN layer. Of course, other types of epitaxial structures can also be selected according to actual requirements, and are not limited to the examples listed here.
如图2所示,然后进行工艺步骤(2),于所述外延结构中从上至下,刻蚀出若干个数量的局部缺陷区1021,形成台面结构,所述台面结构露出有所述外延结构侧壁,具体地,所述台面结构显露有第一导电型半导体层102台面以及第一导电型半导体层102、量子阱层103及第二导电型半导体层104的侧壁。As shown in FIG. 2 , the process step (2) is then performed, and a number of local defect regions 1021 are etched from top to bottom in the epitaxial structure to form a mesa structure, and the epitaxial structure is exposed on the mesa structure. Structure sidewalls, specifically, the mesa structure exposes the mesa of the first conductivity type semiconductor layer 102 and the sidewalls of the first conductivity type semiconductor layer 102 , the quantum well layer 103 and the second conductivity type semiconductor layer 104 .
例如,可以采用ICP刻蚀或RIE刻蚀工艺,于所述外延结构中刻蚀出台面结构,使得所述台面结构显露有第一导电型半导体层102台面以及第一导电型半导体层102、量子阱层103及第二导电型半导体层104的侧壁,所述第一导电型半导体层台面用以于后续第一电极的电连接。局部缺陷区1021的数量至少一个,也可以根据LED芯片的结构、用途、面积大小等进行增加,从而使得局部缺陷区的数量与后续制作的第二通孔结构的数量相当。需要特别说明的是,当LED结构为垂直结构时,也可以不需要制作局部缺陷区,而将第一电极制作于第一导电型半导体层102或是衬底101的背面。For example, ICP etching or RIE etching process can be used to etch the mesa structure in the epitaxial structure, so that the mesa structure exposes the mesa surface of the first conductive type semiconductor layer 102 and the first conductive type semiconductor layer 102, quantum The sidewalls of the well layer 103 and the second conductive type semiconductor layer 104, the first conductive type semiconductor layer mesa is used for subsequent electrical connection of the first electrode. The number of local defect regions 1021 may be at least one, and may also be increased according to the structure, application, and area size of the LED chip, so that the number of local defect regions is equal to the number of second through hole structures to be fabricated subsequently. It should be noted that, when the LED structure is a vertical structure, it is also possible to form the first electrode on the backside of the first conductive type semiconductor layer 102 or the substrate 101 without forming a local defect region.
如图3所示,接着进行工艺步骤(3),于所述发光外延结构的部分表面上形成电流扩展层105。As shown in FIG. 3 , the process step (3) is then performed to form a current spreading layer 105 on a part of the surface of the light-emitting epitaxial structure.
例如,所述电流扩展层105可以为采用蒸镀或溅镀工艺以形成的ITO透明导电层,也可以选用其它材料,如ZnO、石墨烯等,并通过熔合使电流扩展层其与发光外延结构的P-GaN层形成欧姆接触。工艺步骤(4)制作的电流扩展层还包括通过黄光、蚀刻工艺蚀刻部分电流扩展层,使得位于所述发光外延层表面上的电流扩展层“内缩”,便于后续的绝缘层披覆于该电流扩展层的侧壁。For example, the current spreading layer 105 can be an ITO transparent conductive layer formed by evaporation or sputtering, or other materials, such as ZnO, graphene, etc., can be fused to make the current spreading layer and the light-emitting epitaxial structure The P-GaN layer forms an ohmic contact. The current spreading layer produced in the process step (4) also includes etching part of the current spreading layer through the yellow light and etching process, so that the current spreading layer located on the surface of the light-emitting epitaxial layer "shrinks", which is convenient for the subsequent insulating layer to be coated on the surface. sidewalls of the current spreading layer.
如图4和5所示,接着进行工艺步骤(4),于上述结构上制作绝缘层106,包裹所述电流扩展层105的侧壁以及覆盖于所述相邻的发光外延结构的侧壁,其中包裹所述电流扩展层105的侧壁的绝缘层106主要用于与电流扩展层、后续制作的金属层构成全方位反射层(ODR)结构,覆盖于所述相邻的发光外延结构的侧壁的绝缘层106主要作为电绝缘的作用;进一步地,所述绝缘层具有一系列图案化通孔结构。As shown in FIGS. 4 and 5 , the process step (4) is then performed to form an insulating layer 106 on the above structure, wrapping the sidewalls of the current spreading layer 105 and covering the sidewalls of the adjacent light-emitting epitaxial structures, The insulating layer 106 wrapping the sidewall of the current spreading layer 105 is mainly used to form an omnidirectional reflective layer (ODR) structure with the current spreading layer and the subsequently fabricated metal layer, covering the side of the adjacent light-emitting epitaxial structure. The insulating layer 106 of the wall is mainly used for electrical insulation; further, the insulating layer has a series of patterned via structures.
例如,可以采用化学气相沉积工艺,于所述外延结构的部分表面形成绝缘层106,所述绝缘层106可以为低折射率材料,如二氧化硅层、氟化镁等,也可以为高折射率材料,如二氧化钛等,或绝缘层也可以是包括高、低折射率材料的分布布拉格反射层(DBR),且并不限于此处所列举的示例。所述图案化通孔结构,优选采用刻蚀工艺形成。如绝缘层选用SiO2低折射率材料,藉由低折射率材料绝缘层与ITO透明导电层的折射率差,可以增强光的出射。For example, a chemical vapor deposition process can be used to form an insulating layer 106 on a part of the surface of the epitaxial structure. The insulating layer 106 can be a low-refractive-index material, such as a silicon dioxide layer, magnesium fluoride, etc., or a high-refractive index material. The high-index material, such as titanium dioxide, etc., or the insulating layer can also be a distributed Bragg reflector (DBR) including high and low refractive index materials, and is not limited to the examples listed here. The patterned via structure is preferably formed by an etching process. For example, SiO 2 low-refractive-index material is selected for the insulating layer, and the light output can be enhanced by the difference in the refractive index between the insulating layer of the low-refractive-index material and the ITO transparent conductive layer.
作为示例,所述图案化通孔结构包括:位于所述电流扩展层之上的第一通孔结构1061以及位于发光外延结构之上的第二通孔结构1062。进一步地,所述第一通孔结构为阵列式,所述第二通孔结构为环状或带状,本实施例优选为闭合环状。所述第一、第二通孔结构的尺寸介于1~50μm,优选介于1~20μm。所述第一通孔结构与第二通孔结构的数量之比介于5:1~50:1,优选第一通孔结构与第二通孔结构的数量之比介于10:1~30:1。一般来说,第二通孔的数量与局部缺陷区的数量相当,形状相似。所述第一通孔结构横截面面积总和占所述发光二极管芯片结构(LED芯片单元)的横截面面积比值K的3%~50%,优选5%~20%,更优选10%,如果K值太低,则金属层与电流扩展层通过第一通孔接触的面积太小,不利于控制电压(VF),而如果K值太高,则会影响电流扩展层、绝缘层(如低折射率)、金属反射层形成全方位反射层(ODR)结构的反射效果。As an example, the patterned via structure includes: a first via structure 1061 on the current spreading layer and a second via structure 1062 on the light emitting epitaxial structure. Further, the first through hole structure is in an array type, and the second through hole structure is in a ring shape or a strip shape, and in this embodiment, it is preferably a closed ring shape. The size of the first and second through hole structures is between 1 and 50 μm, preferably between 1 and 20 μm. The ratio of the number of the first through-hole structure to the second through-hole structure is between 5:1 and 50:1. Preferably, the ratio of the first through-hole structure to the second through-hole structure is between 10:1 and 30. :1. Generally speaking, the number of the second through holes is equivalent to the number of local defect regions, and the shapes are similar. The total cross-sectional area of the first through hole structure accounts for 3% to 50% of the cross-sectional area ratio K of the light-emitting diode chip structure (LED chip unit), preferably 5% to 20%, more preferably 10%, if K If the value is too low, the contact area between the metal layer and the current spreading layer through the first through hole is too small, which is not conducive to the control voltage (VF). rate), the metal reflection layer forms the reflection effect of the omnidirectional reflection layer (ODR) structure.
如图6~图8所示,然后进行工艺步骤(5),于所述具有图案化通孔结构的绝缘层表面形成金属层,所述一部分金属层通过第一通孔结构1061与所述电流扩展层105接触,另一部分金属层通过第二通孔结构1061与所述发光外延结构接触,从而改善金属层107与绝缘层粘附性不佳问题,增强LED器件的可靠性。As shown in FIG. 6 to FIG. 8 , the process step (5) is then performed to form a metal layer on the surface of the insulating layer with the patterned via structure, and a part of the metal layer communicates with the current through the first via structure 1061 The extension layer 105 is in contact, and another part of the metal layer is in contact with the light emitting epitaxial structure through the second through hole structure 1061, thereby improving the poor adhesion between the metal layer 107 and the insulating layer and enhancing the reliability of the LED device.
例如,可以采用蒸镀或者溅镀工艺,于所述具有图案化通孔结构的绝缘层表面形成金属层107,所述金属层可以包括多层结构,如金属反射层1071、金属保护层1072等,并不限于此处所列举的示例。For example, an evaporation or sputtering process can be used to form the metal layer 107 on the surface of the insulating layer with the patterned through-hole structure, and the metal layer can include a multi-layer structure, such as a metal reflective layer 1071, a metal protective layer 1072, etc. , not limited to the examples listed here.
作为示例,当金属反射层选用Al或Ag高反射金属,作为反射镜(mirror)时,金属保护层(Barrier)选用TiW、Cr、Pt、Ti等,金属保护层1071可以是完全包裹金属反射层1071,用于保护金属反射层。As an example, when Al or Ag highly reflective metal is used as the metal reflective layer, TiW, Cr, Pt, Ti, etc. are selected as the metal protective layer (Barrier), and the metal protective layer 1071 may be a completely wrapped metal reflective layer. 1071, used to protect the metal reflective layer.
如图9和10所示,接着进行工艺步骤(6),于所述局部缺陷区制作第一电极109;以及于所述金属层上制作第二电极110。在制作所述第一、第二电极之前,可选地,在步骤(4)制得的结构上形成第二绝缘层108。As shown in FIGS. 9 and 10 , the process step ( 6 ) is performed next to form a first electrode 109 on the local defect region; and a second electrode 110 on the metal layer. Before fabricating the first and second electrodes, optionally, a second insulating layer 108 is formed on the structure fabricated in step (4).
作为示例,可以采用化学气相沉积工艺,形成第二绝缘层108,所述第二绝缘层108可以为低折射率材料,如二氧化硅层、氟化镁等,也可以为高折射率材料,如二氧化钛等,或绝缘层也可以是分布布拉格反射层(DBR),且并不限于此处所列举的示例。As an example, a chemical vapor deposition process can be used to form the second insulating layer 108, and the second insulating layer 108 can be a low refractive index material, such as a silicon dioxide layer, magnesium fluoride, etc., or a high refractive index material, Such as titanium dioxide, etc., or the insulating layer may also be a distributed Bragg reflector (DBR), and is not limited to the examples listed here.
采用光刻工艺及刻蚀工艺于所述第二绝缘层108中形成第二绝缘层的第一通孔结构1081和第二绝缘层的第二通孔结构1082。其中第一通孔结构1081作为第一电极的预留窗口,第二通孔结构1082作为第二电极的预留窗口。A first via structure 1081 of the second insulating layer and a second via structure 1082 of the second insulating layer are formed in the second insulating layer 108 by a photolithography process and an etching process. The first through hole structure 1081 is used as a reserved window for the first electrode, and the second through hole structure 1082 is used as a reserved window for the second electrode.
如图10所示,接着于所述第一电极的预留窗口中形成第一电极109,所述第一电极选用N电极,以实现N电极与N型GaN层电性连接;于所述第二电极的预留窗口中形成第二电极110,所述第二电极选用P电极,以实现P电极与金属层、电流扩展层、P型GaN层电性连接。As shown in FIG. 10 , a first electrode 109 is then formed in the reserved window of the first electrode, and an N electrode is selected for the first electrode, so as to realize the electrical connection between the N electrode and the N-type GaN layer; A second electrode 110 is formed in the reserved window of the two electrodes, and a P electrode is selected as the second electrode, so as to realize the electrical connection between the P electrode and the metal layer, the current spreading layer, and the P-type GaN layer.
最后,减薄所述衬底101并进行切割以获得独立的发光二极管芯片。Finally, the substrate 101 is thinned and diced to obtain individual LED chips.
如图10所示,本实施例还提供一种发光二极管芯片结构,所述发光二极管芯片结构包括:衬底101、发光外延结构、局部缺陷区1021、电流扩展层105、具有通孔结构的绝缘层106、金属层107、第二绝缘层108、第一电极109以及第二电极110。As shown in FIG. 10 , this embodiment further provides a light-emitting diode chip structure, the light-emitting diode chip structure includes: a substrate 101 , a light-emitting epitaxial structure, a local defect region 1021 , a current spreading layer 105 , an insulation having a through-hole structure layer 106 , metal layer 107 , second insulating layer 108 , first electrode 109 and second electrode 110 .
如图10所示,所述衬底101包括平面型蓝宝石衬底、图形蓝宝石衬底、硅衬底、碳化硅衬底、氮化镓衬底、砷化镓衬底等。在本实施例中,所述衬底101选用为图形蓝宝石衬底。As shown in FIG. 10 , the substrate 101 includes a planar sapphire substrate, a patterned sapphire substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, a gallium arsenide substrate, and the like. In this embodiment, the substrate 101 is selected as a patterned sapphire substrate.
如图10所示,所述发光外延结构位于所述衬底101上,包括依次层叠的第一导电型半导体层102、量子阱层103以及第二导电型半导体层104。As shown in FIG. 10 , the light-emitting epitaxial structure is located on the substrate 101 , and includes a first conductive type semiconductor layer 102 , a quantum well layer 103 and a second conductive type semiconductor layer 104 that are stacked in sequence.
例如,所述第一导电型半导体层102可以为N型GaN层,所述量子阱层103可以为GaN基量子阱层103,所述第二导电型半导体层104可以为P型GaN层。当然,也可以依据实际需求选择其它种类的外延结构,并不限于此处所列举的示例。For example, the first conductivity type semiconductor layer 102 may be an N-type GaN layer, the quantum well layer 103 may be a GaN-based quantum well layer 103, and the second conductivity type semiconductor layer 104 may be a P-type GaN layer. Of course, other types of epitaxial structures can also be selected according to actual requirements, and are not limited to the examples listed here.
如图10所示,所述若干个局部缺陷区1021位于部分所述第二导电型半导体层104上,且向下延伸至所述第一导电型半导体层102形成台面结构,所述台面结构露出有所述外延结构侧壁,具体地,所述台面结构显露有第一导电型半导体层102台面以及第一导电型半导体层102、量子阱层103及第二导电型半导体层104的侧壁。As shown in FIG. 10 , the plurality of local defect regions 1021 are located on a part of the second conductive type semiconductor layer 104 and extend downward to the first conductive type semiconductor layer 102 to form a mesa structure, and the mesa structure is exposed There are sidewalls of the epitaxial structure. Specifically, the mesa structure exposes the mesa of the first conductive type semiconductor layer 102 and the sidewalls of the first conductive type semiconductor layer 102 , the quantum well layer 103 and the second conductive type semiconductor layer 104 .
如图10所示,所述电流扩展层105形成于所述发光外延结构的部分表面上,并与部分的所述发光外延结构表面接合。As shown in FIG. 10 , the current spreading layer 105 is formed on a part of the surface of the light emitting epitaxial structure, and is bonded to a part of the surface of the light emitting epitaxial structure.
例如,所述电流扩展层105可以选用ITO透明导电层,也可以选用其它材料,如ZnO、石墨烯等。结构上,优选位于所述发光外延层表面上的电流扩展层“内缩”,便于后续的绝缘层披覆于该电流扩展层的侧壁。For example, the current spreading layer 105 may be an ITO transparent conductive layer, or other materials, such as ZnO, graphene, and the like. Structurally, it is preferable that the current spreading layer located on the surface of the light-emitting epitaxial layer "shrinks in", so that the subsequent insulating layer can be coated on the sidewall of the current spreading layer.
如图10所示,所述绝缘层106,包裹所述电流扩展层105的侧壁以及覆盖于所述相邻的发光外延结构的侧壁,其中包裹所述电流扩展层105的侧壁的绝缘层106主要用于与电流扩展层、金属层构成全方位反射层(ODR)结构,覆盖于所述相邻的发光外延结构的侧壁的绝缘层106主要作为电绝缘的作用;进一步地,所述绝缘层具有一系列图案化通孔结构。As shown in FIG. 10 , the insulating layer 106 wraps the sidewall of the current spreading layer 105 and covers the sidewall of the adjacent light-emitting epitaxial structure, wherein the insulating layer wraps the sidewall of the current spreading layer 105 The layer 106 is mainly used to form an omnidirectional reflection layer (ODR) structure with the current spreading layer and the metal layer, and the insulating layer 106 covering the sidewall of the adjacent light-emitting epitaxial structure is mainly used for electrical insulation; further, so The insulating layer has a series of patterned via structures.
例如,于所述外延结构的部分表面形成具有图案化通孔结构的绝缘层106,所述绝缘层106可以为低折射率材料,如二氧化硅层、氟化镁等,也可以为高折射率材料,如二氧化钛等,或绝缘层也可以是包括高、低折射率材料的分布布拉格反射层(DBR),且并不限于此处所列举的示例。作为示例,所述图案化通孔结构包括:位于所述电流扩展层之上的第一通孔结构1061以及位于发光外延结构之上的第二通孔结构1062。进一步地,所述第一通孔结构为阵列式,所述第二通孔结构为环状或带状,本实施例优选为闭合环状。所述第一、第二通孔结构的尺寸介于1~50μm,优选介于1~20μm。所述第一通孔结构与第二通孔结构的数量之比介于5:1~50:1,优选第一通孔结构与第二通孔结构的数量之比介于10:1~30:1。一般来说,第二通孔的数量与局部缺陷区的数量相当,形状相似。所述第一通孔结构横截面面积总和占所述发光二极管芯片结构(LED芯片单元)的横截面面积比值K的3%~50%,优选5%~20%,更优选10%,如果K值太低,则金属层与电流扩展层通过第一通孔接触的面积太小,不利于控制电压(VF),而如果K值太高,则会影响电流扩展层、绝缘层(如低折射率)、金属反射层形成全方位反射层(ODR)结构的反射效果。For example, an insulating layer 106 with a patterned through hole structure is formed on a part of the surface of the epitaxial structure. The insulating layer 106 can be a low-refractive-index material, such as a silicon dioxide layer, magnesium fluoride, etc., or a high-refractive index material. The high-index material, such as titanium dioxide, etc., or the insulating layer can also be a distributed Bragg reflector (DBR) including high and low refractive index materials, and is not limited to the examples listed here. As an example, the patterned via structure includes: a first via structure 1061 on the current spreading layer and a second via structure 1062 on the light emitting epitaxial structure. Further, the first through hole structure is in an array type, and the second through hole structure is in a ring shape or a strip shape, and in this embodiment, it is preferably a closed ring shape. The size of the first and second through hole structures is between 1 and 50 μm, preferably between 1 and 20 μm. The ratio of the number of the first through-hole structure to the second through-hole structure is between 5:1 and 50:1. Preferably, the ratio of the first through-hole structure to the second through-hole structure is between 10:1 and 30. :1. Generally speaking, the number of the second through holes is equivalent to the number of local defect regions, and the shapes are similar. The total cross-sectional area of the first through hole structure accounts for 3% to 50% of the cross-sectional area ratio K of the light-emitting diode chip structure (LED chip unit), preferably 5% to 20%, more preferably 10%, if K If the value is too low, the contact area between the metal layer and the current spreading layer through the first through hole is too small, which is not conducive to the control voltage (VF). rate), the metal reflection layer forms the reflection effect of the omnidirectional reflection layer (ODR) structure.
如图10所示,所述金属层107,形成于所述绝缘层106表面,所述一部分金属层第一通孔结构1061与所述电流扩展层105接触,另一部分金属层通过第二通孔结构1061与所述发光外延结构接触,从而改善金属层107与绝缘层粘附性不佳问题,增强LED器件的可靠性。As shown in FIG. 10 , the metal layer 107 is formed on the surface of the insulating layer 106 , the first through hole structure 1061 of a part of the metal layer is in contact with the current spreading layer 105 , and the other part of the metal layer passes through the second through hole The structure 1061 is in contact with the light-emitting epitaxial structure, thereby improving the problem of poor adhesion between the metal layer 107 and the insulating layer, and enhancing the reliability of the LED device.
例如,所述金属层107可以包括多层结构,如金属反射层1071、金属保护层1072等,并不限于此处所列举的示例。作为示例,当金属反射层选用Al或Ag高反射金属,作为反射镜(mirror)时,金属保护层(Barrier)选用TiW合金等,金属保护层1071可以是完全包裹金属反射层1071,用于保护金属反射层。For example, the metal layer 107 may include a multi-layer structure, such as a metal reflective layer 1071, a metal protection layer 1072, etc., and is not limited to the examples listed here. As an example, when Al or Ag highly reflective metal is used as the metal reflective layer, and a mirror (mirror) is used, the metal protective layer (Barrier) is selected from TiW alloy, etc. Metal reflective layer.
如图10所示,第二绝缘层108,形成于金属层107、局部缺陷区1021上,并于第二绝缘层108中形成第二绝缘层的第一通孔结构1081和第二绝缘层的第二通孔结构1082。其中第一通孔结构1081作为第一电极的预留窗口,第二通孔结构1082作为第二电极的预留窗口。第一电极109形成于所述第一电极的预留窗口中,所述第一电极选用N电极,以实现N电极与N型GaN层电性连接;第二电极110形成于所述第二电极的预留窗口中,所述第二电极选用P电极,以实现P电极与金属层、电流扩展层、P型GaN层电性连接。As shown in FIG. 10 , the second insulating layer 108 is formed on the metal layer 107 and the local defect region 1021 , and the first via structure 1081 of the second insulating layer and the second insulating layer are formed in the second insulating layer 108 . The second via structure 1082 . The first through hole structure 1081 is used as a reserved window for the first electrode, and the second through hole structure 1082 is used as a reserved window for the second electrode. The first electrode 109 is formed in the reserved window of the first electrode, and the first electrode selects the N electrode to realize the electrical connection between the N electrode and the N-type GaN layer; the second electrode 110 is formed on the second electrode In the reserved window, the second electrode selects the P electrode, so as to realize the electrical connection between the P electrode and the metal layer, the current spreading layer and the P-type GaN layer.
作为示例,所述第二绝缘层108可以为低折射率材料,如二氧化硅层、氟化镁等,也可以为高折射率材料,如二氧化钛等,或绝缘层也可以是分布布拉格反射层(DBR),且并不限于此处所列举的示例。As an example, the second insulating layer 108 may be a low refractive index material, such as a silicon dioxide layer, magnesium fluoride, etc., or a high refractive index material, such as titanium dioxide, or the insulating layer may also be a distributed Bragg reflection layer (DBR), and is not limited to the examples listed here.
需要说明的是,根据需要,也可以在制作完第一、第二电极之后,再于第一、第二电极之上形成第三绝缘层(图中未示出),并形成通孔结构,作为电极窗口,最后于电极窗口中形成第三、第四电极。It should be noted that, according to needs, after the first and second electrodes are fabricated, a third insulating layer (not shown in the figure) can be formed on the first and second electrodes, and a through-hole structure can be formed. As the electrode window, finally the third and fourth electrodes are formed in the electrode window.
本实施例通过电流扩展层、低折射率绝缘层、金属反射层形成全方位反射层(ODR)结构,其反射效果优于常规的金属反射层或分布布拉格反射层结构,增强发光二极管芯片外部光萃取几率,提高LED器件的亮度;通过对绝缘层形成具有图案化的第一通孔结构,使金属层与电流扩展层连通,从而维持LED器件的电压(VF)不上升;通过对绝缘层形成具有图案化的第二通孔结构,使得金属层与发光外延结构(如P-GaN层)直接接触,从而改善金属层(如金属反射层)与绝缘层粘附性不佳问题,增强LED器件的可靠性。In this embodiment, an omnidirectional reflective layer (ODR) structure is formed by a current spreading layer, a low-refractive index insulating layer, and a metal reflective layer. The extraction probability can improve the brightness of the LED device; by forming a patterned first through hole structure on the insulating layer, the metal layer is connected with the current spreading layer, so as to maintain the voltage (VF) of the LED device from rising; by forming a patterned first through hole structure on the insulating layer With a patterned second through hole structure, the metal layer is in direct contact with the light-emitting epitaxial structure (such as the P-GaN layer), thereby improving the poor adhesion between the metal layer (such as the metal reflective layer) and the insulating layer, and enhancing the LED device reliability.
如上所述,本发明的发光二极管芯片结构及其制作方法,具有以下有益效果:As described above, the light-emitting diode chip structure and the manufacturing method thereof of the present invention have the following beneficial effects:
本发明通过电流扩展层、低折射率绝缘层、金属反射层形成全方位反射层(ODR)结构,其反射效果优于常规的金属反射层或分布布拉格反射层结构,增强发光二极管芯片外部光萃取几率,提高LED器件的亮度;通过对绝缘层形成具有图案化的第一通孔结构,使金属层与电流扩展层连通,从而维持LED器件的电压(VF)不上升;通过对绝缘层形成具有图案化的第二通孔结构,使得金属层与发光外延结构(如P-GaN层)直接接触,从而改善金属层(如金属反射层)与绝缘层粘附性不佳问题,增强LED器件的可靠性。所以,本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。The present invention forms an omnidirectional reflection layer (ODR) structure through a current spreading layer, a low refractive index insulating layer and a metal reflection layer, and its reflection effect is better than that of a conventional metal reflection layer or a distributed Bragg reflection layer structure, and enhances the external light extraction of the light-emitting diode chip. probability, and improve the brightness of the LED device; by forming a patterned first through hole structure on the insulating layer, the metal layer is connected to the current spreading layer, so as to maintain the voltage (VF) of the LED device from rising; The patterned second through-hole structure makes the metal layer in direct contact with the light-emitting epitaxial structure (such as the P-GaN layer), thereby improving the poor adhesion between the metal layer (such as the metal reflective layer) and the insulating layer, and enhancing the LED device. reliability. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
本发明提供的发光二极管芯片结构及其制作方法,适用于制作倒装结构LED器件,亦适用于制作垂直结构或者薄膜结构或者高压结构LED器件。本发明不仅适用于制作可见光LED,也适用于制作UV-LED等。The light emitting diode chip structure and the manufacturing method thereof provided by the present invention are suitable for manufacturing a flip-chip structure LED device, and also suitable for manufacturing a vertical structure or a thin film structure or a high voltage structure LED device. The present invention is not only suitable for making visible light LEDs, but also suitable for making UV-LEDs and the like.
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。因此,举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。The above-mentioned embodiments merely illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed in the present invention should still be covered by the claims of the present invention.
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Also Published As
Publication number | Publication date |
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CN114695609A (en) | 2022-07-01 |
CN114695609B (en) | 2024-06-14 |
WO2019195960A1 (en) | 2019-10-17 |
CN110088922B (en) | 2022-04-15 |
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