CN110070815B - Reference voltage generator for display device - Google Patents

Abstract

The invention discloses a reference voltage generator of a display device, which comprises a first supply circuit and a second supply circuit. The first supply circuit is coupled with a first output end of the reference voltage generator and generates a first supply voltage to the first output end; and the second supply circuit is coupled with the first output end, the first supply voltage is fed back to the second supply circuit, and a second supply voltage is generated to a second output end of the reference voltage generator according to the first supply voltage. The invention can generate stable reference voltage under the requirement of power saving so as to improve the display quality of the display device.

Description

Reference voltage generator for display device

technical field

The present invention relates to a reference voltage generator, in particular to a reference voltage generator of a display device.

Background technique

The drive circuit of the display includes a timing controller, a gate drive circuit, a source drive circuit and a common drive circuit. The gate driving circuit is used for selectively driving a plurality of thin film transistors of the display. The source driving circuit is used for receiving the image signal and cooperates with the operation of the gate driving circuit to drive the display to display the image. The common driving circuit generates a common voltage to the common electrode of the display. The timing controller is used to provide various timing signals and data to the gate driving circuit, the source driving circuit and the common driving circuit.

The power of the gate driving circuit, the source driving circuit and the common driving circuit is supplied by the power generating circuit. For example, the publication number US 2017/0103724 A1 of the United States Patent and Trademark Office, the power generation circuit converts the input voltage to a high voltage or a negative voltage, and then outputs the high voltage or negative voltage to the driver (or voltage regulator), and the driver outputs the high voltage or negative voltage. voltage common voltage. Therefore, the withstand voltage of this driver needs to withstand the power supply after the voltage is doubled, and it is often a high-voltage component. Furthermore, the aforementioned US patent does not reduce the current required to resist perturbation of the source signal. That is, the driver receives the voltage-doubled power supply, so to resist the disturbance of the source signal, the driver (or regulator) needs to use the voltage-doubled power supply to provide the same current as the source signal, resulting in a significant increase in the overall power consumption.

In view of the above-mentioned deficiencies of the known technology, the present invention provides a reference voltage generator for a display device, which does not use a high voltage to provide the current required for the disturbance of the source signal, so as to achieve the purpose of saving power.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a reference voltage generator of a display device, which utilizes the power supply voltage to provide the current required for the disturbance of the source signal and the gate signal, so as to achieve the purpose of saving power.

The invention discloses a reference voltage generator for a display device, which includes a first supply circuit and a second supply circuit. The first supply circuit is coupled to a first output terminal of the reference voltage generator, and generates a first supply voltage to the first output terminal; and the second supply circuit is coupled to the first output terminal, and the first supply voltage is fed back to the second output terminal. The supply circuit generates a second supply voltage to a second output terminal of the reference voltage generator according to the first supply voltage.

To sum up, the present invention can generate a stable reference voltage under the requirement of power saving, so as to improve the display quality of the display device.

Description of drawings

FIG. 1 is a circuit diagram of a first embodiment of a reference voltage generator of a display device of the present invention;

Fig. 2 is the waveform diagram of the circuit diagram of Fig. 1;

3 is a circuit diagram of a second embodiment of the reference voltage generator of the display device of the present invention;

4 is a circuit diagram of a third embodiment of the reference voltage generator of the display device of the present invention;

Fig. 5 is the waveform diagram of the circuit diagram of Fig. 4;

6 is a circuit diagram of a fourth embodiment of the reference voltage generator of the display device of the present invention;

7 is a circuit diagram of a fifth embodiment of the reference voltage generator of the display device of the present invention.

Symbol Description:

1 The first output terminal;

2 The second output terminal;

10 panels;

20 the first supply circuit;

21 the second supply circuit;

22 the third supply circuit;

30 voltage divider circuit;

40 control circuit;

50 switching circuit;

60 comparator;

62 adjustment switch;

201 Positive charging circuit;

202 Negative charging circuit;

210. OPA operational amplifier circuit;

301 The first passive element;

302 second passive element;

C capacitor;

EN1 input terminal;

EN2 input terminal;

GATE gate signal;

GND reference terminal;

LOAD load;

S1 the first signal;

S2 second signal;

S3 signal;

S4 signal;

SOURCE source signal;

SN signal;

t1 time;

t2 time;

t3 time;

t4 time;

t5 time;

t6 time;

t7 time;

V22 third supply voltage;

V3 voltage;

V4 voltage;

V60 adjust signal;

VC control signal;

VCAP capacitor voltage;

VCOM first supply voltage;

VCOM0 second supply voltage;

VDD supply voltage;

VDIS_L first reference voltage;

VDIS_H second reference voltage;

VN voltage;

VOUT1 positive voltage;

VOUT2 negative voltage;

VREF1 reference voltage;

VREF2 reference voltage;

VSTOP reference voltage.

Detailed ways

Certain terms are used in the specification and within the scope of the preceding claims to refer to particular elements. It will be understood by those of ordinary skill in the art that manufacturers may refer to the same element by different nouns. The scope of this specification and the preceding claims does not take the difference in name as a way of distinguishing elements, but takes the difference in the overall technology of the elements as a criterion for distinguishing. Reference to "comprising" throughout the specification and the scope of the preceding claims is an open-ended term and should be interpreted as "including but not limited to". Furthermore, the term "coupled" herein includes any direct and indirect means of electrical connection. Therefore, if a first device is described as being coupled to a second device, it means that the first device can be directly electrically connected to the second device, or can be indirectly electrically connected to the second device through other devices or other connection means.

In order to make your examiners have a further understanding and understanding of the features of the present invention and the effects achieved, I would like to add examples and cooperate with detailed descriptions, and the descriptions are as follows:

Please refer to FIG. 1 , which is a circuit diagram of a first embodiment of a reference voltage generator of a display device of the present invention. As shown in the figure, the reference voltage generator of the display device includes a first supply circuit 20 and a second supply circuit 21 . The first supply circuit 20 is coupled to a first output terminal 1 of the reference voltage generator, and generates a first supply voltage VCOM to the first output terminal 1 . The second supply circuit 21 is coupled to the first output terminal 1, the first supply voltage VCOM is fed back to the second supply circuit 21, and a second supply voltage VCOM0 is generated according to the first supply voltage VCOM to a second output of the reference voltage generator end 2. In this way, the reference voltage generator is coupled to a capacitor C, and after the capacitor C is charged to the level of the first supply voltage VCOM (or a predetermined level) according to the first supply voltage VCOM, the reference voltage generator is based on the second supply voltage VCOM0 controls the potential of the first supply voltage VCOM. The voltage difference between the first supply voltage VCOM and the second supply voltage VCOM0 determines a capacitor voltage VCAP, the capacitor C stores the capacitor voltage VCAP, and the capacitor voltage VCAP determines a common voltage of the display device. Therefore, when the potential change of the source signal SOURCE or the gate signal GATE disturbs the potential of the common voltage (the first supply voltage VCOM), the second supply voltage VCOM0 can provide the current required to compensate for the disturbance of the signal to adjust the capacitance of the capacitor voltage VCAP. The level of the common voltage (the first supply voltage VCOM) is maintained.

In this way, the output of the reference voltage generator of the present invention is a stable reference voltage, that is, the first supply voltage VCOM in FIG. 1 . The first supply voltage VCOM is coupled to a common electrode of a panel 10 and may be a common voltage of the common electrode. When the panel 10 is an electronic paper, the reference voltage generator of the present invention can be changed to multiple outputs or use multiple sets of reference voltage generators to stably output multiple reference voltages, and the multiple reference voltages are used as the multiple commons of the electronic paper. Voltage. The pixel structure of the panel 10 is represented by a load LOAD, which is coupled to the first supply voltage VCOM, a source signal SOURCE and a gate signal GATE.

The gate signal GATE (eg, 17V) is coupled to a plurality of scan lines of the scanning panel 10 and used for scanning the plurality of scan lines. When the plurality of scan lines are scanned, the source signal SOURCE (eg, 15V) is coupled to the plurality of source lines of the panel 10 and used to drive the plurality of pixels of the panel 10 to display images. The first supply voltage VCOM (eg 15V) is generated by the first supply circuit 20 times an input voltage. A power supply voltage VDD (eg, 2.3V or 5V) in FIG. 1 is a power supply of a driving chip. Generally, the first supply voltage VCOM is used to resist a disturbance current caused by the source signal SOURCE and the gate signal GATE, resulting in significant power consumption. However, because the potential of the power supply voltage VDD is much lower than the potential of the first supply voltage VCOM, the present invention utilizes the power supply voltage VDD to generate the second supply voltage VCOM0 to resist disturbance current, and the first supply voltage VCOM is used to resist disturbance current. Dramatically reduce power consumption.

Assuming that the power consumption required to use the power supply voltage VDD (for example, 2.3V) to provide the disturbance current is VDD×1mA, the power consumption required to use the first supply voltage VCOM (for example, 15V) to provide the disturbance current is 15÷2.3=6.522, that is 7 times the voltage, so the power consumption increases to 7×VDD×1mA. It can be seen from the above description that the voltage level of the power supply voltage VDD is lower than the voltage level of the first supply voltage VCOM, and the output power consumption of the second supply circuit 21 is lower than that of the first supply circuit 20 . Therefore, the second supply circuit 21 receives the power supply voltage VDD, generates the second supply voltage VCOM0 according to the power supply voltage VDD and the first supply voltage VCOM, and resists the disturbance caused by the source signal SOURCE or the gate signal GATE, so as to achieve the purpose of power saving . Therefore, when the reference voltage generator supplies a positive reference voltage, as long as the power (eg, VDD) received by the second supply circuit 21 is lower than the first supply voltage VCOM, the power consumption required to stabilize the reference voltage can be reduced.

It can be known from the embodiment of FIG. 1 that the negative charging circuit 202 of the reference voltage generator can be used to provide a reference voltage of negative polarity. However, the way of generating the negative voltage VOUT2 is less efficient and consumes more power, that is, an extra capacitor is used to convert the positive voltage to the negative voltage VOUT2. In this way, since the power consumption in the process of generating the negative voltage VOUT2 is relatively large, when the reference voltage generator supplies a negative reference voltage, even if the power (eg VDD) received by the second supply circuit 21 is higher than the first supply voltage VCOM, There is still the effect of reducing the power consumption required to stabilize the reference voltage. Furthermore, the first supply circuit 20 of FIG. 1 may include the positive charging circuit 201 but not the negative charging circuit 202, or the first supply circuit 20 may include the negative charging circuit 202 but not the positive charging circuit 201, and both implementations All of the methods can cooperate with the second supply circuit 21 to achieve the effect of power saving. In addition, it can be known from the embodiment of FIG. 1 that the first supply voltage VCOM must be generated by the first supply circuit 20 and cannot be generated by the second supply circuit 21 according to the power supply voltage VDD.

Referring to FIG. 1 again, the first supply circuit 20 includes a positive charging circuit 201 and a negative charging circuit 202 . The positive charging circuit 201 and the negative charging circuit 202 respectively receive the input voltage, and after doubling the input voltage, a positive voltage VOUT1 and a negative voltage VOUT2 are generated. The input voltage may be the power supply voltage VDD, and the positive charging circuit 201 and the negative charging circuit may receive the same or different input voltages, which are all design options. The positive charging circuit 201 and the negative charging circuit 202 can be applied to the polarity conversion of the plurality of pixels, so the positive voltage VOUT1 output by the positive charging circuit 201 supplies the power required for the plurality of pixels to be positive. The supply voltage VCOM is the positive voltage VOUT1. The negative voltage VOUT2 output by the negative charging circuit 202 supplies the power required for the plurality of pixels to be negative, and the first supply voltage VCOM is the negative voltage VOUT2 at this time.

Furthermore, the input terminals EN1 and EN2 of the positive charging circuit 201 and the negative charging circuit 202 receive a first signal S1 and a second signal S2 respectively. The first signal S1 and the second signal S2 can be generated by the timing controller, or additionally. A circuit is arranged to generate the first signal S1 and the second signal S2. The positive charging circuit 201 and the negative charging circuit 202 are enabled or disabled according to the first signal S1 and the second signal S2 to be in an operating state or a stopped state. The positive charging circuit 201 and the negative charging circuit 202 can be a charge pump or a booster circuit. The reference voltage generator includes a switching circuit 50 . The positive charging circuit 201 and the negative charging circuit 202 are coupled to the first output terminal 1 of the reference voltage generator and the second supply circuit 21 via the switching circuit 50 . In the embodiment of FIG. 1 , a voltage divider circuit 30 is included, and the voltage divider circuit 30 includes a plurality of passive components, such as a plurality of resistors. Therefore, the positive charging circuit 201 and the negative charging circuit 202 of the first supply circuit 20 can be coupled to the second supply circuit 21 via the voltage divider circuit 30 . The switching circuit 50 includes a plurality of switching switches, and the plurality of switching switches are switched to on or off according to the control of the first signal S1 and the second signal S2 respectively. Furthermore, in the embodiment of FIG. 1 , when the first signal S1 is set to be at a high level, the reference voltage generator is controlled to output the positive voltage VOUT1 as the first supply voltage VCOM. On the contrary, when the second signal S2 is at a high level, the reference voltage generator is controlled to output the negative voltage VOUT2 as the first supply voltage VCOM. However, when the first signal S1 and the second signal S2 can be set to a low level, the plurality of switches of the switching circuit 50 can be turned on, and their different settings are still within the scope of the design of the reference voltage generator of the present invention.

The switching circuit 50 is coupled to the first supply circuit 20 , the second supply circuit 21 and the voltage divider circuit 30 , so the first supply voltage VCOM of the first output terminal 1 is the positive voltage VOUT1 or the negative voltage VOUT2 corresponding to the switching of the switching circuit 50 . In addition, the voltage dividing circuit 30 can be disposed in the second supply circuit 21 , so the second supply circuit 21 receives the first supply voltage VCOM as the positive voltage VOUT1 or the negative voltage VOUT2 in response to the switching of the switching circuit 50 . In FIG. 1 , the voltage divider circuit 30 is coupled to the first output terminal 1 , the positive voltage VOUT1 and the negative voltage VOUT2 are fed back to the first supply voltage VCOM to the voltage divider circuit 30 , and the voltage divider circuit 30 divides the positive voltage VOUT1 and the negative voltage VOUT2 The divided voltage is generated by the first supply voltage VCOM. Furthermore, the voltage divider circuit 30 includes a first passive element 301 and a second passive element 302 . The first passive element 301 is coupled between the first output terminal 1 and a reference terminal GND, and the second passive element 302 is coupled between the power supply voltage VDD and the first output terminal 1 . The reference terminal GND is a low voltage level, which is not limited to a zero voltage level or a negative voltage level.

Referring to FIG. 1 again, the second supply circuit 21 includes an operational amplifier circuit 210 . The operational amplifier circuit 210 includes a plurality of input terminals, and the plurality of input terminals respectively receive the power supply voltage VDD, the low voltage, a reference voltage VREF1, VREF2 and the divided voltage. The low voltage is lower than the power supply voltage VDD. The operational amplifier circuit 210 generates the second supply voltage VCOM0 according to the power supply voltage VDD, the reference voltage VREF1 (or VREF2 ) and the divided voltage, thereby raising the voltage level of the first supply voltage VCOM. The operational amplifier circuit 210 generates the second supply voltage VCOM0 according to the low voltage, the reference voltage VREF2 (or VREF1 ) and the divided voltage, and pulls down the voltage level of the first supply voltage VCOM. The voltage dividing circuit 30 is coupled to the first output terminal 1 and the operational amplifier circuit 210 , and generates a divided voltage to the operational amplifier circuit 210 according to the first supply voltage VCOM. The operational amplifier circuit 210 is coupled to two reference voltages VREF1 and VREF2, and the two reference voltages VREF1 and VREF2 can be used to compare the divided voltage of positive polarity and the divided voltage of negative polarity, respectively. Furthermore, the two reference voltages VREF1 and VREF2 are respectively transmitted to the operational amplifier circuit 210 through different switching switches. However, the two reference voltages can be changed to one reference voltage to compare the divided voltages of positive and negative polarities, which is not limited by this embodiment.

Therefore, the operational amplifier circuit 210 calculates a difference between the divided voltage and the reference voltage VREF1 (or VREF2 ), and then generates the second supply voltage VCOM0 according to the difference. Therefore, the second supply voltage VCOM0 will change with the change of the divided voltage, that is, the second supply voltage VCOM0 will decrease (rise) as the divided voltage increases (falls). When the voltage dividing circuit 30 is arranged in the second supply circuit 21, the second supply voltage VCOM0 will decrease (rise) as the first supply voltage VCOM rises (falls). Furthermore, the driving capability of the second supply circuit 21 is greater than the coupling effect of the disturbance current, so when the upper electrode of the capacitor C is charged to raise the potential due to signal disturbance, the lower electrode is discharged to lower the potentials of the upper and lower electrodes.

Furthermore, the withstand voltage range of the operational amplifier circuit 210 is between the power supply voltage VDD and the low voltage of the reference terminal GND, not between the high or negative first supply voltage VCOM and the low voltage. Therefore, the operational amplifier circuit 210 may be a medium voltage component instead of a high voltage component to reduce component mismatch. Moreover, if the power supply capability of the first supply circuit 20 is further improved and the current required for the supply signal disturbance is increased, the overall power consumption will be greatly increased. Therefore, the reference voltage generator of the present invention adds a second supply circuit 21, and the second supply circuit 21 supplies the required current for the signal disturbance according to the power supply voltage VDD. In this way, the power consumption of the second supply circuit 21 is smaller than the power consumption directly supplied by the first supply circuit 20, so as to achieve the purpose of saving power. In addition, the reference voltage generator utilizes the second supply circuit 21 to improve the instantaneous power supply capability under the need of power saving. Therefore, after the first supply voltage VCOM is stabilized, the first supply circuit 20 only needs to provide a small current (eg, to compensate the leakage current of the panel 10 ) to the panel 10 . In this way, the flying capacitor of the first supply circuit 20 can be reduced, and when the power consumption of the flying capacitor is relatively slow, the voltage doubling frequency of the first supply circuit 20 can be further reduced. In addition, after the first supply voltage VCOM is stabilized, the tiny current provided by the first supply circuit 20 is smaller than the dynamic compensation current provided by the second supply circuit 21 . Among them, the compensation current is the current required to resist signal disturbance. In other words, when the level of the first supply voltage VCOM is maintained, the output power consumption of the second supply circuit 21 is higher than the output power consumption of the first supply circuit 20 .

The reference voltage generator of FIG. 1 further includes a control circuit 40 . The control circuit 40 is coupled to the second output terminal 2 and the first supply circuit 20, and controls the first supply circuit 20 to generate a positive voltage VOUT1 and a negative voltage VOUT2 according to the second supply voltage VCOM0. The control circuit 40 includes a positive input terminal (+) and a negative input terminal (-), and the positive input terminal (+) and the negative input terminal (-) are respectively coupled to the switches of the switching circuit 50 . The positive input terminal (+) and the negative input terminal (-) of the control circuit 40 receive a reference voltage VSTOP or a second supply voltage VCOM0 according to the switching of the plurality of switches. The control circuit 40 generates a control signal VC to the first supply circuit 20 according to the reference voltage VSTOP and the second supply voltage VCOM0. Therefore, the reference voltage generator setting control circuit 40 controls the operation of the first supply circuit 20 , and controls the level of the first supply voltage VCOM through the first supply circuit 20 . The level of the reference voltage VSTOP can be set to 50% of the level of the power supply voltage VDD, or the reference voltage VSTOP can be set to a hysteresis voltage, which can modify the setting of the reference voltage VSTOP according to requirements.

When the first signal S1 controls the switch to be turned on, the first supply circuit 20 outputs the positive voltage VOUT1 to the first output terminal 1, and the first supply voltage VCOM is positive. The first supply voltage VCOM is fed back to the second supply circuit 21. The second supply circuit 21 generates a second supply voltage VCOM0 according to the first supply voltage VCOM and the power supply voltage VDD. The second supply voltage VCOM0 is the level of the power supply voltage VDD and is used for Raise the level of the first supply voltage VCOM. At this time, the positive input terminal (+) of the control circuit 40 receives the reference voltage VSTOP, and the negative input terminal (−) receives the second supply voltage VCOM0. Because the second supply voltage VCOM0 is higher than the reference voltage VSTOP, the control circuit 40 generates a low-level control signal VC without controlling the positive charging circuit 201 of the first supply circuit 20 to stop operating. After the first supply voltage VCOM is charged to the level of the positive voltage VOUT1, the second supply circuit 21 controls the second supply voltage VCOM0 to decrease from the level of the power supply voltage VDD to the level of the reference voltage VSTOP. In this way, when the second supply voltage VCOM0 is not greater than the reference voltage VSTOP, the control circuit 40 generates a high-level control signal VC, and controls the positive charging circuit 201 to stop operating.

When the second signal S2 controls the switch to be turned on, the first supply circuit 20 outputs the negative voltage VOUT2 to the first output terminal 1, and the first supply voltage VCOM is negative. The first supply voltage VCOM is fed back to the second supply circuit 21. The second supply circuit 21 generates a second supply voltage VCOM0 according to the first supply voltage VCOM and the power supply voltage VDD. The second supply voltage VCOM0 is at a low voltage level and is used to pull Low level of the first supply voltage VCOM. At this time, the positive input terminal (+) of the control circuit 40 receives the second supply voltage VCOM0, and the negative input terminal (-) receives the reference voltage VSTOP. Because the reference voltage VSTOP is higher than the second supply voltage VCOM0, the control circuit 40 generates a low-level control signal VC, and does not control the negative charging circuit 202 of the first supply circuit 20 to stop operating. After the first supply voltage VCOM is charged to the level of the negative voltage VOUT2, the second supply circuit 21 controls the second supply voltage VCOM0 to be pulled from the low voltage level to the reference voltage VSTOP level. In this way, when the second supply voltage VCOM0 is not less than the reference voltage VSTOP, the control circuit 40 generates a high-level control signal VC, and controls the negative charging circuit 202 to stop operating.

In addition, the control circuit 40 may include a comparator CMP, and the comparator CMP receives the power supply voltage VDD and the low voltage. In this way, the comparator CMP generates the high-level control signal VC according to the power supply voltage VDD, the second supply voltage VCOM0 and the reference voltage VSTOP. The comparator CMP generates a low-level control signal VC according to the low voltage, the second supply voltage VCOM0 and the reference voltage VSTOP.

Please refer to FIG. 1 and FIG. 2 together. FIG. 2 is a waveform diagram of the circuit diagram of FIG. 1 . As shown, at time t1, the positive charging circuit 201 of the first supply circuit 20 is enabled by the first signal S1, and the negative charging circuit 202 is disabled by the second signal S2. The output of the first supply circuit 20 switches to the positive voltage VOUT1, and waits for the first supply voltage VCOM to be charged to the level of the positive voltage VOUT1. After being fully charged, the second supply circuit 21 controls the second supply voltage VCOM0 to decrease to the level of the reference voltage VSTOP. In this way, the comparator CMP of the control circuit 40 stops the voltage doubling operation of the positive charging circuit 201 (assuming a charge pump). At time t2, the source signal SOURCE (or the gate signal GATE) is positive, so the source signal SOURCE perturbs the first supply voltage VCOM and pulls up (or positive voltage) the potential of the capacitor voltage VCAP. In order to stabilize the potential of the first supply voltage VCOM, the second supply voltage VCOM0 discharges the reference terminal GND through the second supply circuit 21, and the voltage of the capacitor voltage VCAP increases.

At time t3, the source signal SOURCE (or the gate signal GATE) is negative, so the source signal SOURCE perturbs the first supply voltage VCOM and pulls down (or negatively applies) the potential of the capacitor voltage VCAP. In order to stabilize the potential of the first supply voltage VCOM, the second supply circuit 21 generates the second supply voltage VCOM0 according to the power supply voltage VDD, and charges the capacitor C to increase the potential of the first supply voltage VCOM. When the level of the second supply voltage VCOM0 is greater than the level of the reference voltage VSTOP, the voltage doubling operation of the first supply circuit 20 is turned on. In this way, the first supply circuit 20 can supply the current required by the capacitor C. At time t4, the output of the first supply circuit 20 switches to the negative voltage VOUT2, and waits for the first supply voltage VCOM to be charged to the level of the negative voltage VOUT2. After being fully charged, the second supply circuit 21 controls the second supply voltage VCOM0 to increase to the level of the reference voltage VSTOP. In this way, the comparator CMP of the control circuit 40 stops the voltage doubling operation of the negative charging circuit 202 (assuming a charge pump).

At time t5, the source signal SOURCE (or the gate signal GATE) is positive, so the source signal SOURCE perturbs the first supply voltage VCOM and pulls up (or positive voltage) the potential of the capacitor voltage VCAP. In order to stabilize the potential of the first supply voltage VCOM, the second supply voltage VCOM0 is discharged to the reference terminal GND through the second supply circuit 21 . When the level of the second supply voltage VCOM0 is lower than the level of the reference voltage VSTOP, the voltage doubling operation of the second supply circuit 21 is turned on to supply the current required by the capacitor C. At time t6, the source signal SOURCE (or the gate signal GATE) is negative, so the source signal SOURCE perturbs the first supply voltage VCOM and pulls down (or negatively applies) the potential of the capacitor voltage VCAP. In order to stabilize the potential of the first supply voltage VCOM, the second supply circuit 21 generates the second supply voltage VCOM0 according to the power supply voltage VDD, and charges the capacitor C to increase the potential of the first supply voltage VCOM. When the level of the second supply voltage VCOM0 is greater than the level of the reference voltage VSTOP, the voltage doubling operation of the second supply circuit 21 is stopped.

At time t7, the output of the first supply circuit 20 switches to the positive voltage VOUT1, and waits for the first supply voltage VCOM to be charged to the level of the positive voltage VOUT1. After being fully charged, the second supply circuit 21 controls the second supply voltage VCOM0 to decrease to the level of the reference voltage VSTOP. In this way, the comparator CMP of the control circuit 40 stops the voltage doubling operation of the positive charging circuit 201 .

Please refer to FIG. 3 , which is a circuit diagram of a second embodiment of the reference voltage generator of the display device of the present invention. As shown, the reference voltage generator may include a third supply circuit 22 . The third supply circuit 22 is coupled to the first output terminal 1 and generates a third supply voltage V22 to the first output terminal 1 . When the third supply circuit 22 supplies power, the output of the second supply circuit 21 can be set to the power supply voltage VDD, a floating state or a low voltage of the reference terminal GND, so as to prevent the operation of the third supply circuit 22 from discharging the capacitor voltage VCAP . The third supply circuit 22 can be used for the pre-charging mechanism of the panel 10, or directly set the level of the first supply voltage VCOM. Therefore, the third supply voltage V22 can be the power supply voltage VDD, the equalization voltage or the low voltage of the reference terminal GND, which can be appropriately selected. Furthermore, the third supply circuit 22 includes a plurality of switches, which are controlled by a plurality of signals S3, S4, . . . SN to transmit a plurality of voltages V3, V4, .

Please refer to FIG. 4 , which is a circuit diagram of a third embodiment of the reference voltage generator of the display device of the present invention. As shown in the figure, four switching switches are added between the output terminals 1 and 2 of the reference voltage generator and the capacitor C, and between the capacitor C and the panel 10 . That is, the switching circuit 50 adds four switching switches. In this way, the switching circuit 50 is coupled to the first supply circuit 20 , the second supply circuit 21 , the first output terminal 1 and the second output terminal 2 . When the first supply circuit 20 generates the first supply voltage VCOM to the first output terminal 1 according to the switching of the four switches (ie the switching circuit 50 ), the second supply circuit 21 generates the second supply voltage VCOM according to the switching of the four switches The voltage VCOM0 is supplied to the second output terminal 2 . When the first supply circuit 20 generates the first supply voltage VCOM to the second output terminal 2 according to the switching of the four switches, the second supply circuit 21 generates the second supply voltage VCOM0 to the first according to the switching of the four switches output 1. The four switches are also controlled by the first signal S1 and the second signal S2. Under the switching of the four switching switches, there is no need to discharge the voltage of the capacitor voltage VCAP completely, and then turn it into a positive or negative voltage.

Please refer to FIG. 5 , which is a waveform diagram of the circuit diagram of FIG. 4 . As shown in the figure, the difference between the embodiment of FIG. 5 and the embodiment of FIG. 2 is that the capacitor voltage VCAP is positive during the period from time t4 to time t7 in FIG. 5 , while the capacitor voltage VCAP is negative during the period from time t4 to time t7 in FIG. 2 sex. Furthermore, compared with the time t7 in FIG. 2 at time t7 in FIG. 5 , the second supply voltage VCOM0 in FIG. 5 will slowly return to the current level due to the leakage current of the panel 10 or the transition of the source signal SOURCE (or the gate signal GATE). to the level of the reference voltage VSTOP. The rest of the technical content is similar to the embodiment in FIG. 2 and will not be repeated.

Please refer to FIG. 6 , which is a circuit diagram of a fourth embodiment of the reference voltage generator of the display device of the present invention. As shown in the figure, the embodiment of FIG. 6 is based on the embodiment of FIG. 4 by adding the third supply circuit 22 of the embodiment of FIG. 3 . Therefore, the embodiment in FIG. 6 is a variation of the above-mentioned embodiment, and details are not described herein again.

Please refer to FIG. 7 , which is a circuit diagram of a fifth embodiment of the reference voltage generator of the display device of the present invention. As shown in the figure, the reference voltage generator includes an adjustment circuit, and the adjustment circuit includes a comparator 60 and a plurality of switching switches (switching circuits 50 ). The two input terminals of the comparator 60 are coupled to the switches, and the switches are coupled to the first signal S1 and the second signal S2. The first signal S1 and the second signal S2 control the switching of the switches to transmit the second supply voltage VCOM0 , the first reference voltage VDIS_L or the second supply voltage VCOM0 and the second reference voltage VDIS_H to the two input terminals of the comparator 60 . Therefore, the comparator 60 compares the second supply voltage VCOM0 with the first reference voltage VDIS_L or the second supply voltage VCOM0 and the second reference voltage VDIS_H to generate an adjustment signal V60. In an embodiment of the present invention, the second reference voltage VDIS_H is higher than the first reference voltage VDIS_L. The comparator 60 is coupled to an adjustment switch 62 , so the adjustment signal V60 controls the switching of the adjustment switch 62 . The adjustment switch 62 is coupled between the first output terminal 1 and the reference terminal GND. The comparator 60 is coupled to the power supply voltage VDD and the ground level GND of the reference terminal GND. After the adjustment circuit controls the discharge of the first supply voltage VCOM, the potential of the second supply voltage VCOM0 can be reset. The potential of the second supply voltage VCOM0 can be reset to the level of the reference voltage VSTOP or other voltage levels.

For example, when the common voltage (the first supply voltage VCOM) is the positive voltage VOUT1 and the level increases while the second supply voltage VCOM0 maintains the level of the common voltage (the first supply voltage VCOM), the comparator 60 compares the second supply voltage VCOM0 with the The first reference voltage VDIS_L. When the second supply voltage VCOM0 is lower than the first reference voltage VDIS_L, the adjustment signal V60 is at a high level and the adjustment switch 62 is turned on. In this way, the potential of the first supply voltage VCOM decreases, and the second supply circuit 21 controls the second supply voltage VCOM0 to be higher than the first reference voltage VDIS_L according to the feedback first supply voltage VCOM, so as to prevent the second supply voltage VCOM0 from being too low , in an embodiment of the present invention, the first reference voltage VDIS_L may be slightly higher than the ground level of the ground terminal GND. Alternatively, when the common voltage (the first supply voltage VCOM) is the negative voltage VOUT02 and the level is pulled down (the voltage drop increases) and the second supply voltage VCOM0 maintains the level of the common voltage (the first supply voltage VCOM), the comparator 60 Comparing the second supply voltage VCOM0 with the second reference voltage VDIS_H, when the second supply voltage VCOM0 is higher than the second reference voltage VDIS_H, the adjustment signal V60 is at a high level and the adjustment switch 62 is turned on. In this way, the potential of the first supply voltage VCOM increases, and the second supply circuit 21 controls the second supply voltage VCOM0 to be lower than the second reference voltage VDIS_H according to the feedback first supply voltage VCOM, so as to prevent the second supply voltage VCOM0 from being too high , in an embodiment of the present invention, the second reference voltage VDIS_H may be slightly lower than the level of the power supply voltage VDD. The above two control methods can cooperate with the operation of the positive charging circuit 201 and the negative charging circuit 202, and when the level of the second supply voltage VCOM0 reaches the upper limit or the lower limit, the first supply voltage VCOM is discharged to restore the second supply voltage VCOM. The level of the supply voltage VCOM0. Therefore, the potential of the second supply voltage VCOM can be restored to a specific voltage level. The embodiment does not limit the scope of the specific voltage level.

To sum up, the present invention discloses a reference voltage generator for a display device, which includes a first supply circuit and a second supply circuit. The first supply circuit is coupled to a first output terminal of the reference voltage generator, and generates a first supply voltage to the first output terminal; and the second supply circuit is coupled to the first output terminal, and the first supply voltage is fed back to the second output terminal. The supply circuit generates a second supply voltage to a second output terminal of the reference voltage generator according to the first supply voltage. Furthermore, the above-mentioned embodiments illustrate that the first supply circuit 20 and the second supply circuit 21 respectively supply the power required for the output of the reference voltage generator, and generate a stable reference voltage under the requirement of power saving, so as to improve the display device's performance. Display quality.

However, the above descriptions are only some of the embodiments of the present invention, and are not intended to limit the scope of the present invention. Therefore, all the structures, circuits, features and spirits described in the scope of the claims of the present invention are listed. All equivalent changes and modifications should be included within the scope of the claims of the present invention.

Claims (10)

1. A reference voltage generator for a display device, comprising: a first supply circuit, coupled to a first output terminal of the reference voltage generator, to generate a first supply voltage to the first output terminal; and a second supply circuit, coupled to the first output terminal, the first supply voltage is fed back to the second supply circuit, and the second supply circuit receives a supply voltage and generates according to the supply voltage and the first supply voltage a second supply voltage, the supply voltage being lower than the first supply voltage, the second supply voltage to a second output terminal of the reference voltage generator; The reference voltage generator charges a capacitor according to the first supply voltage, the capacitor stores a capacitor voltage, the capacitor voltage determines a shared voltage of the display device, and the second supply voltage maintains the level of the shared voltage. 2 . The reference voltage generator of claim 1 , wherein when the level of the first supply voltage is maintained, the output power consumption of the second supply circuit is higher than that of the first supply circuit. 3 . output power consumption. 3. The reference voltage generator of claim 1, wherein the second supply circuit comprises: An operational amplifier circuit includes a plurality of input terminals, the plurality of input terminals respectively receive the power supply voltage, a low voltage, a reference voltage and a divided voltage, the operational amplifier circuit is based on the power supply voltage, the reference voltage and the The divided voltage generates the second supply voltage and pulls up the voltage level of the first supply voltage, and the operational amplifier circuit generates the second supply voltage and pulls down the first supply voltage according to the low voltage, the reference voltage and the divided voltage A voltage level of a supply voltage, the low voltage is lower than the power supply voltage. 4. The reference voltage generator of claim 3, wherein the second supply circuit comprises: A voltage divider circuit is coupled to the first output terminal and the operational amplifier circuit, the first supply voltage is fed back to the voltage divider circuit, and the divided voltage is generated to the operational amplifier circuit according to the first supply voltage. 5. The reference voltage generator of claim 1, wherein: A switching circuit is coupled to the first supply circuit, the second supply circuit and a voltage divider circuit, and the first supply voltage of the first output terminal is a positive voltage or a negative voltage corresponding to the switching of the switching circuit. 6. The reference voltage generator of claim 1, wherein: A control circuit is coupled to the second output terminal and the first supply circuit, and controls the first supply circuit to generate a positive voltage or a negative voltage according to the second supply voltage. 7 . The reference voltage generator of claim 6 , wherein the control circuit comprises a positive input terminal and a negative input terminal, and the positive input terminal and the negative input terminal are respectively coupled to a plurality of switches. 8 . , the positive input terminal and the negative input terminal receive a reference voltage or the second supply voltage according to the switching of the switches, and generate a control signal to the first supply circuit according to the reference voltage and the second supply voltage . 8. The reference voltage generator of the display device according to claim 1, characterized in that, comprising: A third supply circuit is coupled to the first output terminal, and when a third supply voltage is generated to the first output terminal, the output of the second supply circuit is in a floating state. 9. The reference voltage generator of claim 1, wherein: a switching circuit coupled to the first supply circuit, the second supply circuit, the first output terminal and the second output terminal, the first supply circuit generates the first supply voltage to the When the first output terminal is used, the second supply circuit generates the second supply voltage to the second output terminal according to the switching of the switching circuit, and the first supply circuit generates the first supply voltage to the second output terminal according to the switching of the switching circuit. When the second output terminal is used, the second supply circuit generates the second supply voltage to the first output terminal according to the switching of the switching circuit. 10. The reference voltage generator of claim 1, wherein: an adjustment circuit coupled to the second output terminal to receive the second supply voltage, and to receive a first reference voltage or a second reference voltage according to the second supply voltage, the first reference voltage or the second supply voltage, the second reference voltage to generate an adjustment signal; and an adjustment switch, coupled to the adjustment circuit and between the first output terminal and a reference terminal, the adjustment signal controls the adjustment switch to be turned on to lower or raise the potential of the first supply voltage; Wherein, the second supply circuit controls the potential of the second supply voltage to increase or decrease according to the feedback of the first supply voltage.

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