CN110034678A - Single inductance double-polarity control type of voltage step-up/down converter and its control method - Google Patents

Abstract

The invention discloses a kind of control methods, single inductance double-polarity control (SIBO) type of voltage step-up/down converter of control one, the list inductance double-polarity control type of voltage step-up/down converter includes the first switch being coupled between an input and a first node, the second switch being coupled between the first node and ground terminal, the third switch being coupled between a second node and ground terminal, one the 4th switch being coupled between the second node and one first output node for exporting the positive output, one the 5th switch being coupled between the first node and one second output node for exporting the negative output, and be coupled in this first and the second node between an inductance, the control method include: control this first with the third switch conduction, with the inductance that magnetizes；Control this first with the 4th switch conduction, to generate the positive output；And the third and the 5th switch conduction are controlled, to generate the negative output.

Description

Single-inductor bipolar output buck-boost converter and control method thereof

technical field

The present invention relates to a single-inductor bipolar output (SIBO, Single Inductor Bipolar Output) buck-boost converter and a control method thereof.

Background technique

Mobile systems and displays require effective long-term battery use. In addition, display quality is one of the important performance characteristics, but it cannot be sacrificed even in heavy load current fluctuations, fast input voltage fluctuations and switching noise of DC-DC converters.

Active matrix OLED (AMOLED) displays are becoming more and more common in mobile display applications because the advantages of active matrix OLEDs are high display quality, low power consumption and low material cost. Active matrix OLED panels usually require positive and negative power supplies with different voltages. In addition, the required positive voltage and negative voltage power supply output ripples must be small enough to avoid the generation of water ripples and damage the display quality of the panel. Different panels may have different output current and voltage requirements, usually depending on panel size, number of pixels, display quality, etc.

Figure 1 shows an existing single-inductor AMOLED power supply, which is a two-stage SIBO converter. As shown in FIG. 1 , the conventional two-stage SIBO converter 100 includes: a synchronous buck-boost circuit 120 , a charge pump 140 , an inductor L11 and capacitors C11 - C15 . Capacitors C11-C13 are decoupling capacitors. Capacitors C14-C15 are fly capacitors. The conventional two-stage SIBO converter 100 generates a positive output Vop and a positive current Iop to drive the load 160 , and generates a negative output Von and a negative current Ion to drive the load 180 . The input terminal provides the input voltage Vin and the input current Iin.

According to the relative relationship between the input voltage Vin and the output voltage Vop, the synchronous buck-boost circuit 120 can operate in buck, buck-boost, and boost modes. The input voltage Vin is usually provided by a lithium battery. The voltage range of the input voltage Vin ranges from 3.0V to 4.5V, and the required value of the output voltage Vop is related to the size of the AMOLED panel, the display brightness and the driver chip. The output voltage Vop Commonly used typical values include 4.6V, 3.3V, 2.8V and 2.5V, etc.

The charge pump 140 is used to generate the negative output Von from the positive output Vop. Charge pump 140 may have many output steps, such as, but not limited to, -1x and -1.5x. Using the flying capacitor C14, the charge pump 140 can achieve -1x, ie Von=Vop*(-1). Using the flying capacitors C14 and C15, the charge pump 140 can achieve -1.5x, that is, Von=Vop*(-1.5). The negative output Von can be set by the converter digital interface to -1x to -1.5x of the positive output Vop to meet the high brightness requirements of AMOLED displays.

It can be seen from Figure 1 that the generation of the positive output Vop and the negative output Von are independently controlled.

FIG. 2 shows a graph of the energy conversion efficiency of the two-stage SIBO converter 100 . The energy conversion efficiency Eff is defined as follows:

As shown in FIG. 2, when Vop is equal to 2.8(V), the existing two-stage SIBO converter 100 is at Von=Vop*(-1)=2.8*(-1)=-2.8(V) or Von=Vop* (-1.5)=2.8*(-1.5)=-4.2(V) has the best energy conversion efficiency. However, when Von is not equal to -2.8(V) or -4.2(V), the energy conversion efficiency of the existing two-stage SIBO converter 100 is not good. Thus, there is a need to improve the energy conversion efficiency of existing two-stage SIBO converters.

SUMMARY OF THE INVENTION

According to an embodiment of the present application, a control method is proposed to control a single inductor bipolar output (SIBO) buck-boost converter to generate a positive output and a negative output. The SIBO buck-boost converter includes a SIBO buck-boost converter A buck power stage, the SIBO buck-boost power stage includes a first switch coupled between an input and a first node, a second switch coupled between the first node and ground, and a second node coupled to a third switch between the ground and a fourth switch coupled between the second node and a first output node that outputs the positive output, a fourth switch coupled to the first node and a second output that outputs the negative output A fifth switch between nodes, and an inductor coupled between the first and the second node, the control method includes: controlling the first and the third switch to conduct, and the second and the fourth turning off the fifth switch to magnetize the inductor in an inductor magnetizing operation phase; controlling the first and the fourth switch to be turned on, and the second, the third and the fifth switch to be turned off to generate the positive output is in a positive output charging operation phase; and controlling the third and the fifth switch to be turned on, and the first, the second and the fourth switch to be turned off, so as to generate the negative output to charge a negative output operating phase.

According to another embodiment of the present application, a single inductor bipolar output (SIBO) buck-boost converter is provided to generate a positive output and a negative output, the SIBO buck-boost converter includes: a SIBO buck-boost control and a SIBO buck-boost power stage coupled to the SIBO buck-boost controller, the SIBO buck-boost power stage including a first switch coupled between an input and a first node, coupled to the first a second switch between the node and ground, a third switch coupled between a second node and ground, a fourth switch coupled between the second node and a first output node outputting the positive output , a fifth switch coupled between the first node and a second output node outputting the negative output, and an inductor coupled between the first and second nodes. The SIBO buck-boost controller controls the first and the third switches to be turned on, and the second, the fourth and the fifth switches to be turned off, so as to magnetize the inductor in an inductor magnetizing operation phase. The SIBO buck-boost controller controls the first and the fourth switches to be turned on, and the second, the third and the fifth switches to be turned off to generate the positive output during a positive output charging operation phase. The SIBO buck-boost controller controls the third and the fifth switches to be turned on, and the first, the second and the fourth switches to be turned off, so as to generate the negative output in a negative output charging operation phase.

In order to have a better understanding of the above-mentioned and other aspects of the present invention, the following specific examples are given and described in detail as follows in conjunction with the accompanying drawings:

Description of drawings

Figure 1 (Prior Art) shows an existing two-stage SIBO converter.

FIG. 2 (Prior Art) shows a graph of the energy conversion efficiency of the prior art two-stage SIBO converter of FIG. 1 .

FIG. 3 shows a circuit diagram of a SIBO buck-boost converter according to an embodiment of the present invention.

FIG. 4 shows the four operating phases P1-P4 of the SIBO buck-boost converter of FIG. 3 .

FIG. 5 shows a timing diagram of various signals of the SIBO buck-boost converter of FIG. 3 .

FIG. 6 shows a comparison diagram of the energy conversion efficiency between the embodiment of the present invention and the existing two-stage SIBO converter.

Among them, reference numerals:

Two-stage SIBO converter 100 Synchronous buck-boost circuit 120

Charge Pump 140 Inductor L11

Capacitor C11-C15 Positive output Vop

Positive current Iop load 160, 180

Negative output Von Negative current Ion

Input voltage Vin Input current Iin

SIBO Buck-Boost Converter 300 SIBO Buck-Boost Controller 310

SIBO Buck-Boost Power Stage 350

Waveform generator 312 Compensation error amplifiers 314 and 316

Adders 318 and 319 Buffers 320 and 322

Comparators 324, 326 and 328 Voltage Generator 330

PSM circuit 332 PWM logic 334

Resistors Rs, R1, R2 and R3

Reference voltage Vref, VCL

Feedback signal Vop_FB, Von_FB

Output signals VEAp, VEAn, VEApn, Vsum, Cp, Cn, Cpn

Inductor current IL

Control Signals S1, S2, S3, SP and SN

Inductor L31

Switches SW1, SW2, SW3, SWP and SWN

Capacitors C31, C32 and C33 Nodes N1, N2

Load 360, 380 P1-P5 operating phase

Detailed ways

The technical terms in this specification refer to the common terms in the technical field. If some terms are described or defined in this specification, the explanations or definitions in this specification shall prevail. Each embodiment of the present disclosure has one or more technical features. Under the premise of possible implementation, those skilled in the art can selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.

FIG. 3 shows a circuit diagram of a single inductor bipolar output (SIBO, Single Inductor Bipolar Output) buck-boost converter 300 according to an embodiment of the present invention. The SIBO buck-boost converter 300 includes: a SIBO buck-boost inverting controller 310 and a SIBO buck-boost inverting power stage 350 .

SIBO buck-boost controller 310 includes: waveform generator 312, compensation error amplifiers 314 and 316, adders 318 and 319, buffers 320 and 322, comparators 324, 326 and 328, voltage generator 330, PSM (pulse omitted) mode, pulse skipping mode) circuit 332 and PWM (pulse width modulation, pulse width modulation) logic 334 .

Waveform generator 312 is coupled to summer 318 . The waveform generator 312 generates a periodic waveform signal, such as, but not limited to, a ramp signal. The periodic waveform signal generated by the waveform generator 312 is input to the adder 318 .

Compensated error amplifier 314 is coupled to a voltage divider circuit including resistors R1, R2 and R3. The compensation error amplifier 314 receives the reference voltage Vref and the feedback signal Vop_FB. The feedback signal Vop_FB is related to the positive output Vop. The compensation error amplifier 314 inputs the output signal VEAp to the buffer 320 , the comparator 324 and the PSM circuit 332 . That is, the output signal VEAp (also referred to as the first compensated error amplifier output signal) generated by the compensation error amplifier 314 is responsive to the positive output Vop.

Similarly, compensated error amplifier 316 is coupled to a voltage divider circuit that includes resistors R1, R2, and R3. The compensation error amplifier 316 receives the ground terminal and the feedback signal Von_FB, and the feedback signal Von_FB is related to the negative output Von. The compensation error amplifier 316 inputs the output signal VEAn to the buffer 322 , the comparator 328 and the PSM circuit 332 . That is, the output signal VEAn (also referred to as the second compensated error amplifier output signal) generated by the compensation error amplifier 316 is responsive to the negative output Von.

The adder 318 adds the periodic waveform signal generated by the waveform generator 312 to the voltage IL*Rs, where IL represents the inductor current of the inductor L31. The output signal Vsum (ie, the sum signal) of the adder 318 is output to the comparators 324 , 326 and 328 .

The buffers 320 and 322 buffer the output signals VEAp and VEAn of the compensation error amplifiers 314 and 316, respectively. The outputs of buffers 320 and 322 are input to adder 319 .

The adder 319 adds the output signals of the buffers 320 and 322 (ie, VEAp and VEAn) to obtain the output signal VEApn (ie, the third compensation error amplifier output signal), which is input to the comparator 326 (ie, VEApn=VEAp +VEAn).

The comparator 324 is used for receiving the output signal Vsum output by the adder 318 and the output signal VEAp output by the compensation error amplifier 314 . The output signal Cp of the comparator 324 (also referred to as the first comparison signal) is input to the PWM logic 334 . When the output signal Vsum is higher than or equal to the output signal VEAp, the output signal Cp is logic high.

The comparator 326 is used for receiving the output signal Vsum output by the adder 318 and the output signal VEApn output by the adder 319 . The output signal Cpn (also referred to as the third comparison signal) of the comparator 326 is input to the PWM logic 334 . When the output signal Vsum is higher than or equal to the output signal VEApn, the output signal Cpn is logic high.

The comparator 328 is used for receiving the output signal Vsum output by the adder 318 and the output signal VEAn output by the compensation error amplifier 316 . The output signal Cn (also referred to as the second comparison signal) of the comparator 328 is input to the PWM logic 334 . When the output signal Vsum is higher than or equal to the output signal VEAn, the output signal Cn is logic high.

The voltage generator 330 is used for generating the reference voltages Vref and VCL, which are respectively output to the compensation error amplifier 314 and the PSM circuit 332 .

The PSM circuit 332 is used for receiving the output signal VEAp generated by the compensation error amplifier 314 , the output signal VEAn generated by the compensation error amplifier 316 , and the reference voltage VCL generated by the voltage generator 330 . The output of PSM circuit 332 is input to PWM logic 334 . Details of the PSM circuit 332 are omitted here.

Based on voltage IL*RS, output signals Cp, Cpn, and Cn (generated by comparators 324, 326, and 328, respectively), and the output signal of PSM circuit 332, PWM logic 334 generates control signals S1, S2, S3, SP, and SN . Details of the PWM logic 334 are omitted here.

That is, according to the positive output Vop, the negative output Von and the inductor current of the inductor L31, the SIBO buck-boost controller 310 generates the control signals S1, S2, S3, SP and SN.

The SIBO buck-boost power stage 350 includes an inductor L31, switches SW1, SW2, SW3, SWP, and SWN, and capacitors C31, C32, and C33. Capacitors C31, C32 and C33 are decoupling capacitors.

The switch SW1 is controlled by the control signal S1. The switch SW2 is controlled by the control signal S2. The switch SW3 is controlled by the control signal S3. The switch SWP is controlled by the control signal SP. The switch SWN is controlled by the control signal SN.

The switch SW1 is coupled between the input voltage Vin and the node N1. The switch SW2 is coupled between the node N1 and the ground terminal GROUND. The switch SW3 is coupled between the node N2 and the ground terminal GROUND. The switch SWP is coupled between the node N2 and the first output node (for outputting the positive output Vop). The switch SWN is coupled between the node N1 and the second output node (for outputting the negative output Von). Inductor L31 is coupled between nodes N1 and N2. The capacitor C31 is coupled between the input voltage Vin and the ground terminal GROUND. The capacitor C32 is coupled between the positive output Vop and the ground terminal GROUND. The capacitor C33 is coupled between the negative output Von and the ground terminal GROUND.

The positive output Vop, above 0V, is generated on capacitor C32. Positive output Vop can drive load 360 with positive current Iop. The negative output Von, below 0V, is generated on capacitor C33. The negative output Von can drive the load 380 with the negative current Ion.

FIG. 4 shows four operating phases P1-P4 of the SIBO buck-boost converter 300 of FIG. 3 . FIG. 5 shows a timing diagram of various signals (IL, VEAp, VEAn, VEApn, and Vsum) of the SIBO buck-boost converter 300 of FIG. 3 . As shown in FIG. 5 , the SIBO buck-boost converter 300 has two operating modes: continuous conduction mode (CCM) and discontinuous conduction mode (DCM).

In the CCM mode, the inductor current IL of the inductor L31 is continuous. Under heavy loads, with proper feedback control, the SIBO buck-boost converter 300 enters CCM mode.

Conversely, at light loads, with proper feedback control, the SIBO buck-boost converter 300 enters DCM mode. At light loads, the average current of the inductor current IL is small and may discharge to zero. When the average current of the inductor current IL is close to 0, the switches SW1, SWP and SWN will be turned off, however, the five switches SW1, SW2, SW3, SWP and SWN can be turned on or off, and the inductor L31 does not absorb energy Energy is also not released until the next clock cycle. This can be achieved by floating one or both ends of the inductor L31, or by short-circuiting the two ends of the inductor L31 to each other. For example, switches SW2, SW3, SWP, and SWN can be turned off, while switch SW1 can be turned on. Alternatively, switches SW1, SWP and SWN may be turned off, while switches SW2 and SW3 may be turned on.

Please refer to Figure 4 and Figure 5. In the first operating phase P1 , the switches SW1 and SW3 are turned on and the switches SW2 , SWP and SWN are turned off, which are denoted by “P1, 13” in FIG. 4 . "P1, 13" means that in the first operation phase P1, the switches SW1 and SW3 are turned on. Therefore, in the first operation phase P1 , the inductor current IL flows from the input voltage Vin to the ground terminal GROUND through the inductor L31 and the switches SW1 and SW3 to charge the inductor L31 . Therefore, the first operation phase P1 is the inductor charging operation phase. The duty cycle of the inductor charging operation phase (ie, P1 ) can be controlled in response to the feedback signal Von_FB.

In the second operation phase P2, the switches SW1 and SWP are turned on, while the switches SW2, SW3 and SWN are turned off, which are marked as “P2, 1P” in FIG. 4 . "P2, 1P" means that in the second operation phase P2, the switches SW1 and SWP are turned on. Therefore, in the second operation phase P2, the inductor current flows from the inductor L31 and flows to the ground terminal GROUND through the switch SP and the capacitor C32. The inductor L31 is magnetized if the input voltage Vin is higher than the output voltage Vop, while the inductor L31 discharges energy if the input voltage Vin is lower than the output voltage Vop. Therefore, the capacitor C32 is charged, and the positive output Vop is generated on the capacitor C32. Therefore, the second operation phase P1 is a positive output energizing operation phase. The duty cycle of the positive output charging operation phase (ie, P2 ) can be controlled in response to the feedback signals Vop_FB and Von_FB.

In the third operation phase P3 , the switches SW2 and SWP are turned on, while the switches SW1 , SW3 and SWN are turned off, which are marked as “P3, 2P” in FIG. 4 . "P3, 2P" means that in the third operation phase P3, the switches SW2 and SWP are turned on. Therefore, the third operation phase P3 is the inductor discharge energy operation phase, and the inductor current is discharged from the current L31 to the capacitor C32.

In the fourth operating phase P4 , the switches SW3 and SWN are turned on and the switches SW1 , SW2 and SWP are turned off, which is marked as “P4, 3N” in FIG. 4 . "P4, 3N" means that in the fourth operation phase P4, the switches SW3 and SWN are turned on. Therefore, in the fourth operation phase P4, the inductor L31 releases the stored energy, and the inductor current IL flows from the inductor L31 to the ground terminal GROUND through the switch SN and the capacitor C33. Therefore, the capacitor C33 is charged, and the negative output Von is generated on the capacitor C33. The fourth operation phase P4 is a negative output energizing operation phase.

In the fifth operation phase P5 (not shown in FIG. 4 ), at least one end of the inductance L31 is floating, or the two ends of the inductance L31 are short-circuited to each other. For example, switches SW1, SWN and SWP are all off, while switches SW2 and SW3 can be on or off. The fifth operation phase P5 is the 0 inductor current operation phase. In the fifth operation phase P5, at least one end of the inductance L31 is floating, and thus, the inductance is neither charged nor discharged.

Figure 5 also shows 5 operating modes, namely, the operating mode under Vin>Vop and heavy load (CCM), the operating mode under Vin ≈ Vop and heavy load (CCM), the operating mode when Vin < Vop and heavy load (CCM), operation mode at Vin>Vop and light load (DCM), and operation mode at Vin<Vop and light load (DCM).

As shown in FIG. 5 , in the operation mode under the condition of Vin>Vop and heavy load (CCM), in the first operation phase P1, the switches SW1 and SW3 are turned on, so the inductor current IL increases. In the second operation phase P2, the switches SW1 and SWP are turned on, the inductor current IL increases, and the positive output Vop is generated on the capacitor C32. In the fourth operation phase P4, the switches SW3 and SWN are turned on, so the inductor current IL decreases. In the fourth operating phase P4, the negative output Von is generated on the capacitor C33.

Similarly, in the operation mode under Vin≈Vop and heavy load (CCM), in the first operation phase P1, the switches SW1 and SW3 are turned on, so the inductor current IL increases. In the second operation phase P2, the switches SW1 and SWP are turned on, but the inductor current IL remains the same, and the positive output Vop is generated on the capacitor C32. In the fourth operation phase P4, the switches SW3 and SWN are turned on, so the inductor current IL decreases. In the fourth operating phase P4, the negative output Von is generated on the capacitor C33.

Similarly, in the operation mode of Vin<Vop and heavy load (CCM), in the first operation phase P1, the switches SW1 and SW3 are turned on, so the inductor current IL increases. In the second operation phase P2, the switches SW1 and SWP are turned on, but the inductor current IL decreases, and the positive output Vop is generated on the capacitor C32. In the fourth operation phase P4, the switches SW3 and SWN are turned on, so the inductor current IL decreases. In the fourth operating phase P4, the negative output Von is generated on the capacitor C33.

The operating phases P1 , P2 and P4 in the operating mode under Vin>Vop and light load (DCM) are similar to the operating phases P1 , P2 and P4 in the operating mode under Vin>Vop and heavy load (CCM). However, after the fourth operating phase P4, the inductor current IL approaches zero. In the fifth operation phase P5, the inductor L31 is not magnetized, which can be achieved by floating at least one end of the inductor L31, or short-circuiting the two ends of the inductor L31.

The operating phases P1 , P2 and P4 in the operating mode under Vin<Vop and light load (DCM) are similar to the operating phases P1 , P2 and P4 in the operating mode under Vin<Vop and heavy load (CCM). However, after the fourth operating phase P4, the inductor current IL approaches zero. In the fifth operation phase P5, the inductor L31 is not magnetized, which can be achieved by floating at least one end of the inductor L31, or short-circuiting the two ends of the inductor L31.

Therefore, in the present embodiment, all switches SW1 , SW2 , SW3 , SWP and SWN are controlled by responding to the two feedback signals (Vop_FB and Von_FB) and the inductor current IL.

Under heavy load (CCM), the control sequence is P1, P2 and P4, where the first operating phase P1 starts at the beginning of each clock cycle and ends at the rising edge of signal Cp (ie, Vsum is close to VEAp) ; the second operating phase P2 starts at the end of the first operating phase P1 and ends with the rising edge of the signal Cn (ie, Vsum approaches VEAn); and the fourth operating phase P4 starts at the second operating phase The end of P2 and the beginning of the next clock cycle.

At light load (DCM), the control sequence is P1, P2, P4, and P5, where the first operating phase P1 begins at the beginning of each clock cycle and ends at the rising edge of signal Cn (ie, Vsum is close to VEAn); the second operation phase P2 starts at the end of the first operation phase P1 and ends at the rising edge of the signal Cpn (ie, Vsum approaches VEApn); the fourth operation phase P4 starts at the second operation phase The end of P2 and the discharge of the inductor current IL to near 0; and the fifth operation phase P5 begins at the end of the fourth operation phase P4 and ends at the beginning of the next clock cycle.

An example in which the input voltage Vin is provided by a lithium battery will now be described, wherein the initial voltage of the input voltage Vin is 4.2V, and the required positive output Vop is 3.6V. Initially, the input voltage Vin is higher than the positive output Vop, and the SIBO buck-boost converter 300 of the present embodiment operates in the operating mode of Vin>Vop and heavy load (CCM). Next, the input voltage Vin (output by the lithium battery) gradually becomes lower as the lithium current provides power to the SIBO buck-boost converter 300 . When the input voltage Vin gradually decreases to almost close to the positive output Vop, the SIBO buck-boost converter 300 of the present embodiment operates in the Vin≈Vop and heavy load (CCM) operating mode. When the input voltage Vin gradually becomes lower than the positive output Vop, the SIBO buck-boost converter 300 of the present embodiment operates in the Vin<Vop and heavy load (CCM) operating mode.

In short, in the SIBO buck-boost converter 300 of this embodiment, two output voltages (positive output Vop and negative output Von) can be generated through one inductor, multiple capacitors and multiple switches.

FIG. 6 shows a comparison diagram of the energy conversion efficiency between the embodiment of the present invention and the existing two-stage SIBO converter, and this diagram takes Vop=2.8V as an example. As shown in FIG. 6 , the SIBO buck-boost converter of this embodiment has smooth and high energy conversion efficiency (almost between 85%-88%). Compared with the energy conversion efficiency of the existing two-stage SIBO converter 100 (between 55%-88%), the energy conversion efficiency of the SIBO buck-boost converter of the embodiment of the present invention is significantly improved.

To sum up, although the present invention has been disclosed by the above embodiments, it is not intended to limit the present invention. Those skilled in the art to which the present invention pertains can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the appended patent application.

Claims (14)

1. A method of controlling a single-inductor dual-polarity output SIBO buck-boost converter to generate a positive output and a negative output, the SIBO buck-boost converter including a SIBO buck-boost power stage including a first switch coupled between an input and a first node, a second switch coupled between the first node and ground, a third switch coupled between a second node and ground, a fourth switch coupled between the second node and a first output node outputting the positive output, a fifth switch coupled between the first node and a second output node outputting the negative output, and an inductor coupled between the first and second nodes, the method comprising:

controlling the first switch and the third switch to be conducted, and the second switch, the fourth switch and the fifth switch to be closed so as to magnetize the inductor when the inductor is magnetized;

controlling the first switch and the fourth switch to be conducted, and the second switch, the third switch and the fifth switch to be closed so as to generate the positive output in a positive output charging operation phase; and

and controlling the third switch and the fifth switch to be conducted and the first switch, the second switch and the fourth switch to be closed so as to generate the negative output when a negative output charging operation is performed.

2. The control method of claim 1, further comprising:

when the inductor current is close to 0, the five switches of the SIBO buck-boost power stage are controlled to neither charge nor discharge the inductor during a zero inductor current operation.

3. The control method of claim 2, further comprising:

generating a first feedback signal proportional to the positive output voltage of the SIBO buck-boost converter;

generating a second feedback signal proportional to the negative output voltage of the SIBO buck-boost converter;

controlling a duty ratio of the inductor in a magnetizing operation according to the second feedback signal; and

controlling a duty ratio of the positive output charging operation phase according to the first and second feedback signals.

4. The control method of claim 3, further comprising:

generating a first compensated error amplifier output signal responsive to the first feedback signal;

generating a second compensated error amplifier output signal responsive to the second feedback signal; and

the first and second compensated error amplifier output signals are summed to generate a third compensated error amplifier output signal.

5. The control method of claim 4, further comprising:

generating a periodic waveform signal; and

the periodic waveform signal is added to a voltage of the inductor current associated with the inductor to generate a sum signal.

6. The control method of claim 5, further comprising:

comparing the first compensated error amplifier output signal with the sum signal to generate a first comparison signal;

comparing the second compensated error amplifier output signal with the sum signal to generate a second comparison signal; and

comparing the third compensated error amplifier output signal with the sum signal to generate a third comparison signal.

7. The control method of claim 6, further comprising:

receiving the first and second compensated error amplifier output signals and a second reference voltage to generate a plurality of pulse-skipping mode output signals; and

according to the first, the second and the third comparison signals and the pulse omission mode output signals, a first control signal, a second control signal, a third control signal, a fourth control signal and a fifth control signal are generated to respectively control the first switch, the second switch, the third switch, the fourth switch and the fifth switch.

8. A single-inductor, dual-polarity output SIBO buck-boost converter for generating a positive output and a negative output, the SIBO buck-boost converter comprising:

an SIBO buck-boost controller; and

an SIBO buck-boost power stage coupled to the SIBO buck-boost controller, the SIBO buck-boost power stage including a first switch coupled between an input and a first node, a second switch coupled between the first node and ground, a third switch coupled between a second node and ground, a fourth switch coupled between the second node and a first output node that outputs the positive output, a fifth switch coupled between the first node and a second output node that outputs the negative output, and an inductor coupled between the first and second nodes,

wherein,

the SIBO buck-boost controller controls the first switch and the third switch to be turned on, and the second switch, the fourth switch and the fifth switch to be turned off so as to magnetize the inductor during an inductor magnetizing operation;

the SIBO buck-boost controller controls the first switch and the fourth switch to be turned on and the second switch, the third switch and the fifth switch to be turned off so as to generate the positive output in a positive output charging operation phase; and

the SIBO buck-boost controller controls the third switch and the fifth switch to be turned on, and the first switch, the second switch and the fourth switch to be turned off, so as to generate the negative output in a negative output charging operation phase.

9. The SIBO buck-boost converter of claim 8, wherein the SIBO buck-boost controller controls the five switches of the SIBO buck-boost power stage to neither charge nor discharge the inductor during a zero inductor current operation when the inductor current is near 0.

10. The SIBO buck-boost converter of claim 9, wherein the SIBO buck-boost controller architecture comprises:

generating a first feedback signal proportional to the positive output voltage of the SIBO buck-boost converter;

generating a second feedback signal proportional to the negative output voltage of the SIBO buck-boost converter;

controlling a duty ratio of the inductor in a magnetizing operation according to the second feedback signal; and

controlling a duty ratio of the positive output charging operation phase according to the first and second feedback signals.

11. The SIBO buck-boost converter of claim 10, wherein the SIBO buck-boost controller comprises:

a first compensated error amplifier generating a first compensated error amplifier output signal responsive to the first feedback signal;

a second compensated error amplifier for generating a second compensated error amplifier output signal responsive to the second feedback signal; and

a first adder adds the first and second compensated error amplifier output signals to generate a third compensated error amplifier output signal.

12. The SIBO buck-boost converter of claim 11, wherein the SIBO buck-boost controller comprises:

a waveform generator for generating a periodic waveform signal; and

a second adder for adding the periodic waveform signal and a voltage of the inductor current associated with the inductor to generate a sum signal.

13. The SIBO buck-boost converter of claim 12, wherein the SIBO buck-boost controller comprises:

a first comparator for comparing the first compensated error amplifier output signal with the sum signal to generate a first comparison signal;

a second comparator for comparing the second compensated error amplifier output signal with the sum signal to generate a second comparison signal; and

a third comparator for comparing the third compensated error amplifier output signal with the sum signal to generate a third comparison signal.

14. The SIBO buck-boost converter of claim 13, wherein the SIBO buck-boost controller comprises:

a pulse skipping mode circuit for receiving the first and second compensated error amplifier output signals and a second reference voltage to generate a plurality of pulse skipping mode output signals; and

a pulse width modulation logic, generating a first, a second, a third, a fourth and a fifth control signal to control the first, the second, the third, the fourth and the fifth switches respectively according to the first, the second and the third comparison signals and the pulse omission mode output signals.