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CN110021269A - Promote the signal inputting method of display panel charge rate - Google Patents

Promote the signal inputting method of display panel charge rate Download PDF

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Publication number
CN110021269A
CN110021269A CN201910367129.9A CN201910367129A CN110021269A CN 110021269 A CN110021269 A CN 110021269A CN 201910367129 A CN201910367129 A CN 201910367129A CN 110021269 A CN110021269 A CN 110021269A
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CN
China
Prior art keywords
point
signal
display panel
pixel
data signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910367129.9A
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Chinese (zh)
Inventor
肖翔
韩佰祥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to CN201910367129.9A priority Critical patent/CN110021269A/en
Publication of CN110021269A publication Critical patent/CN110021269A/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A kind of signal inputting method promoting display panel charge rate, including display panel provide step, grid signal input step and data signal input step.The grid signal input step is that grid signal is written in the side pixel to the pixel column of the display panel and center pixel point input one simultaneously on one first time point.The data signal input step is to input a data signal to the side pixel of the pixel column on one second time point, then a data signal is inputted in the center pixel point of the third time point to the pixel column, wherein second time point, which is later than between first time point and second time point and first time point, has a first time poor, the third time point is later than first time point, and has for one second time difference between the third time point and first time point.The above method can promote the display uniformity of display panel.

Description

Promote the signal inputting method of display panel charge rate
Technical field
The invention relates to a kind of signal inputting methods of display panel, in particular to a kind of promotion display panel The signal inputting method of charge rate.
Background technique
In the display panel of existing large scale high-resolution high refresh rate, since grid (Gate) and data (Data) are believed Number have biggish resistance/capacitance (Resistor/Capacitor, RC) value, signal display panel different pixels point have not Same RC retardation ratio, leads to the Data signal undercharge of the serious pixel of RC retardation ratio, eventually leads to the display picture of display panel Face brightness or color are uneven.
Fig. 1 and Fig. 2 is please referred to, Fig. 1 is the schematic diagram of the display panel of the prior art, and Fig. 2 is prior art display surface Grid signal and data signal input timing curve graph on plate, wherein the longitudinal axis is that (unit is voltage or other tables to signal strength Show the unit of intensity), horizontal axis is time (unit is μ s).
The display panel 90 has a viewing area, has multirow pixel column R1, R2, R3, each letter on the viewing area Number input column R1, R2, R3 have one be located at the viewing area side side pixel P1 and one be located in the viewing area Center pixel point P2 at centre, as shown in Figure 1.
In Fig. 2, WR_R1, WR_R2, WR_R3 respectively represent pixel P1, P2 in wherein pixel column R1, R2, R3 The timing curve of upper input grid signal, Data respectively represent the timing curve of the input data signal on pixel P1, P2.
When the prior art is to display panel input signal, according to timing curve WR_R1 (P2) and timing curve WR_R1 (P1) it is found that grid signal is on one first time point T1 while to be input to side pixel P1 and center pixel point P2.In addition, By according to timing curve Data (P2) and according to timing curve Data (P1) it is found that data signal be on one second time point T2 it is same When be input to side pixel P1 and center pixel point P2.Therefore side pixel P1 and center pixel point P2 grid signal and Data signal cross_placing time difference (time difference between the first time point T1 and the second time point T2) is identical, and side pixel P1 is in Entreating the respective Data signal input time point of pixel P2 is the second time point T2, leads to the serious center pixel point P2's of RC retardation ratio Data signal undercharge, brightness or the color for finally resulting in the picture that display panel is manifested are uneven.
Following table one is the charge rate of each pixel column of the prior art and side pixel P1 and center pixel in each column The current unevenness evenness of point P2.
Therefore, it is necessary to a kind of signal inputting method for promoting display panel charge rate is provided, is deposited with solving the prior art Same signal input column in each point Data signal input time point it is identical and be not staggered cause Data signal charge rate foot simultaneously Further result in the brightness for the picture that display panel is manifested or the problem of color unevenness.
Summary of the invention
The present invention provides a kind of signal inputting method for promoting display panel charge rate, to solve present in the prior art The Data signal input time point of each point is identical in same signal input column and not being staggered causes Data signal charge rate to go forward side by side one enough Walk the brightness for the picture for causing display panel to be manifested or the problem of color unevenness.
Present invention is primarily aimed at provide a kind of signal inputting method for promoting display panel charge rate, comprising:
Display panel provides step, including provides a display panel, wherein a viewing area is provided on the display panel, Define an at least pixel column on the viewing area, the pixel column include one be located at the side pixel of the viewing area side with And one be located at the viewing area centre center pixel point, wherein the side pixel and center pixel point Each is separately connected a gate line and a data signal line, wherein each side pixel and center pixel Each of point is separately connected a circuit, and the circuit includes the sensing of a data signal line, a parallel data signal line Signal wire and one vertically connect the data signal line and the sensing signal line gate line, believe in the data A writing transistor, a driving transistor and a sensing transistor number are connected between line and the sensing signal line, it is described Writing transistor connects the data signal line by a data signal point, and the data signal point is used for said write crystal Pipe inputs a data signal, and said write transistor is connected on the gate line by grid signal write-in point, institute Grid signal write-in point is stated for one write-in grid signal of said write transistor input;
Grid signal input step, including the side pixel on one first time point while to the pixel column The grid signal write-in point of the grid signal write-in point and center pixel point inputs a write-in grid news respectively Number;And
Data signal input step, including described in the side pixel on one second time point to the pixel column Data signal point inputs a data signal, then in a third time point to the money of the center pixel point of the pixel column Expect that signaling point inputs a data signal, wherein second time point is later than first time point and second time point and described the It is one poor at the first time to have between one time point, and the third time point is later than first time point, and the third time point with it is described There is one second time difference between first time point.
In one embodiment of this invention, the third time point is later than second time point, and the first time is poor to be less than Second time difference.
In one embodiment of this invention, the third time point is earlier than second time point, and the first time is poor to be greater than Second time difference.
In one embodiment of this invention, the grid signal input step and the data signal input step be It is completed in one frame picture of the display panel.
In one embodiment of this invention, the time of a frame picture of the display panel is less than or equal to 1.9 μ s.
In one embodiment of this invention, the multiple pixels being arranged above and below of an at least pixel behavior on the viewing area Row, the signal inputting method for promoting display panel charge rate are to execute the primary grid signal respectively to each pixel column Input step and the data signal input step.
In one embodiment of this invention, the multiple pixels being arranged above and below of an at least pixel behavior on the viewing area Row, the signal inputting method for promoting display panel charge rate are from top to bottom sequentially to execute respectively to each pixel column once The grid signal input step and the data signal input step.
In one embodiment of this invention, the sensing transistor is connected to the grid by detectable signal write-in point Signal wire, the detectable signal write-in point is for one write-in grid signal of sensing transistor input or a detection grid letter Number.
In one embodiment of this invention, one Organic Light Emitting Diode capacitor of the driving transistor series connection, the driving Coupled in parallel has a storage capacitors.
In one embodiment of this invention, the driving transistor connects an anode voltage and a cathode voltage.
Compared with prior art, the signal inputting method that the present invention promotes display panel charge rate can be defeated in data signal Enter step and a data signal is inputted to the side pixel of the pixel column on second time point respectively, and then exists The third time point inputs a data signal, second time point and the third to the center pixel point of the pixel column Time point enable there are the time difference data signal inputted more afterwards well avoid resistance/capacitance (Resistor/Capacitor, R/C the problem of data signal charge rate deficiency caused by) postponing, and then it is able to ascend the picture that the display panel is manifested The uniformity of brightness or color.
For above content of the invention can be clearer and more comprehensible, preferred embodiment is cited below particularly, and cooperate institute's accompanying drawings, makees Detailed description are as follows:
Detailed description of the invention
Fig. 1 is the schematic diagram of the display panel of the prior art.
Fig. 2 be prior art display panel on grid signal and data signal input timing curve graph, wherein the longitudinal axis be Signal strength (unit is voltage or other indicate the unit of intensity), horizontal axis is time (unit us).
Fig. 3 is step flow chart of the invention.
Fig. 4 is the schematic diagram of display panel of the invention.
Fig. 5 is that the invention shows the grid signal on panel and data signal input timing curve graphs, and wherein the longitudinal axis is letter Number intensity (unit is voltage or other indicate the unit of intensity), horizontal axis is time (unit us).
Fig. 6 is the circuit diagram of the gate line and data signal line on display panel of the invention.
Specific embodiment
Referring to figure 3., Fig. 3 is step flow chart of the invention.The signal that the present invention promotes 10 charge rate of display panel is defeated Enter method, comprising: display panel provides step S01, grid signal input step S02 and data signal input step S03.
Referring to figure 4. and Fig. 5, Fig. 4 are the schematic diagram of display panel 10 of the invention, and Fig. 5 is that the invention shows panels 10 On grid (Gate) signal and data (Data) signal input timing curve graph, wherein the longitudinal axis be that (unit is electric to signal strength The unit of pressure or other expression intensity), horizontal axis is time (unit us).
The display panel provides step S01, including provides a display panel 10, wherein being arranged on the display panel 10 There is a viewing area 100, at least pixel column R1, R2, R3 is defined on the viewing area 100, described pixel column R1, R2, R3 include The one side pixel P1 and one for being located at 100 side of viewing area is located at the center pixel of 100 centre of viewing area Point P2.
Please refer to Fig. 6, Fig. 6 be side pixel P1 on display panel of the invention and center pixel point P2 it is each A connected circuit diagram.It is provided in step S01 in the display panel, each side pixel P1 and center pixel point Each of P2 is separately connected a circuit, and the circuit includes a data signal line Data, a parallel data signal line The sensing signal line Sense of Data and one vertically connects the data signal line Data's and sensing signal line Sense Gate line Gate.A write-in crystal is connected between the data signal line Data and the sensing signal line Sense Pipe TFT2, an a driving transistor TFT1 and sensing transistor TFT3.Said write transistor TFT2 passes through a data signal The point D connection data signal line Data, the data signal point D, which is used to input a data to said write transistor TFT2, to be believed Number, said write transistor TFT2 is written point WR by a grid signal and is connected on the gate line Gate, the grid Pole signal is written point WR and is used for one write-in grid signal of said write transistor TFT2 input.The driving transistor TFT1 connects Connect an an anode voltage OVDD and cathode voltage OVSS, one Organic Light Emitting Diode capacitor of the driving transistor TFT1 series connection COLED.In addition, the driving transistor TFT1 is parallel with a storage capacitors Cst.The sensing transistor TFT3 passes through a detection letter Number write-in point RD is connected to the gate line Gate, and the detectable signal write-in point RD is for the sensing transistor One write-in grid signal of TFT3 input or a detection grid signal.
The grid signal input step S02, including simultaneously to described pixel column R1, R2, R3 on one first time point T11 The side pixel P1 the grid signal write-in point WR and center pixel point P2 the grid signal write Access point WR inputs a write-in grid signal respectively.
The data signal input step S03, including on one second time point T12 to the institute of described pixel column R1, R2, R3 The data signal point D for stating side pixel P1 inputs a data signal, then in a third time point T13 to the pixel column The data signal point D of the center pixel point P2 of R1, R2, R3 input a data signal, wherein the second time point T12 It is later than the first time point T11 and there is first time poor a, institute between the second time point T12 and the first time point T11 It states third time point T13 and is later than the first time point T11, and have one between the third time point T13 and the first time point T11 Second time difference.
In one embodiment of this invention, the third time point T13 is later than the second time point T12, the first time Difference is less than the second time difference.In another embodiment of the invention, the third time point T13 is earlier than the second time point T12, institute It states and poor was greater than for the second time difference at the first time.
In one embodiment of this invention, the grid signal input step S02 and the data signal input step S03 is completed in a frame picture of the display panel 10.In one embodiment of this invention, the one of the display panel 10 The time of frame picture is less than or equal to 1.9 μ s.The time of the frame picture for being less than or equal to 1.9 μ s can correspond to 65 inch 8K The superelevation image quality panel of resolution and screen turnover rate 120hz, the display picture of high image quality is presented.
In one embodiment of this invention, at least pixel column R1, R2, R3 on the viewing area 100 is above and below multiple Pixel column R1, R2, R3 of arrangement, the signal inputting method for promoting 10 charge rate of display panel be to each pixel column R1, R2, R3 execute the primary grid signal input step S02 and data signal input step S03 respectively.
In another embodiment of the invention, at least pixel column R1, R2, R3 on the viewing area 100 is on multiple Pixel column R1, R2, R3 of lower arrangement, the signal inputting method for promoting 10 charge rate of display panel is from top to bottom sequentially right Each pixel column R1, R2, R3 execute the primary grid signal input step S02 and the data signal input step respectively S03。
In Fig. 5, WR_R1, WR_R2, WR_R3 respectively represent the pixel in wherein pixel column R1, R2, R3R1, R2, R3 The timing curve of grid signal is inputted on point P1, P2, Data respectively represents the timing of the input data signal on pixel P1, P2 Curve.
When the prior art is to 10 input signal of display panel, according to timing curve WR_R1 (P2) and timing curve WR_ R1 (P1) is it is found that grid signal is on one first time point T11T11 while to be input to the side pixel P1 and the center Pixel P2.In addition, by according to timing curve Data (P2) and according to timing curve Data (P1) it is found that data signal is one It is input to the side pixel P1 on second time point T12, and the data signal is on a third time point T13 described in input Center pixel point P2.Therefore the first time point T11 of grid signal input, which is input to the side pixel P1 with data signal, has It is poor at the first time, and the first time point T11 of grid signal input is input to the center pixel point P2 with data signal and has Second time difference, data signal is input to the time point of the side pixel P1 and center pixel point P2, and there is also the time differences (poor at the first time to subtract each other with the second time difference), causes the Data signal of the serious center pixel point P2 of RC retardation ratio to have the sufficient time Charging promotes the brightness for the picture that display panel 10 is manifested or the uniformity of color.
Following table two be the charge rate of each pixel column R1, R2, R3 of the invention and the side pixel P1 in each column and in Entreat the current unevenness evenness of pixel P2.
By the comparison of above-mentioned table two and the table one of prior art it is found that the present invention promotes the signal of 10 charge rate of display panel Input method improves the charge rate of pixel significantly, and the pixel significantly reduced at all pixels point is shown not The uniformity.
Compared with prior art, the signal inputting method of promotion 10 charge rate of display panel of the invention can be believed in data Number input step S03 is defeated to the side pixel P1 of described pixel column R1, R2, R3 on the second time point T12 respectively Enter a data signal, and then defeated in the center pixel point P2 of the third time point T13 to described pixel column R1, R2, R3 Enter a data signal, the second time point T12 and the third time point T13 believe the data inputted more afterwards Data signal charge rate is insufficient caused by number capable of well avoiding resistance/capacitance (Resistor/Capacitor, RC) from postponing asks Topic, and then it is able to ascend the brightness for the picture that the display panel 10 is manifested or the uniformity of color.

Claims (10)

1. a kind of signal inputting method for promoting display panel charge rate, it is characterised in that: the promotion display panel charge rate Signal inputting method include:
Display panel provides step, including provides a display panel, wherein a viewing area is provided on the display panel, it is described An at least pixel column is defined on viewing area, the pixel column includes a side pixel and one for being located at the viewing area side Positioned at the center pixel point of the viewing area centre, wherein the side pixel and center pixel point it is each It is a to be separately connected a gate line and a data signal line, wherein each side pixel and center pixel point Each is separately connected a circuit, and the circuit includes the sensing signal of a data signal line, a parallel data signal line Line and one vertically connect the data signal line and the sensing signal line gate line, in the data signal line A writing transistor, a driving transistor and a sensing transistor, said write are connected between the sensing signal line Transistor connects the data signal line by a data signal point, and the data signal point is for defeated to said write transistor Enter a data signal, said write transistor is connected on the gate line by grid signal write-in point, the grid Pole signal write-in point is for one write-in grid signal of said write transistor input;
Grid signal input step, including described in the side pixel on one first time point while to the pixel column The grid signal write-in point of grid signal write-in point and center pixel point inputs a write-in grid signal respectively;With And
Data signal input step, including on one second time point to the data of the side pixel of the pixel column Signaling point inputs a data signal, then believes in the data of the third time point to the center pixel point of the pixel column Number point inputs a data signal, wherein second time point is later than first time point and when second time point is with described first Have a first time poor between point, the third time point is later than first time point, and the third time point and described first There is one second time difference between time point.
2. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that when the third Point is later than second time point, and the first time is poor less than the second time difference.
3. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that when the third For point earlier than second time point, the first time is poor to be greater than for the second time difference.
4. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that the grid letter Number input step and the data signal input step are completed in a frame picture of the display panel.
5. promoting the signal inputting method of display panel charge rate as claimed in claim 4, which is characterized in that the display surface The time of one frame picture of plate is less than or equal to 1.9 μ s.
6. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that the viewing area On the multiple pixel columns being arranged above and below of an at least pixel behavior, it is described promoted display panel charge rate signal inputting method be Execute the primary grid signal input step and the data signal input step respectively to each pixel column.
7. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that the viewing area On the multiple pixel columns being arranged above and below of an at least pixel behavior, it is described promoted display panel charge rate signal inputting method be From top to bottom sequentially execute the primary grid signal input step and data signal input respectively to each pixel column Step.
8. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that the sensing is brilliant Body pipe is connected to the gate line by detectable signal write-in point, and the detectable signal write-in point is for the sensing One write-in grid signal of transistor input or a detection grid signal.
9. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that the driving is brilliant Body pipe one Organic Light Emitting Diode capacitor of series connection, the driving coupled in parallel have a storage capacitors.
10. promoting the signal inputting method of display panel charge rate as described in claim 1, which is characterized in that the driving Transistor connects an anode voltage and a cathode voltage.
CN201910367129.9A 2019-05-05 2019-05-05 Promote the signal inputting method of display panel charge rate Pending CN110021269A (en)

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KR20090083565A (en) * 2008-01-30 2009-08-04 엘지디스플레이 주식회사 Display device and driving method
US20140160110A1 (en) * 2009-03-02 2014-06-12 Samsung Display Co., Ltd. Liquid crystal display
CN104252836A (en) * 2013-06-26 2014-12-31 乐金显示有限公司 Organic light emitting diode display device
CN106935185A (en) * 2015-12-30 2017-07-07 乐金显示有限公司 Pixel, the display device including the pixel and its driving method
CN109473075A (en) * 2018-12-14 2019-03-15 深圳市华星光电技术有限公司 The driving method and driving device of display panel

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008191375A (en) * 2007-02-05 2008-08-21 Sharp Corp Display device, and driving circuit and driving method thereof
KR20090083565A (en) * 2008-01-30 2009-08-04 엘지디스플레이 주식회사 Display device and driving method
US20140160110A1 (en) * 2009-03-02 2014-06-12 Samsung Display Co., Ltd. Liquid crystal display
CN104252836A (en) * 2013-06-26 2014-12-31 乐金显示有限公司 Organic light emitting diode display device
CN106935185A (en) * 2015-12-30 2017-07-07 乐金显示有限公司 Pixel, the display device including the pixel and its driving method
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Application publication date: 20190716