CN109995382B

CN109995382B - Polar code decoder

Info

Publication number: CN109995382B
Application number: CN201711490147.3A
Authority: CN
Inventors: 张玉伦; 游治
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2017-12-29
Filing date: 2017-12-29
Publication date: 2021-01-05
Anticipated expiration: 2037-12-29
Also published as: WO2019128763A1; CN109995382A

Abstract

The application discloses a polar code decoder, which comprises a decoding unit and a control unit in communication connection with the decoding unit; the decoding unit comprises m input ends and n paths, wherein the m input ends are selectively connected with the n paths; the control unit is used for sending a first control signal to the decoding unit, wherein the first control signal is used for indicating an SC decoding mode or an SCLW1 decoding mode; the decoding unit is configured to receive the first control signal sent by the control unit, and configure the SC decoding mode for decoding or configure the SCLw1 decoding mode for decoding according to the first control signal. Therefore, the polar code decoder provided by the application can realize different decoding modes through the selective connection of the input end and the path, so that decoding with different performances and different parallelism degrees can be realized through one decoder, flexible selection is realized in the aspect of speed performance, two-stage decoding can be realized based on the decoder, and the PDCCH blind detection process is accelerated.

Description

Polar code decoder

Technical Field

The present invention relates to the field of communications technologies, and in particular, to a polar code decoder.

Background

In a communication system, channel coding can ensure reliable transmission of information data to a receiving device against interference in information transmission. Typically, a transmitting device needs to encode information data to obtain coded bits, interleave the coded bits, map the interleaved bits to modulation symbols, and then process and transmit the modulation symbols over a communication channel. And after receiving the modulation symbols, the receiving equipment decodes the modulation symbols through a decoder and restores the modulation symbols into information data.

The 3GPP selected polarization (Polar) code is used for control channel coding for 5G enhanced mobile broadband (eMBB) services. Polar codes can achieve the error correction performance superior to known various code types such as Turbo codes, convolutional codes, LDPC codes and the like by combining the special channel polarization characteristics with auxiliary means such as check and the like. The main decoding methods of Polar code include a Sequential Cancellation (SC) decoding method and a list Sequential Cancellation (SCL) decoding method. The SC decoding method uses Log Likelihood Ratio (LLR) as a decision criterion to make hard decision on each bit, and sequentially decides and decodes according to the sequence of bit serial numbers from small to large. The SCL decoding method is an improvement on the SC decoding method, wherein the number of paths (List) is marked as L (L >1), when L is 1, the SCL decoding method is degenerated to the SC decoding method, and when L is larger than or equal to 2K, the SCL decoding is equivalent to the maximum likelihood decoding.

In the prior art, the number L of paths of a polar code decoder is usually preset, for example, the number of paths of an SCL4 decoder is 4, and is only used for SCL4 decoding, and the number of paths of an SCL8 decoder is 8, and is only used for SCL8 decoding.

Disclosure of Invention

The application provides a polar code decoder for solve the polar code decoder's among the prior art structure inflexible, the relatively poor technical problem of suitability.

In a first aspect, the present application provides a polar code decoder, which includes a decoding unit, and a control unit communicatively connected to the decoding unit; the decoding unit comprises m input ends and n paths, the m input ends are selectively connected with the n paths, m and n are integers, and m is less than or equal to n;

the control unit is used for sending a first control signal to the coding unit, wherein the first control signal is used for indicating an SC coding mode or an SCL w1 coding mode, and w1 is 2^h1H1 is an integer greater than or equal to 1, w1 is equal to or less than n;

the decoding unit is configured to receive the first control signal sent by the control unit, and perform the following operations according to the first control signal:

if the first control signal is used for indicating an SC decoding mode, configuring p1 input ends and p1 paths in one-to-one correspondence, and inputting a first candidate set to the path to which the first input ends are correspondingly connected through a first input end; configuring a path correspondingly connected with the first input end as an SC decoding mode for decoding, wherein the first input end is any one of p1 input ends, and p1 is an integer less than or equal to m;

if the first control signal is used to indicate SCL w1 decoding mode, configuring a second input terminal to be connected with w1 paths, and inputting a second candidate set to w1 paths connected with the second input terminal through the second input terminal; and configuring w1 paths correspondingly connected to the second input terminal as an SCL w1 decoding mode for decoding, wherein the second input terminal is any one of p2 input terminals, and p2 is an integer less than or equal to m.

As can be seen from the above, since the m input terminals are selectively connected to the n paths, the SC decoding mode or the SCL w1 decoding mode can be implemented according to the first control signal sent by the control unit, so that the performance of the polar code decoder is diversified, and the service requirement can be better satisfied.

In one possible design, the m inputs are selectively connected to the n paths, including:

the m inputs and the n paths are selectively connected by a plurality of selectors.

In one possible design, the first control signal is used to indicate an SC coding mode or an SCL2 coding mode;

the m inputs and the n paths are selectively connected by a plurality of selectors, including:

the third input end and the fourth input end are selectively connected with the first path through a first selector, and the third input end is connected with the second path; the third input and the fourth input are two of the m inputs, the first selector is one of the plurality of selectors, and the first path and the second path are two of the n paths;

when the first selector is in a first state, the third input end is respectively connected with the first path and the second path; when the first selector is in a second state, the third input end is connected with the second path, and the fourth input end is connected with the first path.

In one possible design, the first control signal is used to indicate an SC coding mode or an SCL4 coding mode;

the fifth input end is connected with a third path, the fifth input end and the sixth input end are selectively connected with a fourth path through a second selector, the fifth input end and the seventh input end are selectively connected with a fifth path through a third selector, and the fifth input end and the eighth input end are selectively connected with the sixth path through a fourth selector; the fifth input, the sixth input, the seventh input, and the eighth input are four of the m inputs, the second selector, the third selector, and the fourth selector are three of the plurality of selectors, and the third path, the fourth path, the fifth path, and the sixth path are four of the n paths;

when the second selector, the third selector and the fourth selector are in the first state, the fifth input end is respectively connected with the third path, the fourth path, the fifth path and the sixth path; when the second selector, the third selector and the fourth selector are in the second state, the fifth input end is connected with the third path, the sixth input end is connected with the fourth path, the seventh input end is connected with the fifth path, and the eighth input end is connected with the sixth path.

In one possible design, the coding unit is further configured to select p3 candidate sets from the p1 candidate sets, or select p3 candidate sets from the p2 candidate sets; p3 is an integer less than p1 or less than p 2;

the control unit is further configured to send a second control signal to the decoding unit after the decoding unit selects the p3 candidate sets, where the second control signal is used to indicate an SCL w2 decoding mode, and w2 is 2^h2H2 is an integer greater than or equal to 1; w2>w1；

The decoding unit is further configured to receive a second control signal sent by the control unit, configure a ninth input end to be correspondingly connected with w2 paths according to the second control signal, and input a candidate set to w2 paths correspondingly connected to the ninth input end through the ninth input end; and configuring w2 paths correspondingly connected to the ninth input terminal as an SCL w2 decoding mode for decoding, wherein the ninth input terminal is any one of p3 input terminals.

According to the above, when the polar code decoder of the embodiment of the present application is applied to a blind detection scenario, only one polar code decoder needs to be arranged to realize the first-stage decoding and the second-stage decoding, and compared with the prior art in which a polar code decoder for executing the first-stage decoding and a polar code decoder for executing the second-stage decoding need to be arranged respectively, the chip area can be effectively reduced, and the power consumption can be reduced.

In one possible design, before the control unit sends the second control signal to the decoding unit, the control unit is further configured to:

and determining the second control signal according to the signal-to-noise ratio.

In one possible design, the first control signal is used to indicate an SC coding mode, the second control signal is used to indicate an SCL2 coding mode; or, the first control signal is used for indicating an SC coding mode, and the second control signal is used for indicating an SCL4 coding mode; or, the first control signal is used for indicating an SC coding mode, and the second control signal is used for indicating an SCL8 coding mode.

In a second aspect, embodiments of the present application provide a data transmission apparatus, which includes a polar code decoder in any one of the above designs.

The embodiment of the present application further provides a polar code decoder, where the polar code decoder includes a decoding unit and a control unit in communication connection with the decoding unit; the decoding unit comprises m input ends and n paths, the m input ends are selectively connected with the n paths, m and n are integers, and m is less than or equal to n;

the control unit is configured to send a first control signal to the decoding unit, where the first control signal is used to indicate a first decoding mode or a second decoding mode; wherein, the first coding mode refers to coding a candidate set through a path; the second coding mode refers to coding one candidate set through two or more paths;

if the first control signal is used to indicate the first coding mode, configuring p1 inputs and p1 paths in a one-to-one correspondence, and inputting a first candidate set to the path to which the first input is correspondingly connected through a first input; decoding the first candidate set through a path to which the first input terminal is correspondingly connected, wherein the first input terminal is any one of p1 input terminals, and p1 is an integer less than or equal to m;

if the first control signal is used to indicate the second decoding mode, configuring a second input terminal to be connected with w1 paths, and inputting a second candidate set to w1 paths connected with the second input terminal through the second input terminal; and decoding the second candidate set through w1 paths correspondingly connected to the second input end, wherein the second input end is any one of p2 input ends, p2 is an integer smaller than or equal to m, w1 is an integer larger than 1, and w1 is not more than n.

Further, the first coding mode may specifically refer to an SC coding mode, and the second coding mode may specifically refer to an SCL coding mode. The number of paths corresponding to one input terminal in the SCL decoding mode is usually 2^h1H1 is greater than or equal to 1So w1 may be equal to 2^h1。

the control unit is further configured to send a second control signal to the decoding unit after the decoding unit selects the p3 candidate sets, where the second control signal is used to indicate a third decoding mode; the third coding mode refers to coding one candidate set through two or more paths;

the decoding unit is further configured to receive a second control signal sent by the control unit, configure a ninth input end to be correspondingly connected with w2 paths according to the second control signal, and input a candidate set to w2 paths correspondingly connected to the ninth input end through the ninth input end; and decoding a third candidate set through w2 paths correspondingly connected to the ninth input terminal, wherein the ninth input terminal is any one of p3 input terminals, w2 is an integer greater than 1, and w2 is not more than n.

Further, the third coding mode may specifically refer to an SCL coding mode, so w2 may be equal to 2^h2And h2 is an integer greater than or equal to 1.

In the embodiment of the present application, since the decoding mode indicated by the first control signal is the first-level decoding, which aims to filter the candidate set, and the decoding mode indicated by the second control signal is the second-level decoding, which aims to obtain the final decoding result, in order to ensure that the final decoding result is more accurate and reliable on the basis of ensuring the delay target, w2> w1 may be set.

The embodiment of the application also provides a decoding method, which is applied to a polar code decoder, wherein the polar code decoder comprises m input ends and n paths, the m input ends are selectively connected with the n paths, m and n are integers, and m is less than or equal to n; the coding method comprises the following steps:

receiving a first control signal; the first control signal is used to indicate a first coding mode or a second coding mode;

if the first control signal is used for indicating a first decoding mode, configuring p1 input ends and p1 paths in a one-to-one correspondence manner, and inputting a first candidate set to the path to which the first input ends are correspondingly connected through a first input end; decoding the first candidate set through a path to which the first input terminal is correspondingly connected, wherein the first input terminal is any one of p1 input terminals, and p1 is an integer less than or equal to m;

Further, the first coding mode may specifically refer to an SC coding mode, and the second coding mode may specifically refer to an SCL coding mode.

In one possible design, the method further includes:

selecting p3 candidate sets from the p1 candidate sets, or selecting p3 candidate sets from the p2 candidate sets; p3 is an integer less than p1 or less than p 2;

receiving a second control signal, the second control signal indicating a third coding mode; the third coding mode refers to coding one candidate set through two or more paths;

configuring a ninth input terminal to be correspondingly connected with w2 paths according to the second control signal, and inputting a candidate set to w2 paths correspondingly connected with the ninth input terminal through the ninth input terminal; and decoding a third candidate set through w2 paths correspondingly connected to the ninth input terminal, wherein the ninth input terminal is any one of p3 input terminals, w2 is an integer greater than 1, and w2 is not more than n.

Further, the third coding mode may specifically refer to an SCL coding mode, so w2 may be equal to 2^h2And h2 is an integer greater than or equal to 1. The embodiment of the application also provides a decoding method, which is applied to a polar code decoder, wherein the polar code decoder comprises m input ends and n paths, the m input ends are selectively connected with the n paths, m and n are integers, and m is less than or equal to n; the coding method comprises the following steps:

receiving a first control signal; the first control signal is used to indicate a fourth coding mode; the fourth coding mode refers to coding one candidate set through w3 paths, w3 being an integer greater than or equal to 1;

any input end of p4 input ends is configured to be correspondingly connected with w3 paths, and a corresponding candidate set is input to the w3 paths correspondingly connected with the any input end through the any input end; and coding the candidate set by w3 paths correspondingly connected with any input end, wherein p4 is an integer less than or equal to m.

Specifically, when w3 is 1, the fourth coding mode may be an SC coding mode, and when w3 is an integer greater than or equal to 2, the fourth coding mode may be an SCL coding mode.

As can be seen from the above, the polar code decoder provided in the embodiment of the present application can implement different decoding modes through selective connection between the input end and the path, so that the performance and processing delay of the polar code decoder are diversified, and thus, decoding with different performance and different parallelism can be implemented by one decoder, flexible selection in speed performance can be implemented, and two-stage decoding can be implemented based on the decoder, thereby accelerating the PDCCH blind detection process, effectively avoiding the problem that processing delay is implemented by using a plurality of polar code decoders in the prior art, and greatly reducing the chip area and power consumption.

Drawings

Fig. 1 is a schematic diagram of a network architecture suitable for use in the embodiment of the present application;

FIG. 2 is a schematic diagram of a blind detection decoding process;

FIG. 3 is a schematic diagram of a prior art blind detection device;

fig. 4 is a schematic structural diagram of a polar code decoder according to an embodiment of the present disclosure;

fig. 5 is an exemplary diagram of a polar code decoder according to an embodiment of the present application;

fig. 5a is a schematic diagram of an SC decoding mode of a polar code decoder according to an embodiment of the present application;

fig. 5b is a schematic diagram illustrating an SCL2 decoding mode of a polar code decoder according to an embodiment of the present application;

fig. 6 is a diagram of another example of a polar code decoder according to an embodiment of the present application;

fig. 6a is a schematic diagram illustrating an SCL4 decoding mode of a polar code decoder according to an embodiment of the present application;

FIG. 7a is a diagram illustrating decoding modes and data flows in a first possible implementation;

FIG. 7b is a diagram illustrating decoding modes and data flows in a second possible implementation;

FIG. 7c is a diagram illustrating decoding modes and data flows in a third possible implementation;

FIG. 7d is a flowchart illustrating two-level decoding according to an embodiment of the present application;

fig. 8 is a schematic structural diagram of a data transmission device according to an embodiment of the present application.

Detailed Description

The present application will now be described in detail with reference to the drawings, and the specific operations in the method embodiments may also be applied to the apparatus embodiments or the system embodiments.

Fig. 1 is a schematic diagram of a network architecture applicable to the embodiment of the present application. The network architecture may include at least one network device 100 (only 1 shown) and one or more terminal devices 200 connected to the network device 100.

The network device 100 may be a device capable of communicating with the terminal device 200. The network device 100 may be any device having a wireless transceiving function. Including but not limited to: a base station (e.g., a base station NodeB, an evolved base station eNodeB, a base station in the fifth generation (5G) communication system, a base station or network device in a future communication system, an access node in a WiFi system, a wireless relay node, a wireless backhaul node), etc. The network device 100 may also be a wireless controller in a Cloud Radio Access Network (CRAN) scenario. Network device 100 may also be a network device in a 5G network or a network device in a future evolution network; but also wearable devices or vehicle-mounted devices, etc. The network device 100 may also be a small station, a Transmission Reference Point (TRP), or the like. Although not expressly stated herein.

The terminal device 200 is a device with wireless transceiving function, which can be deployed on land, including indoors or outdoors, hand-held, worn or vehicle-mounted; can also be deployed on the water surface (such as a ship and the like); and may also be deployed in the air (e.g., airplanes, balloons, satellites, etc.). The terminal device may be a mobile phone (mobile phone), a tablet computer (Pad), a computer with a wireless transceiving function, a Virtual Reality (VR) terminal device, an Augmented Reality (AR) terminal device, a wireless terminal in industrial control (industrial control), a wireless terminal in self driving (self driving), a wireless terminal in remote medical (remote medical), a wireless terminal in smart grid (smart grid), a wireless terminal in transportation safety (transportation safety), a wireless terminal in smart city (smart city), a wireless terminal in smart home (smart home), and the like. The embodiments of the present application do not limit the application scenarios. A terminal device may also be sometimes referred to as a User Equipment (UE), an access terminal device, a UE unit, a UE station, a mobile station, a remote terminal device, a mobile device, a UE terminal device, a wireless communication device, a UE agent, or a UE apparatus, etc.

The communication system to which the above network architecture is applicable includes, but is not limited to, a 5G communication system, taking the 5G communication system as an example, in the 5G communication system, there is interaction of instructions in addition to interaction of data itself between the network device 100 and the terminal device 200, and the network device 100 completes scheduling of the terminal device 200 through the instructions and transfers format information of the scheduling. In order to reduce the overhead of instruction interaction, the network device 100 often does not send or only sends some scheduling signaling, and the terminal device 200 listens to whether there is scheduling according to a certain rule. During the listening process, the terminal device 200 needs to perform blind detection decoding without knowing the exact format.

The blind detection decoding process is mostly as shown in fig. 2, firstly listing all possible decoding parameters, decoding as a candidate set according to each hypothesis formed by combining the decoding parameters and data to be decoded (demodulation soft values), judging whether the decoding result is correct or not through checking, and continuing the process until a correct decoding result is searched or all sets are traversed or a certain preset condition is reached.

In a general blind detection assumption (5G blind detection parameters are not yet determined), there may be 44 candidate sets (candidate), where different candidate sets are obtained from different combinations of decoding parameters and data to be decoded. To meet the delay target (e.g. 4us) of blind detection, one implementation manner is that the blind detection apparatus first performs the first-stage decoding, filters C1 (e.g. C1 ═ 44) candidate sets, and then performs the second-stage decoding according to the C2 candidate sets that have been filtered, so as to obtain a decoding result, where C2< C1. However, because the structure of the polar code decoder in the prior art is not flexible, in order to implement this process, the blind detection device needs to separately set a polar code decoder (specifically, 3 SC decoders) for performing the first-stage decoding and a polar code decoder (specifically, 2 SCL8 decoders) for performing the second-stage decoding, as shown in fig. 3, since a plurality of polar code decoders need to be set, the chip area is large, and the power consumption is high.

Based on this, the embodiment of the present application provides a polar code decoder, which is used to solve the problems of inflexible structure and poor applicability of the polar code decoder in the prior art. Furthermore, the polar code decoder provided by the embodiment of the application can realize multiple decoding modes, so that the first-stage decoding and the second-stage decoding in a 5G PDCCH blind detection scene can be realized by arranging one polar code decoder, and the problems of large chip area and high power consumption are avoided on the basis of meeting a blind detection delay target.

Fig. 4 is a schematic structural diagram of a polar code decoder according to an embodiment of the present disclosure, and as shown in fig. 4, the polar code decoder 400 includes a decoding unit 401 and a control unit 402, where the decoding unit 401 and the control unit 402 are communicatively connected, and various ways of implementing the communication connection may be provided, which is not limited herein.

Decoding unit 401 includes m inputs (shown in fig. 4 as input 0, input 1, input 2, … …, and input m-1), and n paths (shown in fig. 4 as path 0, path 1, path 2, … …, and path n-1), where the m inputs are selectively connected to the n paths.

A control unit 402 for sending a first control signal to the decoding unit 401, the first control signal indicating an SC decoding mode or an SCL w1 decoding mode, w1 ═ 2^h1H1 is an integer greater than or equal to 1, w1 is less than or equal to n.

A decoding unit 401, configured to receive the first control signal sent by the control unit 402, and perform the following operations according to the first control signal:

if the first control signal is used to indicate the SC decoding mode, configuring p1 inputs and p1 paths in a one-to-one correspondence, and inputting a first candidate set (candidate) to the path corresponding to the first input through the first input; and configuring the path correspondingly connected with the first input end as an SC decoding mode for decoding, wherein the first input end is any one of p1 input ends, and p1 is an integer less than or equal to m.

If the first control signal is used to indicate the SCL w1 decoding mode, configuring a second input terminal connected with w1 paths, and inputting a second candidate set (candidate) to the w1 paths connected with the second input terminal; and configuring w1 paths correspondingly connected to the second input terminal as an SCL w1 decoding mode for decoding, wherein the second input terminal is any one of p2 input terminals, and p2 is an integer less than or equal to m.

Further, the decoding unit may further include: n Cyclic Redundancy Check (CRC) subunits, which are respectively connected to the n paths correspondingly, for checking decoding results of the correspondingly connected paths; and a decoding result processing subunit, connected to the n CRC subunits, configured to obtain a final decoding result according to a check result of each CRC subunit, or screen out p2 candidate sets according to the check result of each CRC subunit (see the description of first-level decoding and second-level decoding in the following).

For the relationship between the value of m and the value of n, in specific implementation, the value of m may be less than or equal to the value of n, thereby ensuring that each input end can be correspondingly connected with one path in the SC decoding mode. In one example, m is 8, n is 8, if in the SC decoding mode, 8 inputs may respectively correspond to 8 paths, and if in the SCL2 decoding mode, 4 inputs may respectively correspond to 8(4 × 2) paths; in another example, m is 8, n is 12, if in the SC decoding mode, 8 inputs may respectively correspond to 8 paths, and if in the SCL2 decoding mode, 6 inputs may respectively correspond to 12(6 × 2) paths.

In other embodiments, the value of m may be larger than that of n, for example, m is 8, n is 4, if only 4 of the inputs are respectively connected to 4 paths in the SC decoding mode, and if only 2 of the inputs are respectively connected to 4(2 × 2) paths in the SCL2 decoding mode, it may be possible that a part of the inputs may not be effectively utilized in this case, but the implementation of the embodiment of the present application is not affected.

According to the above, the value of m and the value of n can be reasonably set according to actual needs, and are not particularly limited. In the embodiment of the present application, a value of m may be less than or equal to a value of n.

For the relationship between the value of p1 and the value of m, in a specific implementation, taking a 5G PDCCH blind detection scenario as an example, if there are 44 candidate sets and m is 8, 6 times of SC decoding needs to be performed to traverse the 44 candidate sets; thus, when SC decoding is performed for the first 5 times, the value of p1 may be the same as the value of m, i.e. 8, and when SC decoding is performed for the 6 th time, since only 4 candidate sets remain, at this time, the value of p1 may be 4. When the value of p1 is 4, the remaining 4 input terminals may be considered as null, and decoding may be performed according to the case when p1 is m.

For the relationship between the value of w1 and the value of n, in a specific implementation, the value of w1 is less than or equal to the value of n, for example, when n is 8, the value of w1 may be 2, 4, or 8; further, when the value of w1 is 2, the value of p2 is 4, that is, 4 input ends are correspondingly connected to 8 paths; when the value of w1 is 4, the value of p2 is 2, that is, 2 input ends are correspondingly connected to 8 paths; when the value of w1 is 8, the value of p2 is 1, that is, 8 input terminals are correspondingly connected to 8 paths.

In the embodiment of the present application, since the m input terminals are selectively connected to the n paths, an SC decoding mode or an SCL w1 decoding mode can be implemented according to the first control signal sent by the control unit, so that the performance of the polar code decoder is diversified, and the service requirement can be better satisfied.

In particular, there may be a variety of ways to selectively connect between the m inputs and the n paths. One possible implementation is that the m inputs are selectively connected to the n paths by one or more selectors.

In one example, the first control signal is used to indicate an SC decoding mode or an SCL2 decoding mode, and at this time, the connection between the m inputs and the n paths may be: the third input end and the fourth input end are selectively connected with the first path through a first selector, and the third input end is connected with the second path; the third input and the fourth input are two of the m inputs, the first selector is one of the plurality of selectors, and the first path and the second path are two of the n paths; when the first selector is in a first state, the third input end is respectively connected with the first path and the second path; when the first selector is in a second state, the third input end is connected with the second path, and the fourth input end is connected with the first path. In a specific implementation, the first state may be an operating state, and at this time, a "1" in the selector is turned on; the second state may be a non-active state, where a "0" in the selector is turned on.

Based on this example, one possible structure of a polar code decoder is illustrated with reference to fig. 5. As shown in fig. 5, 8 inputs and 8 paths are selectively connected by 4 selectors (selector 1, selector 2, selector 3, selector 4): input 0 and input 1 are connected to path 1 through selector 1, and input 0 is connected to path 0; input 2 and input 3 are connected to path 3 through selector 2, and input 2 is connected to path 2; input terminal 4 and input terminal 5 are connected to path 5 through selector 3, and input terminal 4 is connected to path 4; input 6 and input 7 are connected to path 7 through selector 4, and input 6 is connected to path 6. The coding unit may control the selector 1, the selector 2, the selector 3, and the selector 4 to be in the first state or the second state through the SCL2_ En according to the first control signal.

If the first control signal indicates the SC decoding mode, the decoding unit may control the selector 1, the selector 2, the selector 3 and the selector 4 to be in the second state through SCL2_ En, at which time, referring to fig. 5a, the input 0 is connected to path 0, the input 1 is connected to path 1, … …, and the input 7 is connected to path 7. Further, the coding unit may configure each path to be coded in an SC coding mode.

If the first control signal indicates SCL2 decoding mode, the decoding unit may control selector 1, selector 2, selector 3 and selector 4 to be in the first state through SCL2_ En, and at this time, referring to fig. 5b, input 0 is connected to path 0 and path 1, input 2 is connected to path 2 and path 3, input 4 is connected to path 4 and path 5, and input 6 is connected to path 6 and path 7. Further, the coding unit may configure path 0 and path 1 as SCL2 coding modes for coding, path 2 and path 3 as SCL2 coding modes for coding, path 4 and path 5 as SCL2 coding modes for coding, and path 6 and path 7 as SCL2 coding modes for coding.

As can be seen from the above, the polar code decoder illustrated in fig. 5 can operate in the SC decoding mode or the SCL2 decoding mode according to the first control signal, so that the performance of the polar code decoder is diversified.

In another example, the first control signal is used to indicate an SC decoding mode or an SCL4 decoding mode, and at this time, the connection between the m inputs and the n paths may be: the fifth input end is connected with a third path, the fifth input end and the sixth input end are selectively connected with a fourth path through a second selector, the fifth input end and the seventh input end are selectively connected with a fifth path through a third selector, and the fifth input end and the eighth input end are selectively connected with the sixth path through a fourth selector; the fifth input, the sixth input, the seventh input, and the eighth input are four of the m inputs, the second selector, the third selector, and the fourth selector are three of the plurality of selectors, and the third path, the fourth path, the fifth path, and the sixth path are four of the n paths; when the second selector, the third selector and the fourth selector are in the first state, the fifth input end is respectively connected with the third path, the fourth path, the fifth path and the sixth path; when the second selector, the third selector and the fourth selector are in the second state, the fifth input end is connected with the third path, the sixth input end is connected with the fourth path, the seventh input end is connected with the fifth path, and the eighth input end is connected with the sixth path.

Based on this example, referring to fig. 6, another possible structure of a polar code decoder is illustrated. As shown in fig. 6, 8 inputs and 8 paths are selectively connected by 6 selectors (selector 1, selector 2, selector 3, selector 4, selector 5, selector 6): input end 0 is connected with path 0, input end 0 and input end 1 are connected with path 1 through selector 1, input end 0 and input end 2 are connected with path 2 through selector 2, input end 0 and input end 3 are connected with path 3 through selector 3; input terminal 4 is connected to path 4, input terminal 4 and input terminal 5 are connected to path 5 through selector 4, input terminal 4 and input terminal 6 are connected to path 6 through selector 5, and input terminal 4 and input terminal 7 are connected to path 7 through selector 6. The coding unit may control the selector 1, the selector 2, the selector 3, the selector 4, the selector 5, and the selector 6 to be in the first state or the second state through the SCL4_ En according to the first control signal.

If the first control signal indicates the SC decoding mode, the decoding unit may control the selector 1, the selector 2, the selector 3, the selector 4, the selector 5 and the selector 6 to be in the second state through SCL4_ En, in which, referring to fig. 5a, the input 0 is connected to path 0, the input 1 is connected to path 1, … … and the input 7 is connected to path 7. Further, the coding unit may configure each path to be coded in an SC coding mode.

If the first control signal indicates SCL4 decoding mode, the decoding unit can control the selector 1, the selector 2, the selector 3, the selector 4, the selector 5 and the selector 6 to be in the first state through SCL4_ En, and at this time, referring to fig. 6a, the input terminal 0 is connected to path 0, path 1, path 3 and path 4, and the input terminal 4 is connected to path 5, path 6, path 7 and path 8. Further, the coding unit may configure path 0, path 1, path 3, path 4 to be coded with SCL4 coding mode, and configure path 5, path 6, path 7, path 8 to be coded with SCL4 coding mode.

As can be seen from the above, the polar code decoder illustrated in fig. 6 can operate in the SC decoding mode or the SCL4 decoding mode according to the first control signal, so that the performance of the polar code decoder is diversified.

It should be noted that fig. 5 and fig. 6 are only two possible examples, and it can be seen from fig. 5 and fig. 6 that two different decoding modes can be implemented by adjusting the number and connection manner of the selectors between the m input terminals and the n paths (the polar code decoder in fig. 5 can implement the SC decoding mode and the SCL2 decoding mode, and the polar code decoder in fig. 6 can implement the SC decoding mode and the SCL4 decoding mode). In other examples, more than two decoding modes may be implemented by a single polar decoder. Further, the decoding modes that the polar code decoder can implement in the present application are not limited to the above SC decoding mode, SCL2 decoding mode, SCL4 decoding mode, but may also be SCL8 decoding mode, SCL16 decoding mode, SCL32 decoding mode, etc., which are not specifically listed here.

It can be understood that when configured in the SC decoding mode, the polar code decoder in the embodiment of the present application is split into n independent SC decoders; when configured in the SCL2 decoding mode, the polar code decoder in the embodiment of the present application is split into n/2 independent SCL2 decoders; when configured in the SCL4 decoding mode, the polar code decoder in the embodiment of the present application is split into n/4 independent SCL4 decoders; when configured in the SCL8 decoding mode, the polar code decoder in the embodiment of the present application is split into n/8 independent SCL8 decoders; when configured in the SCL16 decoding mode, the polar code decoder in the embodiment of the present application is split into n/16 independent SCL16 decoders; when configured in the SCL32 decoding mode, the polar code decoder in the embodiment of the present application splits into n/32 independent SCL32 decoders.

Based on the aforesaid polar code decoder, one possible decoding manner is a primary decoding, and specifically, the decoding unit directly obtains a final decoding result through the SC decoding mode or the SCLw1 decoding mode according to the first control signal. Another possible decoding method is two-level decoding, specifically, the decoding unit selects p3 candidate sets from the p1 candidate sets after performing SC decoding according to the first control signal, or the decoding unit selects p3 candidate sets from the p2 candidate sets after performing SCLw1 decoding according to the first control signal (first level decoding); furthermore, the control unit is further configured to send a second control signal to the decoding unit after the decoding unit selects the p3 candidate sets, where the second control signal is used to indicate SCL w2 decoding mode, and w2 is 2^h2(ii) a The decoding unit is further configured to receive a second control signal sent by the control unit, configure a second input terminal (the second input terminal is any one of p3 input terminals) to be correspondingly connected with w2 paths according to the second control signal, and pass through the second input terminalThe input end inputs the candidate set into w2 paths correspondingly connected with the second input end; and configuring the w2 paths correspondingly connected to the second input end as an SCL w2 decoding mode for decoding to obtain a final decoding result (second-stage decoding).

That is, if the decoding method is a first-level decoding method, the decoding result processing subunit in the decoding unit directly obtains the final decoding result according to the check result of each CRC subunit. If the decoding method is a two-stage decoding method, in the first-stage decoding, the decoding result processing subunit in the decoding unit may filter candidate sets according to path metric values of different paths, specifically, may select p3 candidate sets from the p1 candidate sets according to path metric values of p1 paths corresponding to the p1 candidate sets, or select p3 candidate sets from the p2 candidate sets according to path metric values of p2 × w1 paths corresponding to the p2 candidate sets; in a possible implementation manner, the decoding result processing subunit compares the path metric values of different paths with a path metric threshold, and further screens out a candidate set corresponding to a path whose path metric value is smaller than the path metric threshold, where the path metric threshold may be set according to an actual situation; in the second-level decoding, the decoding result processing subunit in the decoding unit obtains a final decoding result according to the decoding results of the screened candidate sets.

Further, in the two-stage decoding manner, since the number of the candidate sets is large when the first-stage decoding is performed, and the decoding result of the first-stage decoding is used for screening the candidate sets, and the number of the candidate sets is small when the second-stage decoding is performed, and the decoding result of the second-stage decoding is used for obtaining the final decoding result, the value of w2 may be set to be greater than the value of w1 in this embodiment, thereby facilitating the implementation of the first-stage decoding and the second-stage decoding.

Based on this, when the polar code decoder illustrated in fig. 4 performs two-stage decoding in the embodiment of the present application, there are many possible implementations, and the following details are listed.

Fig. 7a is a schematic diagram of decoding modes and data flows in a first possible implementation. As shown in fig. 7a, the first-level decoding mode is an SC decoding mode, p3 candidate sets are screened out after the first-level decoding, and the second-level decoding mode is an SCL8, SCL16, or SCL32 decoding mode.

Fig. 7b is a schematic diagram of decoding modes and data flows in a second possible implementation. As shown in fig. 7b, the first-level decoding mode is an SCL2 decoding mode, p3 candidate sets are screened out after the first-level decoding, and the second-level decoding mode is an SCL8 or SCL16 or SCL32 decoding mode.

Fig. 7c is a schematic diagram of decoding modes and data flows in a third possible implementation. As shown in fig. 7c, the first-level decoding mode is an SCL4 decoding mode, p3 candidate sets are screened out after the first-level decoding, and the second-level decoding mode is an SCL8 or SCL16 or SCL32 decoding mode.

As can be seen from the above, there may be two or more second-level coding modes for different first-level coding modes. In one possible implementation, the second-level coding mode, such as the SCL8 coding mode (in this case, the first-level coding mode may be the SC coding mode, the SCL2 coding mode, or the SCL4 coding mode), may be predetermined, so that the coding unit may directly adopt the SCL8 coding mode for coding.

Taking the first control signal for indicating the SC decoding mode and the second control signal for indicating the SCL4 decoding mode (see the structure of the polar code decoder illustrated in fig. 6) as an example, the flow of the two-stage decoding will be described in detail with reference to fig. 7 d. As shown in fig. 7d, includes:

step 700, acquiring p1 candidate sets from the candidate set, wherein p1 is less than or equal to m.

Here, m is 8, for example. If the number of candidate sets in the candidate set that have not been subjected to the first level decoding is greater than or equal to 8, p1 may be equal to 8, and if the number of candidate sets in the candidate set that have not been subjected to the first level decoding is less than 8, p1 may be equal to the number of candidate sets in the candidate set that have not been subjected to the first level decoding.

In step 701, p1 candidate sets are input from m input terminals.

In step 702, the decoding unit configures the connection mode between the input terminal and the path according to the first control signal, and configures the SC decoding mode for decoding (see fig. 5 a).

In step 703, p3 candidate sets are screened out.

Here, the decoding result processing subunit in the decoding unit filters out 2(p3 is 2) candidate sets according to the path metric values of p1 paths corresponding to p1 candidate sets, for example, the filtered candidate sets may be candidate set 0 at input terminal 0 and candidate set 4 at input terminal 4.

In step 704, the decoding unit configures the connection mode between the input terminal and the path according to the second control signal, and configures the SCL4 decoding mode for decoding (see fig. 5 b).

Here, if the two candidate sets screened in step 703 are candidate set 0 of input terminal 0 and candidate set 4 of input terminal 4, in step 704, the selector 1, the selector 2, the selector 3, the selector 4, the selector 5 and the selector 6 may be controlled to be in the first state directly through SCL4_ En, and SCL4 decoding may be performed; if the two candidate sets selected in step 703 are other parameters than the candidate set 0 of input terminal 0 and the candidate set 4 of input terminal 4, for example, the candidate set 1 of input terminal 1 and the candidate set 5 of input terminal 5, in step 704, the decoding unit needs to exchange positions of the candidate set 1 and the parameter 0, and positions of the parameter 4 and the parameter 5, so that the input terminal 0 inputs the parameter 1 and the input terminal 4 inputs the parameter 5, and controls the selector 1, the selector 2, the selector 3, the selector 4, the selector 5 and the selector 6 to be in the first state through SCL4_ En, and performs SCL4 decoding. It should be understood that the operations described herein are only the way that the polar code decoder illustrated in fig. 6 is based on, and if the polar code decoder is designed in other structures, the decoding unit may not need to perform the operation of switching the positions.

Step 705, whether candidate sets which are not subjected to the first-level decoding exist in the candidate set sets or not is judged, if yes, step 700 is executed, and if not, step 706 is executed.

It should be noted that, because the polar code decoder illustrated in fig. 6 has only 8 input ends, the above-mentioned one-time process can be executed to decode only 8 candidate sets, and if the number of the candidate sets is 44, the above-mentioned process needs to be executed 6 times, wherein, because there are only 4 candidate sets at the last time, in the first-stage decoding, part of the input ends are empty, at this time, the execution of the embodiment of the present application is not affected, and then 2 candidate sets are still screened out for the second-stage decoding. That is, the polar decoder needs to perform steps 701 to 704 6 times in a loop for 44 candidate sets.

And step 706, obtaining a final decoding result according to the decoding result of the screened candidate set.

Here, as can be seen from the above description, after the 44 candidate sets are subjected to the first-level decoding, a total of 12 candidate sets are screened out for the second-level decoding, so that in step 705, the final decoding result can be obtained according to the second-level decoding results of the 12 candidate sets.

It should be noted that, the above only illustrates the one-stage decoding manner and the two-stage decoding manner, and the polar code decoder in the embodiment of the present application may also provide more than two-stage decoding manners, which is not limited specifically.

The polar code decoder provided in the embodiment of the present application is not limited to the 5G NR scenario, and may also be applied to any other communication system using a polar code as a channel code, which is not specifically limited.

The embodiment of the present application further provides a decoding method, where the decoding method may be applied to the polar code decoder described in the above embodiment, and the decoding method includes:

receiving a first control signal; the first control signal is used to indicate a first coding mode or a second coding mode; if the first control signal is used for indicating a first decoding mode, configuring p1 input ends and p1 paths in a one-to-one correspondence manner, and inputting a first candidate set to the path to which the first input ends are correspondingly connected through a first input end; decoding the first candidate set through a path to which the first input terminal is correspondingly connected, wherein the first input terminal is any one of p1 input terminals, and p1 is an integer less than or equal to m; if the first control signal is used to indicate the second decoding mode, configuring a second input terminal to be connected with w1 paths, and inputting a second candidate set to w1 paths connected with the second input terminal through the second input terminal; and decoding the second candidate set through w1 paths correspondingly connected to the second input end, wherein the second input end is any one of p2 input ends, p2 is an integer smaller than or equal to m, w1 is an integer, and w1 is not more than n.

In one possible design, the method further includes:

selecting p3 candidate sets from the p1 candidate sets, or selecting p3 candidate sets from the p2 candidate sets; p3 is an integer less than p1 or less than p 2; and receiving a second control signal, the second control signal indicating a third coding mode; configuring a ninth input terminal to be correspondingly connected with w2 paths according to the second control signal, and inputting a candidate set to w2 paths correspondingly connected with the ninth input terminal through the ninth input terminal; and decoding a third candidate set through w2 paths correspondingly connected to the ninth input terminal, wherein the ninth input terminal is any one of p3 input terminals, w2 is an integer, and w2 is not more than n. Further, the third coding mode may specifically refer to an SCL coding mode, so w2 may be equal to 2^h2And h2 is an integer greater than or equal to 1.

An embodiment of the present application further provides a data transmission apparatus, which includes the polar code decoder in any of the above designs.

Fig. 8 is a schematic structural diagram of a data transmission device provided in an embodiment of the present invention (for example, a communication device such as an access point, a base station, a station, or a terminal, or a chip in the communication device). As shown in fig. 8 below, the data transfer device 800 may be implemented by a bus 801 as a general bus architecture. The bus 801 may include any number of interconnecting buses and bridges depending on the specific application of the data transfer device 800 and the overall design constraints. Bus 801 couples various circuits together including a processor 802, a storage medium 803, and a bus interface 804, where the processor may include a polar code decoder as described above in relation to fig. 4, 5, or 6. Alternatively, the data transmission apparatus 800 connects the receiver front-end processing unit 805 and the like via the bus 801 using the bus interface 804. The receiver front-end processing unit 805 may be used to implement signal processing functions at the physical layer of a wireless communication network and to implement the transmission and reception of radio frequency signals via the antenna 807. The user interface 806 may connect user terminals, such as: a keyboard, a display, a mouse or a joystick, etc. The bus 801 may also connect various other circuits such as timing sources, peripherals, voltage regulators, or power management circuits, which are well known in the art, and therefore, will not be described in detail.

Alternatively, the data transmission device 800 may also be configured as a general purpose processing system, for example, commonly referred to as a chip, including: one or more microprocessors providing processor functionality; and an external memory providing at least a portion of storage medium 803, all connected together with other support circuitry via an external bus architecture.

Alternatively, the data transmission device 800 may be implemented using: an ASIC (application specific integrated circuit) having a processor 802, a bus interface 804, a user interface 806; and at least a portion of the storage medium 803 integrated in a single chip, or the data transfer device 800 may be implemented using: one or more FPGAs (field programmable gate arrays), PLDs (programmable logic devices), controllers, state machines, gate logic, discrete hardware components, any other suitable circuitry, or any combination of circuitry capable of performing the various functions described throughout this disclosure.

Among other things, the processor 802 is responsible for managing the bus and general processing (including executing software stored on the storage medium 803). The processor 802 may be implemented using one or more general-purpose processors and/or special-purpose processors. Examples of processors include microprocessors, microcontrollers, DSP processors, and other circuits capable of executing software. Software should be construed broadly to mean instructions, data, or any combination thereof, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise.

The storage medium 803 is shown in the following figures as being separate from the processor 802, however, it will be readily apparent to those skilled in the art that the storage medium 803, or any portion thereof, may be located outside of the data transmission device 800. Storage medium 803 may include, for example, a transmission line, a carrier waveform modulated with data, and/or a computer product separate from the wireless node, all of which may be accessed by processor 802 via bus interface 804. Alternatively, storage medium 803, or any portion thereof, may be integral to processor 802, e.g., may be a cache and/or general purpose registers.

The polar code decoder in the processor 802 can perform the process illustrated in fig. 7d, which is not described herein again.

Alternatively, all or part of the implementation may be in software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.

It will be apparent to those skilled in the art that various modifications and variations can be made in the embodiments of the present invention without departing from the spirit and scope of the application. Thus, if such modifications and variations of the embodiments of the present invention fall within the scope of the claims of the present application and their equivalents, the present application is also intended to encompass such modifications and variations.

Claims

1. The polar code decoder is characterized by comprising a decoding unit and a control unit which is in communication connection with the decoding unit; the decoding unit comprises m input ends and n paths, the m input ends are selectively connected with the n paths, m and n are integers, and m is less than or equal to n;

if the first control signal is used to indicate the SC decoding mode, configuring p1 inputs and p1 paths in a one-to-one correspondence, and inputting a first candidate set (candidate) to the path corresponding to the first input through the first input; configuring a path correspondingly connected with the first input end as an SC decoding mode for decoding, wherein the first input end is any one of p1 input ends, and p1 is an integer less than or equal to m;

2. The polar code decoder according to claim 1, wherein the m inputs are selectively connected to the n paths, comprising:

3. The polar code decoder according to claim 2, wherein the first control signal is used to indicate an SC coding mode or an SCL2 coding mode;

4. The polar code decoder according to claim 2, wherein the first control signal is used to indicate an SC coding mode or an SCL4 coding mode;

the fifth input end is connected with the third path, the fifth input end and the sixth input end are selectively connected with the fourth path through a second selector, the fifth input end and the seventh input end are selectively connected with the fifth path through a third selector, and the fifth input end and the eighth input end are selectively connected with the sixth path through a fourth selector; the fifth input, the sixth input, the seventh input, and the eighth input are four of the m inputs, the second selector, the third selector, and the fourth selector are three of the plurality of selectors, and the third path, the fourth path, the fifth path, and the sixth path are four of the n paths;

5. The polar code decoder according to claim 1, characterized in that:

the coding unit further configured to select p3 candidate sets from the p1 candidate sets or p3 candidate sets from the p2 candidate sets; p3 is an integer less than p1 or less than p 2;

The decoding unit is further configured to receive a second control signal sent by the control unit, configure a ninth input end to be correspondingly connected with w2 paths according to the second control signal, and input a third candidate set to w2 paths correspondingly connected to the ninth input end through the ninth input end; and configuring w2 paths correspondingly connected to the ninth input terminal as an SCL w2 decoding mode for decoding, wherein the ninth input terminal is any one of p3 input terminals.

6. The polar-code decoder according to claim 5, wherein the decoding unit selects p3 candidate sets from the p1 candidate sets, comprising: the coding unit selects p3 candidate sets from the p1 candidate sets according to path metric values of p1 paths corresponding to the p1 candidate sets;

the coding unit selects p3 candidate sets from the p2 candidate sets, comprising: the coding unit selects p3 candidate sets from the p2 candidate sets according to path metric values of p2 xw 1 paths corresponding to the p2 candidate sets.

7. The polar code decoder according to claim 5 or 6, characterized in that the first control signal is used for indicating an SC coding mode, and the second control signal is used for indicating an SCL8 coding mode.

8. A data transmission apparatus, characterized in that the data transmission apparatus comprises a polar code decoder according to any one of claims 1 to 7.

9. A decoding method is applied to a polar code decoder, wherein the polar code decoder comprises m input ends and n paths, the m input ends are selectively connected with the n paths, m and n are integers, and m is less than or equal to n; the coding method comprises the following steps:

10. The coding method according to claim 9, wherein the method further comprises:

receiving a second control signal, the second control signal indicating a third coding mode;