CN109932997A - A kind of programmable logic controller (PLC) core system - Google Patents
A kind of programmable logic controller (PLC) core system Download PDFInfo
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Abstract
The invention discloses a kind of programmable logic controller (PLC) core system, which includes PLC kernel, and the PLC kernel includes communications processor element, program execution unit, storage unit and hardware driving interface;Communications processor element is used for setting, uploading and downloading for user program and the uploading and downloading for variable of rights management;Program execution unit is for executing user program;Storage unit is used to save the holding of user program and operation result, and operation result is as obtained by program execution unit execution user program;Hardware driving interface is used to that operation result to be flushed to new hardware device by preset hardware drive program;Its effect is: completely being encapsulated to the functional characteristic of PLC kernel and high abstraction, written in code is carried out without professional, filling in for related hardware parameter is completed as operation table, energy automatically generating program, compiling is output to the exploitation that PLC is completed on new hardware device, the efficiency of PLC functional development is greatly improved, maintenance cost is reduced.
Description
Technical field
The present invention relates to programmable logic controller (PLC) technical fields, and in particular to a kind of programmable logic controller (PLC) kernel system
System.
Background technique
Programmable logic controller (PLC) (PLC, Programmable Logic Controller) is that one kind is widely used in certainly
The controller of autocontrol system, hardware configuration are substantially identical as microcomputer.Wherein, central processing unit (CPU,
Central Processing Unit) be PLC control axis.PLC also has PLC compiler, is used for serial, use
The automatic control program (hereinafter referred to as user program) of Engineering Language description is converted to the machine code executed for CPU, in turn
CPU is carried out each instruction in control program.
However in the prior art, the exploitation to PLC is completed, professional technician is needed to be developed for a long time,
Development cost is high, development progress is slow.
Summary of the invention
The object of the present invention is to provide a kind of costs for reducing PLC exploitation, reduce the dependence to professional technician
A kind of programmable logic controller (PLC) core system.
A kind of technical solution that present example is taken are as follows: a kind of programmable logic controller (PLC) core system, including in PLC
Core, the PLC kernel include communications processor element, program execution unit, storage unit and hardware driving interface;
The communications processor element for the setting of rights management, the upload of user program uploaded and downloaded with variable with
Downloading;
Described program execution unit is for executing the user program;
The storage unit is used to save the holding of the user program and operation result, and the operation result passes through institute
Program execution unit is stated to execute obtained by user program;
The hardware driving interface is used to flush to the operation result by preset hardware drive program new hard
In part equipment.
As a preferred technical solution of the invention, the storage unit includes user program internal storage location, in I/O
Deposit unit map and permanent location;
The permanent location is for saving the user program;
The I/O memory mapping unit is used for the holding of the operation result;
The user program internal storage location is used for when executing the user program, reads institute from the permanent location
It states user program and is stored, while recording every section of program memory address generated in storage in the user program.
As a preferred technical solution of the invention, the permanent location is specifically included: the first internal storage location,
Second internal storage location, third internal storage location, the 4th internal storage location and the 5th internal storage location;
First internal storage location is used to store specification information --- the model of controller of hardware device in user program,
The size and I/O of memory space are counted and user right information;
Second internal storage location is for storing variable in user program, and variable is divided into two kinds: one is memory variables, no
Use Hardware I/O point information table;Another variable be with Hardware I/O point information table phase mapping, access this variable, just
It is access Hardware I/O point information table.The I/O information table of hardware module, i.e. Hardware I/O points mapping table, each I/O point have
Facilitate the alias that user program uses, and the relation table between alias and Hardware I/O, it is exactly the I/O information table of hardware module;
The third internal storage location is used to reserve in user program for user, uses convenient for extension;
4th internal storage location is used to store the code segment information of different priorities task in user program;
5th internal storage location is used to store the code segment information of event handling task in user program.
As a preferred technical solution of the invention, described program execution unit includes core processor, code segment
Pointer, data segment pointer and offset pointer;
When executing user program, the code segment pointer takes out the finger of corresponding code segment from the address of the offset pointer
It enables;
The core processor enters corresponding execution task according to the instruction of the code segment, and judges the code segment
Instruction in whether there is parameter, be not present, then judge whether user program terminates;In the presence of then being referred to according to the parameter
Operation is enabled, and modifies the address of the offset pointer after operation, after executing the last item instruction, stops user program
Execute and stop the record of task flagging and temporal information.
As a preferred technical solution of the invention, when the core processor executes user task, according to priority
The descending of task arranges carry out task switching, and within a preset time can not put into again it after the execution of any priority tasks
It executes.
As a preferred technical solution of the invention, when task switching, the core processor ought be former
The code segment pointer of business, data segment pointer and value in offset pointer and stop task flagging and temporal information is all stored in
In the preset address that code segment pointer is directed toward.
As a preferred technical solution of the invention, the data segment pointer includes the first data segment pointer and second
Data segment pointer;
The first data segment pointer is for being directed toward data segment hardware-related in the code segment pointer;
The second data segment pointer is for being directed toward data segment unrelated with hardware in the code segment pointer.
By adopting the above technical scheme, a kind of programmable logic controller (PLC) kernel system proposed by the present invention is had the advantage that
System, by the system, we are completely encapsulated the functional characteristic of PLC kernel and high abstraction, we can not have to understanding
What PLC is, need to only carry out filling in for hardware drive program, so that it may be flushed on new hardware device and complete PLC's
Exploitation reduces the dependence to professional technician, and can greatly improve development progress to reduce the cost of PLC exploitation.
Detailed description of the invention
Fig. 1 is the system structure diagram of the embodiment of the present invention;
Fig. 2 is method flow diagram when executing user program in the embodiment of the present invention;
Fig. 3 is the structural schematic diagram of memory address in the embodiment of the present invention.
Specific embodiment
In order to keep the technical problem to be solved in the present invention, technical solution and advantage clearer, below in conjunction with attached drawing and
Specific embodiment is described in detail, and the following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention..
Shown in referring to Fig.1, a kind of programmable logic controller (PLC) core system, including PLC kernel, the PLC kernel include
Communications processor element, program execution unit, storage unit and hardware driving interface.
The communications processor element for the setting of rights management, the upload of user program uploaded and downloaded with variable with
Downloading.
Specifically, the communications processor element is communicated with PLC compiler, and user carries out password by PLC compiler
Setting, only password match when, just establish connection and have corresponding permission.
Described program execution unit is for executing the user program.
Specifically, described program execution unit includes that core processor, code segment pointer, data segment pointer and offset refer to
Needle, wherein the data segment pointer includes the first data segment pointer and the second data segment pointer;
The first data segment pointer is for being directed toward data segment hardware-related in the code segment pointer;
The second data segment pointer is for being directed toward data segment unrelated with hardware in the code segment pointer.
When executing user program, as shown in Fig. 2, the code segment pointer takes out correspondence from the address of the offset pointer
The instruction of code segment;
The core processor enters corresponding execution task according to the instruction of the code segment, and judges the code segment
Instruction in whether there is parameter, be not present, then judge whether user program terminates;In the presence of then being referred to according to the parameter
Operation is enabled, and modifies the address of the offset pointer after operation, after executing the last item instruction, stops user program
Execute and stop the record of task flagging and temporal information.
That is the implementation procedure of entire user program is exactly that instruction is taken out from code segment pointer, then according to instruction
Content takes out parameter, and the value of code segment pointer is modified according to parameter, until the program when code segment goes to the last item instruction
When, and at the end of determining program, stop the execution of user program and stop the record of task flagging and temporal information, together
When enter task and switch and save running environment, above-mentioned is with the code segment implementation procedure in the user program of a user task
It illustrates, the implementation procedure of other programs is identical with this, and details are not described herein.
The storage unit is used to save the holding of the user program and operation result, and the operation result passes through institute
Program execution unit is stated to execute obtained by user program.
Specifically, the storage unit includes user program internal storage location, I/O memory mapping unit and permanently stores list
Member.
The permanent location is for saving the user program;Wherein, permanent location specifically includes:
First internal storage location, the second internal storage location, third internal storage location, the 4th internal storage location and the 5th internal storage location;
First internal storage location is used to store the specification information and user right information of hardware device in user program;
Second internal storage location is for storing the information table of variable and hardware module in user program;
The third internal storage location is used to reserve in user program for user, uses convenient for extension;
4th internal storage location is used to store the code segment information of different priorities task in user program;
5th internal storage location is used to store the code segment information of event handling task in user program;It uses in this way
User program is managed in the form of section, so that it supports the ability of Multi-task Concurrency execution.
The I/O memory mapping unit is used for the holding of the operation result.
Specifically, PLC kernel can first obtain intermediate command coding, according to finger when executing user program (i.e. PLC program)
The corresponding procedure function of content call instruction code for enabling code, the inside of this function call determine its instruction followed by parameter
The bit wide that several and parameter occupies, PLC kernel completes the execution of intermediate command accordingly, and the result of instruction operation is stored in
In the I/O memory mapping unit, in execution process instruction, there is no other peripheral hardwares to participate in operation other than memory device,
The implementation procedure of namely kernel is unrelated with its hardware device height.
The user program internal storage location is used for when executing the user program, reads institute from the permanent location
It states user program and is stored, while recording every section of program memory address generated in storage in the user program.
Wherein, the structure of the memory address is as shown in figure 3, namely will be after every section of program is hashed in user program
Form.
The hardware driving interface is used to flush to the operation result by preset hardware drive program new hard
In part equipment.
Specifically, hardware drive program, is a series of interface function, these interface functions are that PLC kernel and hardware are flat
Tie between platform, PLC kernel are got in touch by hardware drive program and new hardware device, to transport PLC kernel normally
Row, it is only necessary to which filling in hardware drive program appropriate can be completed the exploitation of PLC, reduces the cost of PLC exploitation, reduces pair
The dependence of professional technician, and development progress can be greatly improved.
Through the foregoing embodiment, the functional characteristic of PLC kernel is completely encapsulated and high abstraction, we can not
With PLC is understood what is, need to only carry out filling in for hardware drive program and specification representation file, so that it may be flushed to new
The exploitation that PLC is completed on hardware device reduces the dependence to professional technician to reduce the cost of PLC exploitation, and
Development progress can be greatly improved.
It should be noted that wherein specification representation file is the file of an Execl format, as long as according in form document
Description fill up a form, so that it may generate specification representation file, specification representation file be sent in PLC kernel later, with regard to phase
When in providing specification representation file.
Further, when the core processor executes user task, according to priority the descending of task arranges carry out task
Switching, and it can not be put into again to execution within a preset time after the execution of any priority tasks.
It specifically, include the interruption of a 10ms inside PLC kernel, every 10ms can check the priority of user task, when
After the task execution of one high priority, execution cannot be put into again in 20ms, the task of such low priority can be thrown
Enter to execute, that is to say, that after each task execution, it is necessary to wait 20ms to put into execution again, to guarantee appointing for low priority
Business has the chance of execution.For example, event task priority > 0 priority of task > 1 priority of task > task 2 in priority list
Priority > 3 priority of task > task, 4 priority.PLC kernel every 10ms only checks the task higher than oneself priority when interrupting
Whether can execute, after current task is finished, according to priority low search from high in the end, determine next times to be executed
Business.
Further, when task switches, the core processor refers to code segment pointer, the data segment of current task
Value in needle and offset pointer and stop task flagging and temporal information is all stored in the default of code segment pointer direction
In location.
Specifically, after the code segment that the search of PLC kernel can execute, directly the section is put into and is executed;It can if can not find
With the code segment of execution, then the code of highest priority is stopped into scheduling label and stop scheduling time releasing, keep highest preferential
The code segment of grade, which is put into, to be executed, and PLC kernel prevents priority from there are discontinuous situations, that is, when only one code
Duan Shi, the priority of this code segment must be highest;There are two when job, one of task is that highest is preferential
Grade, and another task must be time high priority, what needs to be explained here is that, code segment 0 refers in preset address, that is, Fig. 3
The position of needle.
Finally, it should be noted that foregoing description is only a specific embodiment of the invention, but protection scope of the present invention
It is not limited thereto, anyone skilled in the art in the technical scope disclosed by the present invention, can readily occur in
Change or replacement, should be covered by the protection scope of the present invention.
Claims (7)
1. a kind of programmable logic controller (PLC) core system, which is characterized in that including PLC kernel, the PLC kernel includes communication
Processing unit, program execution unit, storage unit and hardware driving interface;
The communications processor element for the setting of rights management, user program upload and download and the upload of variable is under
It carries;
Described program execution unit is for executing the user program;
The storage unit is used to save the holding of the user program and operation result, and the operation result passes through the journey
Sequence execution unit executes obtained by user program;
The hardware driving interface is set for the operation result to be flushed to new hardware by preset hardware drive program
It is standby upper.
2. a kind of programmable logic controller (PLC) core system according to claim 1, which is characterized in that the storage unit
Including user program internal storage location, I/O memory mapping unit and permanent location;
The permanent location is for saving the user program;
The I/O memory mapping unit is used for the holding of the operation result;
The user program internal storage location is used for when executing the user program, reads the use from the permanent location
Family program is simultaneously stored, while recording every section of program memory address generated in storage in the user program.
3. a kind of programmable logic controller (PLC) core system according to claim 2, which is characterized in that described to permanently store
Unit specifically includes: the first internal storage location, the second internal storage location, third internal storage location, deposit receipt in the 4th internal storage location and the 5th
Member;
First internal storage location is used to store the specification information and user right information of hardware device in user program;
Second internal storage location is for storing the information table of variable and hardware module in user program;
The third internal storage location is used to reserve in user program for user, uses convenient for extension;
4th internal storage location is used to store the code segment information of different priorities task in user program;
5th internal storage location is used to store the code segment information of event handling task in user program.
4. a kind of programmable logic controller (PLC) core system according to claim 1, which is characterized in that described program executes
Unit includes core processor, code segment pointer, data segment pointer and offset pointer;
When executing user program, the code segment pointer takes out the instruction of corresponding code segment from the address of the offset pointer;
The core processor enters corresponding execution task according to the instruction of the code segment, and judges the finger of the code segment
It whether there is parameter in order, be not present, then judge whether user program terminates;In the presence of then carrying out instruction fortune according to the parameter
It calculates, and modifies the address of the offset pointer after operation, after executing the last item instruction, stop the execution of user program
And stop the record of task flagging and temporal information.
5. a kind of programmable logic controller (PLC) core system according to claim 3, which is characterized in that the kernel processes
Device execute user task when, according to priority task descending arrange carry out task switching, and any priority tasks execute after
It can not be put into again to execution in preset time.
6. a kind of programmable logic controller (PLC) core system according to claim 4, which is characterized in that when task switches
When, the core processor is by the value and stopping in the code segment pointer, data segment pointer and offset pointer of current task
Task flagging and temporal information are all stored in the preset address of code segment pointer direction.
7. a kind of programmable logic controller (PLC) core system according to claim 4, which is characterized in that the data segment refers to
Needle includes the first data segment pointer and the second data segment pointer;
The first data segment pointer is for being directed toward data segment hardware-related in the code segment pointer;
The second data segment pointer is for being directed toward data segment unrelated with hardware in the code segment pointer.
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Publication number | Priority date | Publication date | Assignee | Title |
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CN114363323A (en) * | 2022-01-06 | 2022-04-15 | 东莞市云雀科技有限公司 | Intelligent data uploading method for PLC |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1218567A (en) * | 1996-03-13 | 1999-06-02 | 钻石多媒体系统公司 | Multiple parallel digital data stream channel controller architecture |
CN103984603A (en) * | 2012-03-31 | 2014-08-13 | 华为技术有限公司 | Method and device for detecting memory unit |
CN104898546A (en) * | 2015-05-06 | 2015-09-09 | 浙江中控研究院有限公司 | PLC (Programmable Logic Controller) on-line debugging system and method based on SOC (System On Chip) |
CN106125664A (en) * | 2016-08-12 | 2016-11-16 | 绵阳市维博电子有限责任公司 | An Embedded PLC Control System |
CN106843127A (en) * | 2017-02-28 | 2017-06-13 | 深圳市麦格米特控制技术有限公司 | A kind of Medium PLC system |
-
2019
- 2019-03-01 CN CN201910155771.0A patent/CN109932997B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1218567A (en) * | 1996-03-13 | 1999-06-02 | 钻石多媒体系统公司 | Multiple parallel digital data stream channel controller architecture |
CN103984603A (en) * | 2012-03-31 | 2014-08-13 | 华为技术有限公司 | Method and device for detecting memory unit |
CN104898546A (en) * | 2015-05-06 | 2015-09-09 | 浙江中控研究院有限公司 | PLC (Programmable Logic Controller) on-line debugging system and method based on SOC (System On Chip) |
CN106125664A (en) * | 2016-08-12 | 2016-11-16 | 绵阳市维博电子有限责任公司 | An Embedded PLC Control System |
CN106843127A (en) * | 2017-02-28 | 2017-06-13 | 深圳市麦格米特控制技术有限公司 | A kind of Medium PLC system |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114363323A (en) * | 2022-01-06 | 2022-04-15 | 东莞市云雀科技有限公司 | Intelligent data uploading method for PLC |
CN114363323B (en) * | 2022-01-06 | 2024-06-07 | 东莞市云雀科技有限公司 | Intelligent data uploading method for PLC |
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