Memory transfer VPP_2V5 circuit and computer
Technical Field
The present invention relates to the field of electronic technology, and in particular, to a circuit for converting memory into vpp_2v5 and a computer.
Background
The computer has evolved from birth to the present, has undergone different stages from simple to complex and from low to high, and the application has only been expanded from military to the present education, medical treatment and other fields, which has profound effects on aspects of human society. With the increasing popularity of computers and the increasing level of living, more and more consumers have an increasing demand for computer performance. Memory is one of the most important components of a computer and is the bridge for communication with a CPU. All programs of the computer can run without the memory, so that the quality of the memory signal directly influences the performance of the memory, and further influences the performance of the whole machine.
The existing memory signal mainly comprises three parts: the circuit schematic of the conventional circuit for converting VDDQ, VDDQ_VTT and VPP_2V5 to VPP_2V5 is shown in FIG. 1. In the conventional vpp_2v5 switching circuit, the EN pin of the voltage stabilizing chip IC is controlled, and when the signal slp_s4_n is at a low level, the input of the EN pin is at a low level, and the voltage stabilizing chip IC does not operate. When the signal slp_s4_n is at a high level, the input of the EN pin is at a high level, and when the voltage on the VIN pins (PVIN 1, PVIN2, and SVIN) is within the design requirement range of the voltage regulator chip IC, the voltage regulator chip IC operates, and the VPP supply voltage vout= (1+ (RP 1/RP 2)) ×0.6, wherein 0.6V is the VPP supply voltage inside the FB pin when the voltage regulator chip IC operates normally, and Vout represents the voltage +vpp2v5. By changing the values of the resistor RP1 and the resistor RP2, the voltage value +vpp2v5 required for the design can be obtained.
However, in the conventional vpp_2v5 conversion circuit, since the size of the voltage stabilizing chip IC and the size of the inductor are large, the number of parts such as resistors and capacitors required is large, and the occupied PCB space is increased, so that the size of the PCB is increased, and the requirement for Layout (wiring) is also increased at the same time as high cost. In addition, the number and the variety of the parts are increased, so that the factory production is inconvenient. In addition, the circuit of the switch vpp_2v5 circuit is complicated, resulting in an engineer spending a lot of time in debug.
Disclosure of Invention
Aiming at the technical problems, the embodiment of the invention provides a memory transfer VPP_2V5 circuit and a computer, which are used for solving the problems that the circuit of the traditional transfer VPP_2V5 circuit is complex, the parts are more, and the size of a PCB is increased.
The embodiment of the invention provides a memory to VPP_2V5 circuit which is connected with a memory and a power module and comprises an input unit, a control unit and an output unit;
the input unit filters the first voltage output by the power supply module and transmits the first voltage to the control unit; the control unit receives and filters the second voltage output by the power supply module, starts and outputs an output voltage when the second voltage and the first voltage are detected successively, and generates a VPP power supply voltage after dividing the output voltage by the output unit and transmits the VPP power supply voltage to the memory;
the input unit is connected with the power supply module and the control unit, and the control unit is connected with the power supply module, the output unit and the memory.
Optionally, in the memory to vpp_2v5 circuit, the input unit includes a first resistor, a first capacitor, a second capacitor, and a third capacitor;
one end of the first capacitor is connected with the first power supply end, one end of the second capacitor, one end of the third capacitor, one end of the first resistor and the control unit; the other end of the first resistor is connected with the control unit, and the other end of the first capacitor, the other end of the second capacitor and the other end of the third capacitor are grounded.
Optionally, in the memory to vpp_2v5 circuit, the control unit includes a power chip, a second resistor, a third resistor and a fourth capacitor;
the POK pin of the power supply chip is connected with the sequential logic control end and is also connected with the VPP power supply end through a third resistor; the EN pin of the power chip is connected with the other end of the first resistor, and the VIN pin of the power chip is connected with one end of the third capacitor and one end of the first resistor; the CNTL pin of the power chip is connected with a second power end through a second resistor and is grounded through a fourth capacitor; the FB pin and the VOUT pin of the power supply chip are both connected with the output unit, and the GND pin of the power supply chip is grounded.
Optionally, in the memory transfer vpp_2v5 circuit, the output unit includes a fourth resistor, a fifth capacitor, a sixth capacitor, a seventh capacitor and an eighth capacitor;
one end of the fourth resistor is connected with the VPP power supply end, one end of the fifth capacitor and the VOUT pin of the power supply chip; the other end of the fourth resistor is connected with the other end of the fifth capacitor, one end of the fifth resistor and the FB pin of the power supply chip; one end of the sixth capacitor is connected with one end of the fifth capacitor, one end of the seventh capacitor and one end of the eighth capacitor; the other end of the sixth capacitor, the other end of the seventh capacitor, the other end of the eighth capacitor and the other end of the fifth resistor are grounded.
Optionally, in the memory to vpp_2v5 circuit, the first resistor is a pull-up resistor; the capacitance value of the first capacitor and the second capacitor is 10 muF.
Optionally, in the memory transfer vpp_2v5 circuit, the power chip is UP0104PSUB.
Optionally, in the memory transfer vpp_2v5 circuit, the resistance of the fourth resistor is 22kΩ, and the resistance of the fifth resistor is 10kΩ.
Optionally, in the memory transfer vpp_2v5 circuit, the capacitance values of the fifth capacitor, the sixth capacitor, the seventh capacitor and the eighth capacitor are 33pF, 47 μf and 47 μf, respectively.
Optionally, in the memory transfer vpp_2v5 circuit, the voltage value of the first voltage is 3V, and the voltage value of the second voltage is 5V.
The second aspect of the embodiment of the invention provides a computer, which comprises a circuit board, wherein a memory and a power module are arranged on the circuit board, the circuit board is also provided with a memory-to-VPP_2V5 circuit, and the memory-to-VPP_2V5 circuit is connected with the memory and the power module;
the power module sequentially outputs a second voltage and a first voltage according to a sequence to start the memory-to-VPP_2V5 circuit, and outputs VPP power supply voltage required by the memory after the memory-to-VPP_2V5 circuit is started and transmits the VPP power supply voltage to the memory.
In the technical scheme provided by the embodiment of the invention, the computer comprises a memory, a power supply module and a memory-to-VPP_2V5 circuit, wherein the memory-to-VPP_2V5 circuit comprises an input unit, a control unit and an output unit; the input unit filters the first voltage output by the power supply module and transmits the first voltage to the control unit; the control unit receives and filters the second voltage output by the power supply module, starts and outputs an output voltage when the second voltage and the first voltage are detected successively, and the output unit divides the output voltage to generate a VPP power supply voltage and transmits the VPP power supply voltage to the memory. Because the first voltage and the second voltage are directly connected, the control circuit of the existing EN pin is reduced, complicated control is avoided, power consumption is not influenced, parts of devices are reduced, cost can be saved, space occupation of a PCB (printed circuit board) can be reduced, and therefore the problems that the circuit of the existing VPP_2V5 converting circuit is complex, parts are more, and the size of the PCB is increased are solved.
Drawings
Fig. 1 is a circuit diagram of a conventional circuit for converting vpp_2v5.
Fig. 2 is a schematic diagram of a computer according to an embodiment of the invention.
Fig. 3 is a schematic circuit diagram of a control unit, a card switching unit and an earphone socket in the memory transfer vpp_2v5 circuit according to an embodiment of the invention.
Fig. 4 is a simplified schematic diagram illustrating an internal structure of a power chip in the memory to vpp_2v5 circuit according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. Embodiments of the present invention are intended to be within the scope of the present invention as defined by the appended claims.
Referring to fig. 2, the computer provided by the embodiment of the invention includes a circuit board (i.e. a motherboard), on which a memory to vpp_2v5 circuit 10, a memory 20 and a power module 30 are disposed; the memory to vpp_2v5 circuit 10 connects the memory 20 and the power module 30. The power module 30 sequentially outputs the second voltage and the first voltage according to the sequence to start the memory-to-vpp_2v5 circuit 10, and the VPP power supply voltage required by the memory is output and transmitted to the memory after the memory-to-vpp_2v5 circuit 10 is started. The memory transfer vpp_2v5 circuit 10 also outputs a vpp_pwrok signal for timing logic control of other lines, which is the prior art (i.e., vpp_pwrok signal in fig. 1), and is not described herein.
It should be understood that the computer may be a desktop computer; the memory-to-VPP_2V5 circuit is widely applied, can be also used for electronic products using memories such as LEDs, LCDs and the like, and has huge application market.
The memory to vpp_2v5 circuit 10 includes an input unit 110, a control unit 120, and an output unit 130; the input unit 110 is connected to the power module 30 and the control unit 120, and the control unit 120 is connected to the power module 30, the output unit 130 and the memory 20. The input unit 110 filters the first voltage output by the power module 30 and transmits the filtered first voltage to the control unit 120; the control unit 120 receives and filters the second voltage output by the power module 30, starts and outputs an output voltage when the second voltage and the first voltage are detected sequentially, and the output unit 130 divides the output voltage to generate a VPP supply voltage and transmits the VPP supply voltage to the memory.
Referring to fig. 3, the input unit 110 includes a first resistor R1, a first capacitor C1, a second capacitor C2, and a third capacitor C3; one end of the first capacitor C1 is connected to the first power supply end +3vs, one end of the second capacitor C2, one end of the third capacitor C3, one end of the first resistor R1 and the control unit 120; the other end of the first resistor R1 is connected to the control unit 120, and the other end of the first capacitor C1, the other end of the second capacitor C2 and the other end of the third capacitor C3 are grounded.
The resistance value of the first resistor R1 is preferably 10K, and is used as a pull-up resistor. The first capacitor C1 (preferably 10 μf), the second capacitor C2 (preferably 10 μf) and the third capacitor C3 (preferably 0.1 μf) filter a first voltage (e.g., 3V) input to the first power supply +3vs, and the input of the first voltage (e.g., 3V) is used to start the control unit 120.
The control unit 120 includes a power chip U1, a second resistor R2, a third resistor R3 (with a resistance value of preferably 47kΩ) and a fourth capacitor C4; the POK pin of the power chip U1 is connected with a sequential logic control end (namely the sequential logic control ends of other circuits of the main board are in the prior art) and is also connected with a VPP power supply end +VPP_2V5 through a third resistor R3; the EN pin of the power chip U1 is connected with the other end of the first resistor R1, and the VIN pin of the power chip U1 is connected with one end of the third capacitor C3 and one end of the first resistor R1; the CNTL pin of the power chip U1 is connected with a second power end +5VS through a second resistor R2 and grounded through a fourth capacitor C4; the FB pin and VOUT pin of the power chip U1 are both connected to the output unit 130, and the GND pin of the power chip U1 is grounded.
The model of the power chip U1 is preferably UP0104PSUB. When both the EN pin and the VIN pin are high, the power chip U1 is operated. The second voltage (e.g. 5V) input by the second power supply terminal +5vs is limited by the second resistor R2, and then is filtered by the fourth capacitor C4 (preferably 0.1 μf) and transmitted to the CNTL pin of the power supply chip U1, so as to supply power to the control loop and the transistor in the power supply chip U1. The second voltage (e.g., 5V) on CNTL pin must arrive earlier than the first voltage (e.g., 3V) on VIN pin, so that the power chip U1 can operate normally after being started. The POK pin of the power supply chip U1 is a detection pin of the VPP power supply voltage (i.e. the voltage on the VPP power supply terminal +VPP2V5), and is in a high resistance state when the VPP power supply voltage reaches 92% (e.g. 2.3V) of the set value. The impedance of the PIN is in a high-impedance state, and the high-impedance state is that the resistance is equivalent to infinity, so that open circuit understanding can be realized to a certain extent; the influence on the previous stage circuit is small, no current is generated (no attenuation is generated), and the voltage shock resistance of the chip is improved to a certain extent.
The output unit 130 includes a fourth resistor R4, a fifth resistor R5, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and an eighth capacitor C8; one end of the fourth resistor R4 is connected with the VPP power supply end +VPP_2V5, one end of the fifth capacitor C5 and the VOUT pin of the power supply chip U1; the other end of the fourth resistor R4 is connected with the other end of the fifth capacitor C5, one end of the fifth resistor R5 and the FB pin of the power chip U1; one end of the sixth capacitor C6 is connected with one end of the fifth capacitor C5, one end of the seventh capacitor C7 and one end of the eighth capacitor C8; the other end of the sixth capacitor C6, the other end of the seventh capacitor C7, the other end of the eighth capacitor C8 and the other end of the fifth resistor R5 are all grounded.
After the power chip U1 works, the output voltage output by the VOUT pin of the power chip U1 is divided by the fourth resistor R4 (preferably 22kΩ) and the fifth resistor R5 (preferably 10kΩ) to obtain the VPP supply voltage (i.e. the voltage at the VPP supply terminal +vpp2v5), and the current is about 2A. The fifth capacitor C5 to the eighth capacitor C8 have a filtering function, and the capacitance values are preferably 33pF, 47 μF and 47 μF, respectively.
The working principle of the computer is as follows:
after power-up, the power module 30 outputs a second voltage (e.g. 5V) to make the CNTL pin of the power chip U1 become high level, and then outputs a first voltage (e.g. 3V) to make the VIN pin of the power chip U1 become high level after filtering by the second capacitor C2 and the third capacitor C3, and simultaneously the first voltage (e.g. 3V) pulls the EN pin of the power chip U1 up to be high level through the first resistor R1. At this time, the power chip U1 works, and the voltage output by VOUT pin is divided by the fourth resistor R4 and the fifth resistor R5 to output the VPP supply voltage (i.e. the voltage on VPP supply terminal+vpp2v5, which is preferably 2.5v) required by the memory.
The memory transfer VPP_2V5 circuit reduces the control circuit of an EN pin, is directly connected with the first power end +3VS and is pulled up to a high level, the +3VS is converted by the switching action of the MOSFET, the conversion can be performed only after the power is turned on, and the +3VS is not generated when the power is turned on.
There are two sources of +3VS in the prior art, the first is to use an ATX power supply with 12V, 5V, 3.3V (+3VS and +3VSB). +3VSB is the power-up of the ATX power supply, while +3VS is the use of logic control on the ATX power supply, only after the ATX power supply is turned on. The second scheme is to use an adapter to supply power, such as 12V and 19V, and then convert +3vsb by using a corresponding IC (chip) to +3vsb and then convert +3vsb to +3vs by an N MOSFET (e.g., MDV1525, MDU1514, etc.); the method comprises the following steps: the source input of the NMOSFET +3VSB, the drain output of the NMOSFET +3VS, the gate of the NMOSFET inputs the control signal of the pipe +3VS_EN. The +3VSB is also powered up, and +3VS is turned on, and when the control signal +3VS_EN is logically controlled to be high, the NMOSFET is turned on to convert +3VSB to +3VS).
Therefore, the power chip U1 can work after being started, complicated control is avoided, power consumption is not affected, parts of devices are reduced, cost can be saved, and space occupation of a PCB (printed circuit board) can be reduced. Meanwhile, the power supply chip with the better model of UP0104PSUB is used to form a LDO (low dropout regulator) circuit because the existing chip is replaced, so that inductance in the existing circuit is not needed, the cost is further saved, and the space occupation of a PCB is reduced.
The power supply chip adopted in the embodiment is internally provided with over-temperature protection, over-current protection and other functions, and the memory-to-VPP_2V5 circuit can be protected to normally operate through the over-temperature protection, the over-current protection and other functions. As shown in fig. 4, when the voltage of CNTL pin comes, the power chip U1 detects the voltages on EN pin and VIN pin. When the voltage on the EN pin is at a high level and the voltage input on the VIN pin is within a set requirement range (the requirement is 1.2-5.5V), the power chip U1 operates. At this time, the internal voltage of the FB pin is 0.8v, and the vpp supply voltage is obtained by dividing the voltage through the fourth resistor R4 and the fifth resistor R5 connected to the FB pin. The formula for VPP supply voltage VOUT is also the voltage at VPP supply +VPP2V5 is:
VOUT=0.8V×(R4+R5)/R5。
the values of R4 and R5 can be directly changed according to different requirements so as to obtain the required voltage. Wherein A represents over-temperature protection, and whether the temperature is normal is judged through an internal logic gate after the temperature of the power supply chip is detected. B represents overcurrent protection, and whether overcurrent is caused or not is judged by detecting output current and then a logic gate circuit.
In summary, the memory to VPP_2V5 circuit and the computer provided by the invention use the power chip to replace the existing voltage stabilizing chip and correspondingly modify the peripheral circuit, thus forming an LDO circuit, simplifying the control circuit of an EN pin, removing the inductance, greatly reducing the number of parts, reducing the space occupation of a PCB board, reducing the size and the Layout difficulty of the PCB, reducing the cost, meeting the corresponding technical design requirements, and facilitating the debugging and factory production of engineers.
The above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.