Disclosure of Invention
An object of the present invention is to provide a new solution for a method of manufacturing a GMR/TMR microphone.
According to a first aspect of the present invention, there is provided a method of manufacturing a GMR/TMR microphone, comprising a preceding step and a following step;
the preceding steps include:
step S100: sequentially forming an insulating layer and a vibration film layer on the wafer, and forming a pattern of a permanent magnet on the vibration film layer;
step S200: forming a protective layer covering the permanent magnet on the vibration film layer, and etching the protective layer to form holes exposing part of the vibration film layer;
step S300: etching part of the vibration film layer through the holes to form gaps on the vibration film layer;
step S400: sequentially forming a sacrificial layer and a first back plate layer on a wafer; and forming a pattern of GMR/TMR on the first back plate layer opposite to the permanent magnet;
step S500: forming a connection line connected with the GMR/TMR on the first back plate layer;
the subsequent steps include:
step S600: depositing a second back plate layer on the wafer in an ICPCVD (integrated wafer plasma chemical vapor deposition) mode, wherein the deposition temperature of the ICPCVD is 50-250 ℃; or depositing a second back plate layer on the wafer in a PECVD mode, wherein the deposition temperature of the PECVD is 200-250 ℃;
the GMR/TMR and the connecting wire are laminated between the first back plate layer and the second back plate layer; performing dry RIE etching on part of the second back plate layer and the first back plate layer to expose part of the sacrificial layer;
step S700: RIE etching is carried out on the second back plate layer at the position corresponding to the connecting line, so that a gap exposing part of the connecting line is formed;
step S800: forming a bonding pad connected with the connecting wire at the position of the notch by a Liftoff process or a wet etching mode;
step S900: grinding the back surface of the wafer, and etching the back cavity in a DRIE (deep ion etching) mode;
step S1000: and corroding the sacrificial layer to release the diaphragm layer.
Optionally, the step S100In, the insulating layer adopts SiO2Formed on the wafer by means of thermal oxidation or LPCVD; the vibration film layer is formed on the insulating layer in an LPCVD mode, and the tensile stress of the vibration film layer is 0-50 MPa.
Optionally, in step S100, a pattern of the permanent magnet is formed on the diaphragm layer by PVD in combination with Liftoff or IBE etching, and the thickness of the permanent magnet is 0.01-0.5 um.
Optionally, in step S200, the protective layer is made of SiNx, and the protective layer covering the permanent magnet is formed by PECVD, where the refractive index RI is 2.1-2.3 and the tensile stress is 10-100 MPa; and etching the protective layer by means of RIE to form the holes.
Optionally, in step S300, the diaphragm layer of polysilicon is etched by means of RIE.
Optionally, in step S400, the sacrificial layer is formed by PECVD or ICPCVD, and has a refractive index RI of 1.4 to 1.5, a PECVD deposition temperature of 280 to 350 ℃, an ICPCVD deposition temperature of 50 to 300 ℃, and a compressive stress of 0 to 100 MPa; the first back plate layer is made of SiNx and formed in a PECVD mode, and the refractive index RI of the first back plate layer is 2.1-2.3.
Optionally, in step S400, a GMR/TMR pattern is formed on the first backplane layer by PVD combined with a Liftoff or dry IBE etch to a thickness of about 10-60 nm.
Optionally, in step S600, the material and refractive index of the second back plate layer are the same as those of the first back plate layer.
Optionally, a step of forming a pad on the vibration film layer is further included, where in step S700, while forming a notch by RIE etching, the second back pole layer, the first back pole layer, the sacrificial layer, and the protective layer are etched to form a space exposing a part of the vibration film layer, and the vibration film layer is used as a stop line for RIE etching; further comprising forming another bonding pad connected with the diaphragm layer at the same time of forming the bonding pad connected with the connecting line in step S800.
According to another aspect of the present invention, there is also provided a GMR/TMR microphone manufactured according to the above manufacturing method.
According to one embodiment of the disclosure, the GMR/TMR microphone is manufactured by completely adopting the MEMS process of deposition and etching, the use of a bonding process is avoided, and the matching precision between the permanent magnet and the GMR/TMR is ensured; in addition, the influence of subsequent processes on the permanent magnet and GMR/TMR is avoided during manufacturing.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
To avoid misunderstanding the process as it appears in the steps of the present application, the present application refers to specific process designations with english acronyms that are well known to those skilled in the art. For example, the term "dry etching" appears herein, and the term "RIE" is only one of dry etching, and in order to avoid equivalence of "RIE" to "dry etching," RIE "is used to describe the specific process, which is well known to those skilled in the art. For example, "Liftoff" represents a lift-off process, but actually includes a plurality of steps known to those skilled in the art, such as photolithography, film formation, photoresist removal, and the like, and for the sake of simplifying the description, the lift-off process is described as being known to those skilled in the art, but a "lift-off process" which is easily misunderstood is not employed.
The meaning of the english term appearing in this specification will now be explained.
"GMR" (Giant Magneto Resistance) is Giant Magneto Resistance, also known as Giant Magneto Resistance, which is measured using the Giant Magneto Resistance effect.
"TMR" (Tunnel magnetoresistive resistance) is a tunneling MagnetoResistance that induces a magnetic field using the tunneling MagnetoResistance effect of a magnetic multilayer film material.
The 'SiNx' is silicon nitride, the proportion of nitrogen elements can be adjusted according to actual needs, and the silicon-rich refers to SiNx with a relatively high silicon content.
"Liftoff" is a lift-off technique in the MEMS process by patterning on a pre-coat of glue and then preparing a thin film. Where there is glue, the film is formed on the glue, whereas where there is no glue, the film is formed directly on the lower layer. After the photoresist is removed, the unnecessary film is peeled off with the photoresist, and the film formed on the lower layer is left to form a pattern.
"RIE" (Reactive Ion Etching) is Reactive Ion Etching and is a microelectronic dry Etching process.
"DRIE" (Deep Reactive Ion Etching) is a microelectronic dry Etching process.
The IBE is ion beam etching and utilizes ions with certain energy to physically bombard the surface of a material so as to achieve the purpose of etching.
"PVD" (Physical Vapor Deposition) is Physical Vapor Deposition and refers to the process of transferring atoms or molecules from a source to a substrate surface by Physical processes to effect mass transfer. The PVD basic method comprises: vacuum evaporation, sputtering, ion plating, and the like.
"PECVD" (Plasma Enhanced Chemical Vapor Deposition) is a Vapor Deposition method of Plasma Enhanced chemistry, which is one type of Chemical Vapor Deposition (CVD). The gas containing film component atoms is ionized by means of microwave or radio frequency, plasma is formed locally, the plasma has strong chemical activity and is easy to react, and a desired film is deposited on a substrate.
"LPCVD" (Low Pressure Chemical Vapor Deposition) is a Low Pressure Chemical Vapor Deposition process, which is one type of Chemical Vapor Deposition (CVD).
"ICPCVD" (Inductively Coupled Plasma Chemical Vapor Deposition) is one type of Chemical Vapor Deposition (CVD) method. It utilizes inductive coupling to form plasma at lower temperature to proceed chemical vapor deposition film growth.
The invention provides a manufacturing method of a GMR/TMR microphone, which comprises a front step and a rear step.
The former step comprises:
step S100: sequentially forming an insulating layer and a vibration film layer on the wafer, and forming a pattern of a permanent magnet on the vibration film layer;
an insulating layer is first deposited on the wafer, which may be SiO, as is well known to those skilled in the art2And (3) material quality. The insulating layer may be formed on the wafer by thermal oxidation or LPCVD, and may have a thickness of 1 μm, for example.
Secondly, a vibration film layer is continuously deposited on the insulating layer, the vibration film layer can be made of polysilicon, is a structural layer of the microphone and is formed before GMR/TMR and the permanent magnet, so that the vibration film layer can be deposited in an LPCVD mode to control the parameters of the vibration film layer under the condition of higher temperature. The thickness can be controlled to be 1-2 μm, and doping annealing is carried out; the tensile stress is controlled between 0 and 50MPa, so that the stress gradient is low. For example, controlled such that after release, a cantilever beam having a length of 100 μm undergoes less than 0.1 μm of warpage.
And finally, forming a pattern of the permanent magnet on the vibrating membrane layer by combining PVD (physical vapor deposition) with Liftoff or dry IBE (ion beam etching), wherein the thickness of the permanent magnet is controlled to be 0.01-0.5 mu m.
For example, when a Liftoff process is selected, a photoresist can be formed on the vibration film layer, and the photoresist is etched to form a photoetching pattern; and depositing a permanent magnet film layer on the photoresist in a PVD (physical vapor deposition) mode, and finally removing the photoresist to form a pattern of the permanent magnet.
For example, when the dry IBE etching process is selected, the permanent magnet film layer may be deposited on the diaphragm layer by PVD, and then etched by the IBE process to form the permanent magnet pattern.
Step S200: forming a protective layer covering the permanent magnet on the vibration film layer, and carrying out patterning etching on the protective layer to form holes exposing part of the vibration film layer;
the protective layer is made of SiNx, so that the protective layer can be formed on the whole upper surface of the wafer in a PECVD mode at a low temperature in order to avoid influence on the permanent magnet. The protective layer is rich in silicon, the refractive index RI is 2.1-2.3, the thickness is controlled to be about 0.5um, the tensile stress is 10-100MPa, and the deposition temperature is about 300 ℃.
And etching the protective layer in an RIE (reactive ion etching) manner to form holes exposing part of the diaphragm layer, so that the diaphragm layer can be etched through the holes in the subsequent process. The aperture may be selected to be located adjacent to the permanent magnet. In addition, the protective layer is not only patterned to form holes, but also etched at appropriate positions according to actual needs to expose the functional regions of the vibrating membrane layer, and thus, the detailed description is omitted here.
Step S300: etching part of the vibration film layer through the holes to form gaps on the vibration film layer;
and etching the vibration film layer of the polysilicon in a RIE (reactive ion etching) manner to form a gap, so that the vibration film layer can form a cantilever beam structure after subsequent release, or form a breathable vibration film layer.
Step S400: sequentially forming a sacrificial layer and a first back plate layer on a wafer; and forming a pattern of GMR/TMR on the first back plate layer opposite to the permanent magnet;
first, a sacrificial layer is formed on the entire upper surface of the wafer, and the sacrificial layer may be low-temperature oxide, or phosphosilicate glass, or the like. The sacrificial layer can be deposited on the upper surface of the whole wafer in a PECVD or ICPCVD mode, and the sacrificial layer is filled in the gap of the vibration film layer and the hole of the protective layer.
The refractive index RI is controlled to be 1.4-1.5, and the total thickness is controlled to be 4um +/-5%; when PECVD is adopted, the deposition temperature can be selected to be 280-350 ℃; when ICPCVD is used, the deposition temperature may be selected to be 50-300 ℃. The compressive stress of the sacrificial layer is 0-100 MPa.
And depositing a first back plate layer on the upper surface of the sacrificial layer, wherein the first back plate layer can adopt SiNx. Limited by the heat-resistant temperature of the permanent magnet and the backplate is not a main functional structure of the microphone, the first backplate layer may be formed on the entire upper surface of the sacrificial layer by means of PECVD. The first back plate layer is rich in silicon, the refractive index RI is 2.1-2.3, the thickness is controlled to be about 0.5 mu m, and the deposition temperature is about 300 ℃.
Finally, a GMR/TMR pattern is formed on the first backplane layer by PVD in combination with Liftoff or dry IBE etching. The thickness of GMR/TMR is controlled between 10-60 nm.
For example, when a Liftoff process is selected, a photoresist can be formed on the first back plate layer, and the photoresist is etched to form a photoetching pattern; and depositing a GMR/TMR film layer on the photoresist by means of PVD, and finally removing the photoresist to form a GMR/TMR pattern. The PVD is carried out at a low forming temperature, even at normal temperature.
For example, when a dry IBE etching process is selected, a GMR/TMR film layer may be deposited by PVD at the first backplane layer, and then etched by the IBE process to form a GMR/TMR pattern.
Step S500: forming a connection line connected with the GMR/TMR on the first back plate layer;
the connecting wire can adopt metal aluminum or a conductive film compounded by Cr and Au, and the thickness can be controlled to be 0.1-0.2 μm. The connection wire is connected with the GMR/TMR and conducts the signal of the GMR/TMR to a proper position for subsequent extraction. The connecting line may be formed by PVD in combination with a Liftoff process or a wet etching process, which will not be described in detail herein. The PVD is carried out at a low forming temperature, even at normal temperature.
The heat-resistant temperature of GMR/TMR is lower than that of the permanent magnet, and when the forming method is selected, the temperature is strictly controlled to avoid damage to GMR/TMR.
The subsequent steps include:
step S600: depositing a second back plate layer on the wafer in an ICPCVD (integrated wafer plasma chemical vapor deposition) mode at ultralow temperature (50-250 ℃); or depositing a second back plate layer on the wafer in a PECVD mode, wherein the deposition temperature of the PECVD is 200-250 ℃;
the GMR/TMR and the connecting wire are laminated between the first back plate layer and the second back plate layer; performing dry RIE etching on part of the second back plate layer and the first back plate layer to expose part of the sacrificial layer;
the GMR/TMR and the connecting wire are clamped by the deposited second back plate layer and the first back plate, so that the GMR/TMR and the connecting wire can be supported and protected. The second back plate layer and the first back plate layer may be made of the same material and have the same parameters, and SiNx may be used. Limited by the temperature resistance of the permanent magnet, GMR/TMR, can be formed by means of PECVD. The second back plate layer is rich in silicon, the refractive index RI is 2.1-2.3, the thickness is controlled to be about 0.5 mu m, the deposition temperature is about 200-250 ℃, and the tensile stress is 0-40 MPa.
The second back plate layer and the first back plate layer are jointly etched by RIE, so that the sacrificial layer below the back plate is exposed, and the subsequent sacrificial layer is corroded.
Step S700: RIE etching is carried out on the second back plate layer at the position corresponding to the connecting line, so that a gap exposing part of the connecting line is formed;
the portion of the connection under the second backplane layer is exposed by RIE etching for subsequent extraction of the electrical signal of the connection line. The second back plane layer is etched by RIE and stops automatically on the metal layer of the connection line.
Step S800: forming a bonding pad connected with the connecting wire at the position of the notch by a Liftoff process or a wet etching mode;
the bonding pad can adopt Cr and Au which are compounded, can be formed by means of PVD, and can be combined with a Liftoff process or a wet etching method to form a bonding pad pattern which is conducted with the connecting line. The thickness of the Cr/Au complex may be 50/500 nm.
Step S900: grinding the back surface of the wafer, and etching the back cavity in a DRIE (deep ion etching) mode;
the back side of the wafer, away from the structural layer, is ground, polished, for example to a thickness of 400+/-5 um. And etching the back cavity by means of DRIE until reaching the insulating layer.
Step S1000: and corroding the sacrificial layer to release the diaphragm layer.
The sacrificial layer can be corroded by HF, and the vibration film layer is released, so that the vibration film layer can vibrate. And controlling the corrosion time so that part of the sacrificial layer is reserved to play a role of supporting the back plate.
The present invention also provides a GMR/TMR microphone manufactured by the above manufacturing method, with reference to fig. 10. When the diaphragm layer 3 vibrates, the distance between the permanent magnet 4 and the GMR/TMR 10 changes, so that the GMR/TMR 10 generates a changed electric signal, and the electric signal is led out through the connecting wire 11 and the bonding pad 12. In the microphone and the method of manufacturing the same, it is only necessary to extract the electric signal of the GMR/TMR 10 laminated in the back plate 9. In addition, when the microphone is manufactured, the permanent magnet of the functional device is firstly formed, and then the GMR/TMR 10 is formed. If the GMR/TMR 10 is formed first, the subsequent process may damage the GMR/TMR 10.
In an alternative embodiment of the present invention, another external pad may be formed on the diaphragm layer 3 to apply a bias voltage or an electrostatic force, etc. to the diaphragm 3 through the external pad. Therefore, in the manufacturing method, the step of forming an external bonding pad on the diaphragm layer 3 is further included, which includes in step S700, etching the second back pole layer, the first back pole layer, the sacrificial layer and the protective layer to form a space exposing part of the diaphragm layer while forming a notch by RIE etching, and the diaphragm layer is used as a stop line of RIE etching; further included is forming another external connection pad 13 connected to the diaphragm layer at the same time of forming a pad connected to the connection line in S800, referring to fig. 10.
An example of a method of manufacturing a GMR/TMR microphone according to the present invention is described below with reference to fig. 1 to 10.
Referring to fig. 1, an insulating layer 2 is first deposited on a wafer 1, which is typically a silicon wafer 1. The insulating layer 2 is made of SiO, which is well known to those skilled in the art2And (3) material quality. It may be formed on the wafer 1 by thermal oxidation or LPCVD, and the thickness of the insulating layer 2 may be 1 μm, for example.
Depositing a vibration film layer 3 on the insulating layer 2 in an LPCVD (low pressure chemical vapor deposition) mode, wherein the vibration film layer 3 can be made of polysilicon, the thickness of the vibration film layer 3 can be controlled to be 1-2 mu m, and carrying out doping annealing; the stress is controlled between 0 and 50MPa, so that the stress gradient is low. For example, the warpage of the cantilever beam of 100 μm after the release is controlled to be less than 0.1 μm.
And forming a pattern of the permanent magnet 4 on the vibrating membrane layer 3 by combining PVD (physical vapor deposition) with Liftoff or dry IBE (ion beam etching), wherein the thickness of the permanent magnet 4 is controlled to be 0.01-0.5 mu m.
Referring to fig. 2, a protective layer 6 covering the permanent magnet 4 is formed on the diaphragm layer 3, the protective layer 6 is made of SiNx, and in order to avoid affecting the permanent magnet, the protective layer 6 may be formed on the entire upper surface of the wafer by a PECVD method at a lower temperature. The protective layer 6 is rich in silicon, the refractive index RI is 2.1-2.3, the thickness is controlled to be about 0.5um, the tensile stress is 10-100MPa, and the deposition temperature is about 300 ℃.
The protective layer 6 is etched by RIE to form a hole 60 exposing a part of the diaphragm layer 3, so that the diaphragm layer 3 can be etched through the hole 60 in the following.
In order to form the scribe lines of the individual chips on the wafer 1, the channels 61 are formed by etching corresponding positions of the protective layer 6 while the holes 60 are formed by etching the protective layer 6 by RIE.
Referring to fig. 3, a portion of the vibration film layer 3 is etched through the hole 60 by RIE to form a gap 30 on the vibration film layer 3; so that the vibration film layer 3 can form a cantilever beam structure after subsequent release, or form the breathable vibration film layer 3. At the same time of forming the gap 30, the diaphragm layer 3 at the corresponding position is etched through the channel 61, and the cutting path 7 is formed.
Referring to fig. 4, a sacrificial layer 8 is formed on the entire upper surface of the wafer 1 by PECVD or ICPCVD, and the sacrificial layer 8 may be a low-temperature oxide such as silicon oxide or phosphosilicate glass. The sacrificial layer 8 fills the gaps 30 of the diaphragm layer 3, the holes of the protective layer and the scribe line 7 around the individual chips.
The refractive index RI is controlled to be 1.4-1.5, and the total thickness is controlled to be 4um +/-5%; the deposition temperature of PECVD is 280-350 ℃, and the deposition temperature of ICPCVD is 50-300 ℃. The sacrificial lamination stress is 10-50 MPa.
And depositing a first back plate layer 9a on the upper surface of the sacrificial layer 8 by a PECVD (plasma enhanced chemical vapor deposition) mode, wherein the first back plate layer 9a can adopt SiNx. The first back plate layer 9a is rich in silicon, the refractive index RI is 2.1-2.3, the thickness is controlled to be about 0.5 μm, and the deposition temperature is about 300 ℃ so as to avoid damaging the permanent magnet 4.
The GMR/TMR 10 is patterned on the first backplate layer 9a by means of PVD in combination with Liftoff or dry IBE etching. The thickness of the GMR/TMR 10 is controlled between 10-60 nm.
Referring to fig. 5, a connection line 11 connected to the GMR/TMR 10 is formed on the first back plate layer 9a, and the connection line 11 may be made of metallic aluminum, or a conductive film of Cr composited with Au, and the thickness may be controlled to 0.1-0.2 μm. The connection wire is connected with the GMR/TMR and conducts the signal of the GMR/TMR to a proper position for subsequent extraction. The connecting line may be formed by PVD in combination with a Liftoff process or a wet etching process, which will not be described in detail herein. The PVD is carried out at a low forming temperature, even at normal temperature.
All the steps are the previous step, and after the connecting wire and the GMR/TMR are formed, the next step needs to be carried out for processing.
Referring to fig. 6, a second backplate layer 9b is deposited on the upper surface of the wafer 1 to protect the GMR/TMR 10 by the second backplate layer 9b and the first backplate layer 9 a.
The second back sheet layer 9b may be made of the same material as the first back sheet layer 9 a. It may be deposited by means of ICPCVD or PECVD. When the PECVD mode is adopted for deposition, the deposition temperature is controlled to be between 200 and 250 ℃; when ICPCVD is used, the deposition temperature is 50-250 ℃ to avoid damaging GMR/TMR 10.
And performing dry RIE etching on parts of the second back plate layer 9b and the first back plate layer 9a to expose the sacrificial layer 8 in the central area and the peripheral area of the single chip for subsequent sacrificial and release.
Referring to fig. 7, the second back plate layer 9b at a position corresponding to the connection line 11 is etched by RIE and automatically stopped on the metal layer of the connection line to form a notch 110 exposing a portion of the connection line 11.
Referring to fig. 8, a pad 12 connected to the connection line is formed at the position of the notch 110 by means of a Liftoff process or wet etching;
the bonding pad 12 may be formed by PVD using Cr and Au in combination, and may be patterned by a Liftoff process or wet etching to form a bonding pad 12 in communication with the connection line. The thickness of the Cr/Au complex can be 50/500nm, namely the thickness of Cr is 50nm and the thickness of Au is 500 nm.
Referring to fig. 9, the back surface of the wafer 1 is ground, polished, and the back cavity 1a is etched by DRIE until the insulating layer 2.
Referring to fig. 10, the sacrificial layer is etched by HF to release the diaphragm layer 3. And controlling the corrosion time so that part of the sacrificial layer is reserved to play a role of supporting the back plate.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.