CN109819299B - High-pass filter circuit, high-pass filter and digital television receiving terminal - Google Patents
High-pass filter circuit, high-pass filter and digital television receiving terminal Download PDFInfo
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- 239000003990 capacitor Substances 0.000 claims description 77
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- 238000004088 simulation Methods 0.000 description 16
- 230000005540 biological transmission Effects 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 238000004891 communication Methods 0.000 description 5
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- 238000013461 design Methods 0.000 description 4
- 238000011161 development Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000004590 computer program Methods 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000010606 normalization Methods 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 239000003086 colorant Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
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Abstract
The embodiment of the application provides a high-pass filter circuit and a high-pass filter, which are applied to a digital cable television broadcasting system, wherein the high-pass filter circuit comprises an input end, at least one first filter unit, at least one notch unit and an output end, the at least one first filter unit is connected between the input end and the output end in series, the notch input end of the notch unit is electrically connected with the filter output end of the first filter unit, the notch output end of the notch unit is grounded, the high-pass filter circuit further comprises at least one adjusting unit, the adjusting unit comprises a control input end for receiving a control signal, a reference end for grounding and a control output end connected with the notch unit, and the adjusting unit controls whether the adjusting unit is connected to the notch unit or not according to the control signal so as to control whether the adjusting unit changes. The embodiment of the application also provides a digital television receiving terminal. By adopting the embodiment of the application, the requirements of different working frequency bands can be met.
Description
Technical Field
The application relates to the technical field of set top boxes, in particular to a high-pass filtering unit, a high-pass filter and a digital television receiving terminal.
Background
With the popularization of digital video playing terminals (e.g., digital televisions, etc.) and the continuous increase of network bandwidth, digital video broadcasting-cable (DVB-C) set-top boxes are widely applied in the technical field of digital video playing to meet the requirement of users for watching video programs. Most DVB-C set top boxes employ a Cable Modem (CM) to access the network. The CM adopts a frequency division multiplexing technology, and the uplink/downlink frequency bands in the standard of the Data Over Cable Service Interface Specification (DOCSIS) are different in different regions, for example, the DOCSIS1.0/2.0 plans that the uplink frequency band in the North America region is 5-42 MHz, the downlink frequency band is 54-1002 MHz, the uplink frequency band in the European region is 5-65 MHz, and the downlink frequency band is 108-1002 MHz. An uplink frequency band is easy to mix into a set-top box Radio Frequency (RF) receiving system to amplify a Low Noise Amplifier (LNA), and the spurious, harmonic and intermodulation effects of the LNA easily cause interference on a useful frequency band of the DVB-C, so that the indexes such as sensitivity, intermodulation and the like are reduced, the signal to noise ratio is deteriorated, the mosaic phenomenon appears under weak signals, and the video output quality is influenced.
For this reason, the front end of the DVB-C set-top box generally has a High Pass Filter (HPF) unit designed to filter the uplink frequency band. Because the frequency is too low and the transition band is narrow, the filter is usually completed by adopting an elliptical high-order high-pass filter unit carried by a lumped parameter inductance capacitance discrete component. However, different high-pass filters need to be designed for different DOCSIS standards, different regions (countries), different operators, and different channels (frequency channels) due to different operating frequency bands.
How to design a high-pass filtering unit to meet the requirements of different operating frequency bands is a technical problem to be solved urgently.
Disclosure of Invention
The technical problem to be solved by the embodiments of the present application is to provide a high-pass filter circuit and a high-pass filter, which can meet the requirements of different operating frequency bands.
A first aspect of an embodiment of the present application provides a high-pass filter circuit, which is applied to a digital cable television broadcasting system, and includes an input terminal, at least one first filter unit, at least one notch unit, and an output terminal, where the at least one first filter unit is connected in series, the filter input terminal of the at least one first filter unit is electrically connected to the input terminal, the filter output terminal of the at least one first filter unit is electrically connected to the output terminal, the notch input terminal of the notch unit is electrically connected to the filter output terminal of the first filter unit, the notch output terminal of the notch unit is grounded, and the high-pass filter circuit further includes at least one adjusting unit;
the adjusting unit comprises a control input end, a reference end and a control output end, the control input end receives a control signal, the reference end is grounded, and the control output end is connected with the trap unit;
the adjusting unit controls whether the adjusting unit is connected with the trap unit or not according to the control signal so as to control whether the adjusting unit changes the resonance parameters of the trap unit or not.
According to the first aspect of the embodiment of the application, the adjusting unit is additionally arranged in the high-pass filter circuit, so that the adjusting unit controls whether to change the resonance parameter of the notch unit according to the control signal, and controls whether to change the filter parameter of the high-pass filter circuit, so that the high-pass filter circuit has flexibility, and the requirements of different working frequency sections can be met.
In one possible implementation, the process of the adjusting unit controlling whether the adjusting unit is connected to the notching unit according to the control signal is as follows: if the control signal is a conducting signal, the adjusting unit is connected to the trap unit to change the resonance parameter of the trap unit; if the control signal is a cut-off signal, the adjusting unit does not access the trap unit so as to keep the resonance parameter of the trap unit; wherein the on signal is opposite in level to the off signal. Whether the resonance parameters of the notch unit are changed or not is controlled by controlling whether the adjusting unit is connected to the notch unit or not through the control signal.
In a possible implementation manner, the adjusting unit includes a voltage dividing unit, a switch unit, and a second filtering unit, a voltage dividing input end of the voltage dividing unit receives the control signal, a voltage dividing output end of the voltage dividing unit is connected to a switch input end of the switch unit and a filtering input end of the second filtering unit, a switch output end of the switch unit is grounded, and a filtering output end of the second filtering unit is connected to the notch unit.
In one possible implementation manner, if the control signal is a turn-on signal, the switch unit is turned on, the filtering output end of the second filtering unit is electrically connected with the notch unit, and the second filtering unit is connected to the notch unit in a parallel manner.
In one possible implementation, the trap unit includes an inductor and a capacitor connected in series; the inductance input end of the inductor is electrically connected with the filtering output end of the first filtering unit, the inductance output end of the inductor is electrically connected with the capacitance input end of the capacitor, and the capacitance output end of the capacitor is grounded; or, the capacitor input end of the capacitor is electrically connected with the filter output end of the first filter unit, the capacitor output end of the capacitor is electrically connected with the inductor input end of the inductor, and the inductor output end of the inductor is grounded.
In a possible implementation manner, if the inductance input end of the inductor is electrically connected with the filter output end of the first filter unit, the filter output end of the second filter unit is electrically connected with the capacitance input end of the capacitor, and the second filter unit is connected in parallel with the capacitor; if the capacitor input end of the capacitor is electrically connected with the filter output end of the first filter unit, the filter output end of the second filter unit is electrically connected with the inductor input end of the inductor, and the second filter unit is connected with the inductor in parallel.
Wherein, the first filter unit is a capacitor; the second filtering unit is a capacitor or an inductor, and can realize the parallel connection of the capacitor and the capacitor of the adjusting unit, the parallel connection of the capacitor and the inductor of the adjusting unit, the parallel connection of the inductor and the capacitor of the adjusting unit and the parallel connection of the inductor and the inductor of the adjusting unit.
The switching unit is a Schottky diode and has a one-way conduction characteristic so as to control the second filtering unit to be connected into the trap unit in a parallel mode.
Wherein, the control signal is input by an input/output port of the processor.
A second aspect of the embodiments of the present application provides a high-pass filter, which is applied in a digital cable television broadcasting system, and includes the high-pass filter circuit provided in the first aspect.
A third aspect of the embodiments of the present application provides a digital television receiving terminal, which is applied in a digital cable television broadcasting system, and includes a processor, an input interface, an output interface, a memory, and a high-pass filter, where the high-pass filter includes the high-pass filter circuit provided in the first aspect.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the background art of the present application, the drawings required to be used in the embodiments or the background art of the present application will be described below.
FIG. 1a shows a high-pass filter circuit for current applications;
FIG. 1b shows another high-pass filter circuit in current use;
fig. 2 is a circuit block diagram of a high-pass filter circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic circuit diagram of a high-pass filter circuit according to an embodiment of the present disclosure;
fig. 4 is a schematic circuit diagram of another high-pass filter circuit according to an embodiment of the present disclosure;
FIG. 5a is a schematic diagram of forward transmission coefficient simulation 1 based on the circuit diagram shown in FIG. 3;
FIG. 5b is a schematic diagram of an input reflection coefficient simulation 1 based on the circuit diagram shown in FIG. 3;
FIG. 6a is a schematic diagram of forward transmission coefficient simulation 2 based on the circuit diagram shown in FIG. 3;
FIG. 6b is a schematic diagram of an input reflection coefficient simulation based on the circuit diagram shown in FIG. 3;
FIGS. 7a-7 f are schematic diagrams of a proof test simulation of a high-pass filter circuit according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a digital television receiving terminal according to an embodiment of the present application.
Detailed Description
Currently, the high-pass filter applied in the digital television broadcasting system has different designs of the high-pass filter circuit for different DOCSIS standards, different regions (countries), different operators or different channels (channels). Reference is made to fig. 1a and 1b, which show two high-pass filter circuits currently in use.
The high-pass filter circuit shown in fig. 1a is a seven-order elliptical high-pass filter circuit, has three adjustable notch points, corresponds to the DOCSIS 1.0/2.0/3.0 standard, and is suitable for most areas of european DVB-C, and the corresponding high-pass filter indexes are a passband frequency of 108MHz to 1002MHz, a passband attenuation smaller than 3dB, an input reflection coefficient larger than 9dB, a stopband frequency of 5MHz to 65MHz, and a stopband attenuation larger than 35 dB.
The high-pass filter circuit shown in fig. 1b is a nine-order elliptic high-pass filter circuit, has four adjustable notch points, corresponds to the DOCSIS 2.0 standard, and is suitable for the partial region of the north american DVB-C, and has corresponding high-pass filter indexes of pass band frequency of 54MHz to 1002MHz, pass band attenuation smaller than 3dB, input reflection coefficient larger than 9dB, stop band frequency of 5MHz to 32MHz, and stop band attenuation larger than 35 dB.
The working frequency ranges of fig. 1a and 1b are different, the high-pass filter circuit is different, and the filter parameters are different. Different filter parameters need to be configured for different working frequency bands, so that different high-pass filter circuits need to be configured for different working frequency bands, that is, different hardware configurations of components need to be configured.
In view of this, the embodiments of the present application provide a high-pass filter circuit and a high-pass filter, which can meet the requirements of different operating frequency bands. Correspondingly, the embodiment of the application also provides a digital television receiving terminal, which can be a set top box independent from the digital television playing terminal (such as a television), or a terminal integrating the set top box into the digital television playing terminal. The high-pass filter circuit, the high-pass filter and the digital television receiving terminal provided in the embodiments of the present application are applied to a digital cable television broadcasting system (DVB-C).
Referring to fig. 2, a circuit block diagram of a high-pass filter circuit according to an embodiment of the present invention includes an input terminal (IN), two first filter units (11 and 12), two notch units (21 and 22), two adjusting units (31 and 32), and an output terminal (OUT). It should be noted that fig. 2 illustrates two first filtering units, two adjusting units, and two notching units as examples, and does not limit the embodiments of the present application, and in practical applications, the number of the first filtering units, the adjusting units, and the notching units may be 1, or 3, or 4 or more. However, the number of the adjusting units is the same as the number of the notch units, one adjusting unit is used for adjusting the resonance parameter of a corresponding one of the notch units, and the number of the first filtering units may be greater than or equal to the number of the notch units.
The input terminal shown in fig. 2 is a radio frequency input terminal for connecting a line signal. The output terminal shown in fig. 2 is a radio frequency output terminal, which is connected to a digital tv playing terminal plug through a coaxial cable, is inserted into a tuner of the digital tv playing terminal, i.e., an antenna input jack, and can select an output signal of the digital tv receiving terminal through automatic search.
The first filtering unit 11 is connected in series with the first filtering unit 12, the filtering input end 111 of the first filtering unit 11 is electrically connected to the input end, the filtering output end 112 of the first filtering unit 11 is electrically connected to the filtering input end 121 of the first filtering unit 12, and the filtering output end 122 of the first filtering unit 12 is electrically connected to the output end.
If more than two first filtering units exist, the filtering input end and the filtering input end of the first filtering unit in series connection are electrically connected, and the filtering output end of the last filtering unit in series connection are electrically connected.
The filtering output end of the first filtering unit 11 is further electrically connected to the notch input end of the notch unit 21, and the notch output end of the notch unit 21 is grounded. The filter output of the first filter unit 12 is further electrically connected to the notch input of the notch unit 22, and the notch output of the notch unit 22 is grounded.
Further, notch unit 21 includes an inductance and a capacitance connected in series. In one implementation, the filter output terminal of the first filter unit 11 is electrically connected to the inductance input terminal of the inductance of the notch unit 21, the inductance output terminal of the inductance of the notch unit 21 is electrically connected to the capacitance input terminal of the capacitance of the notch unit 21, and the capacitance output terminal of the capacitance of the notch unit 21 is grounded. In another implementation manner, the filter output terminal of the first filter unit 11 is electrically connected to the capacitor input terminal of the capacitor of the notch unit 21, the capacitor output terminal of the capacitor of the notch unit 21 is electrically connected to the inductor input terminal of the inductor of the notch unit 21, and the inductor output terminal of the inductor of the notch unit 21 is grounded.
It should be noted that the series connection mode of the inductor and the capacitor of each trap unit may be completely the same, that is, the inductor output terminal of the unified inductor is electrically connected to the capacitor input terminal of the capacitor, the capacitor output terminal of the capacitor is grounded, or the capacitor output terminal of the capacitor is electrically connected to the inductor input terminal of the inductor, and the inductor output terminal of the inductor is grounded, or may not be completely the same. The device parameters of the inductance and capacitance of each notch are not limited in the embodiments of the present application, and for example, the inductance of notch 21 is 220 nanohenries (nH), the capacitance of notch 21 is 220 picofarads (pF), the inductance of notch 22 is 150nH, and the capacitance of notch 22 is 120 pF.
The adjusting unit 31 includes a control input terminal 311, a reference terminal 313 and a control output terminal 312, the control input terminal 311 receives a control signal, the reference terminal 313 is grounded, and the control output terminal 312 is connected to the notch unit 21. The adjusting unit 32 comprises a control input 321, a reference terminal 323 and a control output 322, the control input 321 receiving a control signal, the reference terminal 323 being connected to ground, the control output 322 being connected to the notch unit 21. It should be noted that the control output of the adjusting unit is electrically connected to its corresponding trap unit in some cases, and is disconnected from its corresponding trap unit in some cases.
Adjusting unit 31 controls whether adjusting unit 31 switches in notch unit 21 according to the control signal received at its control input 311 to control whether adjusting unit 31 changes the resonance parameters of notch unit 21. The adjusting unit 32 controls whether the adjusting unit 32 is switched in the notch unit 22 or not according to the control signal received by its control input 321, so as to control whether the adjusting unit 32 changes the resonance parameter of the notch unit 22 or not. Wherein the resonance parameter may comprise a resonance frequency.
If the control signal received by the control input 311 of the adjusting unit 31 is an on signal, the adjusting unit 31 accesses the notch unit 21 to change the resonance parameter of the notch unit 21. It is understood that control output 312 of adjustment unit 31 is electrically connected to notch unit 21 to change the resonant parameters of notch unit 21.
If the control signal received at control input 311 of adjustment unit 31 is an off signal, adjustment unit 31 does not switch in notch unit 21 to maintain the resonance parameters of notch unit 21. It will be appreciated that control output 312 of adjustment unit 31 is now disconnected from notch unit 21, and the resonance parameters of notch unit 21 are not changed.
The on signal is opposite in level to the off signal, and for example, the on signal is a high level signal and the off signal is a low level signal. The on signal and the off signal are input from an input/output (GPIO) of the processor, that is, the control input terminal of the adjusting unit is electrically connected to the GPIO of the CPU of the digital television receiving terminal.
Further, the adjusting unit 31 includes a voltage dividing unit, a switching unit, and a second filtering unit. The voltage dividing unit is a resistor, and the resistance value of each adjusting unit is not limited in the embodiment of the present application. The switch unit is a diode, specifically a schottky diode, and may also be another diode. The Schottky diode belongs to a low-power-consumption and ultra-high-speed semiconductor device and has the characteristics of small forward conduction voltage drop and short reverse recovery time.
If the control signal received by the control input terminal 311 of the adjusting unit 31 is an on signal, the switch unit of the adjusting unit 31 is turned on, the filtering output terminal of the second filtering unit of the adjusting unit 31 is electrically connected to the notch unit 21, and the second filtering unit of the adjusting unit 31 is connected to the notch unit 21 in parallel.
If the filtering output terminal of the first filtering unit 11 is electrically connected to the inductance input terminal of the inductor of the notch unit 21, the filtering output terminal of the second filtering unit of the adjusting unit 31 is electrically connected to the capacitance input terminal of the notch unit 21, that is, the inductance output terminal of the inductor of the notch unit 21 is electrically connected to the capacitance input terminal of the notch unit 21, and is also electrically connected to the filtering output terminal of the second filtering unit. At this time, the switching unit of the adjusting unit 31 is turned on and grounded, and then the second filtering unit of the adjusting unit 31 is connected in parallel with the capacitance of the notch unit 21.
If the filtering output terminal of the first filtering unit 11 is electrically connected to the capacitance input terminal of the capacitor of the notch unit 21, the filtering output terminal of the second filtering unit of the adjusting unit 31 is electrically connected to the inductance input terminal of the notch unit 21, that is, the inductance output terminal of the capacitor of the notch unit 21 is electrically connected to the inductance input terminal of the notch unit 21, and is also electrically connected to the filtering output terminal of the second filtering unit. At this time, the switching unit of the adjusting unit 31 is turned on and grounded, and then the second filtering unit of the adjusting unit 31 is connected in parallel with the inductance of the notch unit 21.
The second filtering unit included in the adjusting unit may be an inductor or a capacitor, and when the control input terminal of the adjusting unit receives the on signal, the inductor of the adjusting unit may be connected in parallel with the inductor of the trap unit, the inductor of the adjusting unit may be connected in parallel with the capacitor of the trap unit, the capacitor of the adjusting unit may be connected in parallel with the inductor of the trap unit, and the capacitor of the adjusting unit may be connected in parallel with the capacitor of the trap unit, so as to change the resonance parameter of the trap unit.
In the circuit block diagram shown in fig. 2, the adjusting unit is added in the high-pass filter circuit, and the adjusting unit can control whether the adjusting unit is connected to the notch unit or not through the control signal to control whether the resonance parameter of the notch unit is changed or not, and the resonance parameter of each notch can be changed through the corresponding adjusting unit, so that the high-pass filter circuit has flexibility, and the flexible high-pass filter circuit can meet the requirements of different working frequency bands. Different high-pass filter circuits do not need to be formulated for different working frequency sections, and by adopting the high-pass filter circuit provided by the embodiment of the application, the requirements of different working frequency sections can be met only by adjusting the control signals of all the adjusting units.
Referring to fig. 3, a specific circuit structure of a high-pass filter circuit provided IN an embodiment of the present application includes an input terminal (IN), five first filter units (11, 12, 13, 14, and 15), four notch units (21, 22, 23, and 24), four adjusting units (31, 32, 33, and 34), and an output terminal (OUT). It should be noted that fig. 3 illustrates five first filtering units, four adjusting units, and four notch units, and does not limit the embodiments of the present application.
The first filtering unit 11 is a capacitor C1 in fig. 3, and its capacitance value may be 56 pF; the first filtering unit 12 is a capacitor C4 in fig. 3, and its capacitance value may be 22 pF; the first filtering unit 13 is a capacitor C7 in fig. 3, and its capacitance value may be 22 pF; the first filtering unit 14 is a capacitor C10 in fig. 3, and its capacitance value may be 22 pF; the first filtering unit 15 is a capacitor C13 in fig. 3, and its capacitance may be 47 pF.
The trap unit 21 is a series branch composed of an inductor L1 and a capacitor C3 in fig. 3, the capacitor output terminal of C3 is grounded, the inductance value of L1 is 220nH, and the capacitance value of C3 is 220 pF; the trap unit 22 is a series branch composed of an inductor L2 and a capacitor C6 in fig. 3, the capacitor output terminal of C6 is grounded, the inductance value of L2 is 150nH, and the capacitance value of C6 is 120 pF; the trap unit 23 is a series branch composed of an inductor L3 and a capacitor C9 in fig. 3, the capacitor output terminal of C9 is grounded, the inductance value of L3 is 220nH, and the capacitance value of C9 is 27 pF; the trap unit 24 is a series branch composed of an inductor L4 and a capacitor C12 in fig. 3, the capacitor output terminal of C12 is grounded, the inductance value of L4 is 150nH, and the capacitance value of C9 is 43 pF.
The adjusting unit 31 comprises a resistor R1, a schottky diode D1 and a capacitor C2, wherein the resistance value of R1 is 10k ohm (Ω), and the capacitance value of C2 is 120 pF; the adjusting unit 32 comprises a resistor R2, a Schottky diode D2 and a capacitor C5, wherein the resistance value of R2 is 10k omega, and the capacitance value of C5 is 150 pF; the adjusting unit 33 comprises a resistor R3, a Schottky diode D3 and a capacitor C8, wherein the resistance value of R3 is 10k omega, and the capacitance value of C8 is 43 pF; the regulating unit 34 includes a resistor R4, a schottky diode D4, and a capacitor C11, wherein the resistance of R4 is 10k Ω, and the capacitance of C11 is 270 pF.
It should be noted that C2, C5, C8, and C11 correspond to the second filter unit, and fig. 3 illustrates a capacitor as the second filter unit, and in practice, at least one of C2, C5, C8, and C11 may be replaced by an inductor.
When the GPIO1 is a high level signal, that is, the control input terminal of the adjusting unit 31 receives a high level signal, the schottky diode D1 is turned on in the forward direction, and the C2 is electrically connected to the notch unit 21 and connected in parallel with the C3. In the case where C2 and C3 are not connected in parallel, the resonance parameters of notch unit 21 are determined by the inductance value of L1 and the capacitance value of C3, and in the case where C2 and C3 are connected in parallel, the resonance parameters of notch unit 21 are determined by the capacitance value of C2 and C3 connected in parallel and the inductance value of L1.
When the GPIO1 is a low level signal, that is, when the control input terminal of the adjusting unit 31 receives a low level signal, the schottky diode D1 is turned off in the forward direction, which is equivalent to that the branch of D1 is turned off, so that the C2 cannot be electrically connected to the trap unit 21, and the resonant parameter of the trap unit 21 is determined by the inductance value of L1 and the capacitance value of C3, that is, the resonant parameter of the trap unit 21 is not changed.
The GPIO2, GPIO3 and GPIO4 are the same as the above-described GPIO1 in control principle and are not described herein again.
Through the high-level signals and the low-level signals of the GPIO1, the GPIO2, the GPIO3 and the GPIO4, whether the C2 is connected with the C3 in parallel, whether the C5 is connected with the C6 in parallel, whether the C8 is connected with the C9 in parallel and whether the C11 is connected with the C12 in parallel can be respectively controlled, so that whether the resonance parameters of the corresponding notch unit are changed or not is controlled, the high-pass filter circuit has flexibility, and the requirements of different working frequency bands can be met.
In the specific circuit diagram shown in fig. 3, the trap units are electrically connected to the inductor output terminal of the inductor and the capacitor input terminal of the capacitor, and the capacitor output terminal of the capacitor is grounded. In practical applications, the trap unit may further include a capacitor output terminal of the capacitor electrically connected to an inductor input terminal of the inductor, and a capacitor output terminal of the capacitor grounded. Referring to fig. 4, a schematic circuit structure diagram of another high-pass filter circuit provided in the embodiment of the present application is shown. The difference from fig. 3 is that the capacitor output terminal of C6 is electrically connected to the inductor input terminal of L2, and the capacitor output terminal of C12 is electrically connected to the inductor input terminal of L4 in fig. 4. However, both fig. 3 and fig. 4 can achieve the effect of meeting the requirements of different operating frequency bands.
It is to be understood that the specific circuit diagrams shown in fig. 3 and 4 are nine-order high-pass filter circuits, and the order of the high-pass filter circuit is not limited in the embodiment of the present application.
GPIO1, GPIO2, GPIO3 and GPIO4 may selectively access C2, C5, C8 and C11 to the corresponding notch cells by binary combination, and the following table is an example table of control logic.
As can be seen from the above table, there are 16 binary combinations of GPIO1, GPIO2, GPIO3, and GPIO4, and 16 different high-pass filter circuits can be implemented by high-low level control signals, so as to meet the requirements of different operating frequency bands.
It should be noted that the above table does not limit the embodiments of the present application.
Based on the specific circuit diagram shown in fig. 3, an Advanced Design System (ADS) simulation tool is used to simulate the circuit diagram:
(1) when the control levels of the GPIO1, the GPIO2, the GPIO3 and the GPIO4 are all low level signals, C2, C5, C8 and C11 are not connected into the corresponding trap units, and the resonance frequency is higher. Referring to fig. 5a, a schematic diagram 1 of forward transmission coefficient simulation based on the circuit diagram shown in fig. 3 is shown, wherein S (2,1) in fig. 5a represents the forward transmission coefficient. Fig. 5b is a schematic diagram of simulation of input reflection coefficient 1 based on the circuit diagram shown in fig. 3, where S (1,1) in fig. 5b represents the input reflection coefficient. Fig. 5a and 5b correspond to the case where the control levels of GPIO1, GPIO2, GPIO3 and GPIO4 are all low level signals, and satisfy the european DOCSIS3.0 standard DVB-C set-top box frequency band standard, at which time the high pass filter index corresponding to fig. 1a can be reached.
(2) When the control levels of the GPIO1, the GPIO2, the GPIO3 and the GPIO4 are all high level signals, C2, C5, C8 and C11 are connected into the corresponding trap units, and the resonance frequency is lowest. Referring to fig. 6a, a simulation diagram 2 of forward transmission coefficients based on the circuit diagram shown in fig. 3 is shown, wherein S (2,1) in fig. 6a represents the forward transmission coefficient. Fig. 6b is a schematic diagram of an input reflection coefficient simulation diagram 2 based on the circuit diagram shown in fig. 3, wherein S (1,1) in fig. 6b represents the input reflection coefficient. Fig. 6a and fig. 6b correspond to the case that the control levels of GPIO1, GPIO2, GPIO3 and GPIO4 are all high level signals, and satisfy the frequency band standard of the DVB-C set-top box of DOCSIS1.0/2.0 standard in the north american subregion, at which time the high pass filter index corresponding to fig. 1b can be reached.
In order to further verify the actual engineering effect of the high-pass filter circuit provided in the embodiment of the present application, a Printed Circuit Board (PCB) is used for verification, and fig. 7a to 7f are schematic diagrams of the proof test simulation of the high-pass filter circuit based on the embodiment of the present application.
Wherein, fig. 7a to 7C correspond to the european DOCSIS3.0 standard DVB-C set-top box frequency band standard, compared with the forward transmission coefficient S21 parameter and the input reflection S11 parameter corresponding to fig. 1a, the S21 simulation data corresponding to fig. 7a to 7C are similar to the S21 parameter corresponding to fig. 1a, the S11 simulation data corresponding to fig. 7a to 7C are similar to the S11 parameter corresponding to fig. 1a, and the indexes corresponding to fig. 7a to 7C all meet the requirement.
Wherein, fig. 7 d-7 f correspond to the frequency band standard of the DVB-C set-top box of the DOCSIS1.0/2.0 standard in north america, and compared with the forward transmission coefficient S21 parameter and the input reflection S11 parameter corresponding to fig. 1b, the S21 simulation data corresponding to fig. 7 d-7 f are similar to the S21 parameter corresponding to fig. 1a, and the S11 simulation data corresponding to fig. 7 d-7 f are slightly worse than the S11 parameter corresponding to fig. 1a in the high frequency band, but the indexes corresponding to fig. 7 d-7 f still meet the requirements. Alternatively, the simulation data can be tuned better and the transition band can be tuned narrower by using high-Q capacitors and high-Q wound inductors.
By adopting the high-pass filter circuit provided by the embodiment of the application, the radio frequency development difficulty can be reduced, the board changing times can be reduced, the development period can be compressed, the maintenance cost and difficulty can be reduced, the technical requirements of changing different working frequency sections can be met by one hardware configuration, and the hardware normalization generation manufacturing and configuration can be facilitated.
The embodiment of the application also provides a high-pass filter comprising the high-pass filter circuit.
The embodiment of the application also provides a digital television receiving terminal, and the digital television receiving terminal is applied to a digital cable television broadcasting system. The structure of the digital television receiving terminal 80 can be seen from fig. 8, and includes a processor 801, a memory 802, an input interface 803, an output interface 804, an audio/video module 805, a display module 806, a high-pass filter 807, and a communication bus 808. Wherein a communication bus 808 is used to enable communication connections between these components.
The processor 801 may include one or more processors, such as one or more Central Processing Units (CPUs). The processor 801 may be a chip integrating demodulation, demultiplexing, and decoder chips, and further integrating a real-time operation accelerator, and may be used for processing various operation requirements. In the embodiment of the present application, the processor 801 is provided with a demodulation chip of DVB-C, and the GPIO of the processor 801 is configured to input a control signal to the high-pass filter to control whether the adjusting unit is connected to the notch unit, so as to control whether to change the resonance parameter of the harmonic unit, thereby changing the filtering parameter of the high-pass filter.
The memory 802 may include an electrically erasable programmable read-only memory (EEPROM), a Synchronous Dynamic Random Access Memory (SDRAM), a Flash memory, and the like. The EEPROM is used for storing program parameter information, the SDRAM is used for storing various data in the working process of the system, and the Flash memory is used for storing program data.
The input interface 803 may include, but is not limited to, an ethernet interface, a Universal Serial Bus (USB) interface, a radio frequency input interface, a panel key input port, an infrared remote control input port, and the like.
The output interface 804 may include, but is not limited to, a radio frequency output interface, a video component (Y, Pb, P r) output interface, a High Definition Multimedia Interface (HDMI), a digital audio output interface, and the like.
The audio/video module 805 includes an audio amplification output circuit and a video output circuit, the audio amplification output circuit is configured to amplify and output an analog audio signal, the video output circuit is configured to amplify and output a composite video signal through a video amplifier, and the video components (Y, Pb, Pr) are filtered and output through a video filter.
The display module 806 uses light-emitting diodes (LEDs) with different colors as an indication for power supply and signal locking, and uses a 4-bit 7-segment nixie tube as a display for other functions such as channels.
The high-pass filter 807 includes the high-pass filter circuits shown in fig. 2-4, and is applied in a digital television receiving terminal, and can receive the control signal input by the GPIO of the processor 801. The high-pass filter 807 can reduce the difficulty of radio frequency development, reduce the times of board change, compress the development period, reduce the maintenance cost and difficulty, meet the technical requirements of changing different working frequency bands by using one hardware configuration, and facilitate the generation, manufacture and configuration of hardware normalization.
Those of ordinary skill in the art would appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in or transmitted over a computer-readable storage medium. The computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)), or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
Claims (12)
1. A high-pass filter circuit is applied to a digital cable television broadcasting system and comprises an input end, at least one first filter unit, at least one notch unit and an output end, wherein the at least one first filter unit is connected in series, the filter input end of the at least one first filter unit is electrically connected with the input end, the filter output end of the at least one first filter unit is electrically connected with the output end, the notch input end of the notch unit is electrically connected with the filter output end of the first filter unit, and the notch output end of the notch unit is grounded; the number of the at least one adjusting unit is the same as that of the at least one notch unit, and one adjusting unit is used for adjusting the resonance parameter of the corresponding notch unit;
the adjusting unit comprises a control input end, a reference end and a control output end, the control input end receives a control signal, the reference end is grounded, and the control output end is connected with the trap unit;
the adjusting unit controls whether the adjusting unit is connected with the trap unit or not according to the control signal so as to control whether the adjusting unit changes the resonance parameter of the trap unit or not.
2. The high-pass filter circuit as claimed in claim 1, wherein the adjusting unit controls whether the adjusting unit is connected to the notch unit according to the control signal, comprising:
if the control signal is a conducting signal, the adjusting unit is connected to the trap unit so as to change the resonance parameter of the trap unit;
if the control signal is an off signal, the adjusting unit does not access the trap unit so as to maintain the resonance parameter of the trap unit;
wherein the on signal is opposite in level to the off signal.
3. The high-pass filter circuit according to claim 1, wherein the adjusting unit comprises a voltage dividing unit, a switching unit and a second filtering unit;
the voltage division input end of the voltage division unit receives the control signal, the voltage division output end of the voltage division unit is connected with the switch input end of the switch unit and the filtering input end of the second filtering unit, the switch output end of the switch unit is grounded, and the filtering output end of the second filtering unit is connected with the notch unit.
4. The high-pass filter circuit as claimed in claim 3, wherein if the control signal is an on signal, the adjusting unit is connected to the notch unit, and comprises:
if the control signal is a conducting signal, the switch unit is conducted, and the filtering output end of the second filtering unit is electrically connected with the trap unit and is connected in parallel to the trap unit.
5. The high pass filter circuit of claim 4, wherein the notch unit comprises an inductor and a capacitor in series;
an inductance input end of the inductor is electrically connected with a filtering output end of the first filtering unit, an inductance output end of the inductor is electrically connected with a capacitance input end of the capacitor, and a capacitance output end of the capacitor is grounded;
or, the capacitor input end of the capacitor is electrically connected with the filter output end of the first filter unit, the capacitor output end of the capacitor is electrically connected with the inductor input end of the inductor, and the inductor output end of the inductor is grounded.
6. The high-pass filter circuit as claimed in claim 5, wherein the filter output of the second filter unit is electrically connected to the notch unit and connected to the notch unit in parallel, comprising:
if the inductance input end of the inductor is electrically connected with the filter output end of the first filter unit, the filter output end of the second filter unit is electrically connected with the capacitance input end of the capacitor, and the second filter unit is connected with the capacitor in parallel;
if the capacitor input end of the capacitor is electrically connected with the filter output end of the first filter unit, the filter output end of the second filter unit is electrically connected with the inductor input end of the inductor, and the second filter unit is connected with the inductor in parallel.
7. The high-pass filter circuit according to claim 1, wherein the first filter unit is a capacitor.
8. The high-pass filter circuit according to claim 3, wherein the second filter unit is a capacitor or an inductor.
9. The high pass filter circuit of claim 3, wherein the switching unit is a Schottky diode.
10. The high pass filter circuit of claim 1, wherein the control signal is input by an input/output port of the processor.
11. A high pass filter for use in a digital cable television broadcast system, the high pass filter comprising a high pass filter circuit as claimed in any one of claims 1 to 10.
12. A digital television receiving terminal for use in a digital cable television broadcast system, the digital television receiving terminal comprising a processor, an input interface, an output interface, a memory and a high pass filter, the high pass filter comprising a high pass filter circuit according to any one of claims 1 to 10.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711181324.XA CN109819299B (en) | 2017-11-22 | 2017-11-22 | High-pass filter circuit, high-pass filter and digital television receiving terminal |
| PCT/CN2018/109981 WO2019100863A1 (en) | 2017-11-22 | 2018-10-12 | High-pass filter circuit and high-pass filter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711181324.XA CN109819299B (en) | 2017-11-22 | 2017-11-22 | High-pass filter circuit, high-pass filter and digital television receiving terminal |
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| CN109819299B true CN109819299B (en) | 2021-03-05 |
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| CN113630352B (en) * | 2021-04-27 | 2023-05-05 | 中国电子科技集团公司第三十研究所 | Frequency continuously adjustable trap circuit based on phase cancellation |
| CN113225500A (en) * | 2021-05-28 | 2021-08-06 | 深圳市安拓浦科技有限公司 | Filter circuit and television antenna amplifier |
| CN114325024B (en) * | 2021-12-29 | 2023-09-29 | 海华电子企业(中国)有限公司 | Test method for tuning parameters of efficient wave trap |
| CN114337705A (en) * | 2022-02-11 | 2022-04-12 | 成都阶跃时进科技有限公司 | Intermodulation interference suppression circuit and electronic device |
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| CN109819299A (en) | 2019-05-28 |
| WO2019100863A1 (en) | 2019-05-31 |
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