CN109768695A - Voltage and current compensation correction system and its working method based on FPGA - Google Patents
Voltage and current compensation correction system and its working method based on FPGA Download PDFInfo
- Publication number
- CN109768695A CN109768695A CN201910001461.3A CN201910001461A CN109768695A CN 109768695 A CN109768695 A CN 109768695A CN 201910001461 A CN201910001461 A CN 201910001461A CN 109768695 A CN109768695 A CN 109768695A
- Authority
- CN
- China
- Prior art keywords
- voltage
- fpga
- host computer
- module
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dc-Dc Converters (AREA)
Abstract
The present invention relates to a kind of voltage and current compensation correction system and its working method based on FPGA, working method includes: that host computer carries out parameter correction, FPGA wipes module for reading and writing by FLASH and writes parameters in M25P80 device, carry out the preservation of data, FPGA carries out parametrization configuration by voltage configuration module, output voltage, output voltage and current value are carried out parametrization conversion by voltage read module and electric current read module and shown by FPGA, voltage compensation module real-time detection and the compensation for realizing voltage automatically.The present invention is based on the methods high-precision voltage and current parameter correction of FPGA design and realized, for eliminating electronic product hardware design constant error, realize the Parametric designing of voltage and current correction, carry out the automatic compensation of output voltage, distal end voltage output precision is improved, actual current output is accurately held.
Description
Technical field
The present invention relates to voltage and currents to correct system regions, and in particular to a kind of voltage and current compensation school based on FPGA
Positive system and its working method.
Background technique
Boosting and reduction voltage circuit is mostly used to carry out the circuits pair such as conversion and the analog-to-digital conversion of voltage in power supply design at present
Voltage is configured and is read, and in conversion process, because of the intrinsic precision limitation of device, impedance, capacitive reactance, external disturbance etc. is to electricity
The influence on road, causing voltage reality output with theoretical value, there are larger differences, cause output voltage precision relatively low, need to spend big
The problems such as time and efforts of amount is debugged for hardware, can not accomplish bulk production, and user's debugging difficulty is big.
Summary of the invention
The purpose of the present invention is to provide a kind of voltage and current compensation correction system and its working method based on FPGA,
To solve the problems, such as voltage current adapter part low precision in the prior art, can not produce in batches, debugging difficulty it is big.
One aspect of the present invention provides a kind of voltage and current compensation correction method based on FPGA, comprising:
Host computer carries out parameter correction, show that floating voltage parameter, band carry voltage parameter and current parameters；
FPGA reads floating voltage parameter by Parameter analysis of electrochemical module, band carries voltage parameter and current parameters, and passes through
FLASH wipes module for reading and writing and floating voltage parameter, band load voltage parameter and current parameters is written in M25P80 device, carries out
The preservation of data；
Floating voltage parameter is wiped in module for reading and writing from FLASH by voltage configuration module and is read out by FPGA, is carried out
Parametrization configuration, output voltage can be directly changed voltage output, user facilitated to debug；
The voltage and current value of output is carried out parametrization and is turned by FPGA by voltage read module and electric current read module
It changes, shows the output of voltage and current；
FPGA passes through the relationship of voltage compensation module real-time detection voltage output value and theoretical voltage, is more than theoretical voltage
5mv will realize the compensation of voltage automatically.
Further, the host computer carries out parameter correction and specifically includes floating voltage parameter correction, band load voltage parameter
Correction and current parameters correction.
Further, the floating voltage parameter correction specifically comprises the following steps:
Host computer issues floating voltage parameter correction order to FPGA by network interface；
Voltage value v needed for host computer issues voltage configuration moduleda, FPGA configures DAC converter and BUCK voltage adjusts
Module is by voltage output；
DC power supply load machine connection feedback and Voltage Feedback terminal, read virtual voltage output valve vout, and pass through USB-
TTL returns to host computer；
Host computer is arranged voltage acquisition range, repeatedly issues ginseng to FPGA by network interface according to user's actual output voltage
Number corrective command, and repeat step (2)-(3)；
Host computer screens collected multiple groups voltage value, Digital Signal Processing is carried out, according to vda=A1*vout+
B1, simulate vdaAnd voutOptimal linear relationship, obtains A1And B1；
Host computer will calculate parameters obtained A by network interface1And B1The parametric solution being sent in the form of four bytes in FPGA
Analyse module.
Further, the band carries voltage parameter correction and specifically comprises the following steps:
Host computer carries voltage parameter corrective command to hair band under FPGA by network interface；
Voltage value v needed for host computer issues voltage configuration moduleda, FPGA configures DAC converter and BUCK voltage adjusts
Module is by voltage output；
Host computer, which is sent, reads voltage commands, and FPGA executes the block command of voltage reading modulus, by FB detecting voltage module and
ADC converter one detects and reads voltage value vad。
DC power supply load machine connection feedback and Voltage Feedback terminal, read virtual voltage output valve vout, and pass through USB-
TTL returns to host computer；
Host computer is arranged voltage acquisition range, repeatedly issues ginseng to FPGA by network interface according to user's actual output voltage
Number corrective command, and repeat step (2)-(4)；
Host computer screens collected multiple groups voltage value, Digital Signal Processing is carried out, according to vout=A2*vad+
B2, simulate and read voltage value vadWith feedback and Voltage Feedback terminal virtual voltage output valve voutOptimal linear relationship, obtains
A2And B2；
Host computer will calculate parameters obtained A by network interface2And B2The parametric solution being sent in the form of four bytes in FPGA
Analyse module.
Further, the current parameters correction specifically comprises the following steps:
PC control DC power supply load machine provides load current to power panel；
Host computer sends electric current reading order, and FPGA executes electric current reading order, is turned by MA current detecting module, ADC
Parallel operation two detects and reads output current value iad；
Host computer reads DC power supply load machine electric current real output value i by serial portsout；
PC control DC power supply load machine repeatedly adjusts electric current output acquisition current point；
Host computer is by resulting iadAnd ioutDigital Signal Processing is carried out, according to iout=A3*iad+B3, fit iadAnd iout
Linear relationship；
Host computer passes through network interface for parameters obtained A3And B3The Parameter analysis of electrochemical mould being sent in the form of four bytes in FPGA
Block.
Another aspect of the present invention provides a kind of voltage and current compensation correction system based on FPGA, including power panel, on
Position machine and DC power supply load machine；
DAC converter, ADC converter one, ADC converter two, BUCK voltage regulator module, FB are set on the power panel
Detecting voltage module, MA current detecting module, FPGA, feedback and output voltage terminals, M25P80 device；
Setting voltage configuration module in the FPGA, voltage read module, electric current read module, voltage compensation module,
FLASH wipes module for reading and writing and Parameter analysis of electrochemical module；
Network interface and USB are set on the host computer, serial ports is set on the DC power supply load machine, the power panel passes through
Feedback connects DC power supply load machine with output voltage terminals, and the DC power supply load machine passes through the USB of serial ports and host computer
Connection, the host computer are connect by network interface with FPGA.
Beneficial effect using aforementioned present invention technical solution is:
The present invention is based on the methods high-precision voltage and current parameter correction of FPGA design and realized, for eliminating electricity
Subclass products-hardware designs constant error, realizes the Parametric designing of voltage and current correction, carries out the automatic benefit of output voltage
It repays, improves distal end voltage output precision, accurately hold actual current output；
It realizes to the real-time detection of voltage and current, enhances product performance；
It is calculated by host computer parameter algorithm, greatly shortens hardware debug time；
In actual production when something goes wrong, there is special aligning tool, it is easy to operate, tune can be made to power supply in time
It is whole；
FPGA Design of Compatibility, portable strong, processing speed is fast, can be widely applied
Detailed description of the invention
Fig. 1 is that the present invention is based on the voltage and current compensation correction method flow charts of FPGA；
Fig. 2 is that the present invention is based on the voltage and current compensation correction system structure diagrams of FPGA；
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.
As shown in Figure 1, voltage and current compensation correction system of the present embodiment based on FPGA, including power panel, host computer
With DC power supply load machine；
DAC converter, ADC converter one, ADC converter two, BUCK voltage regulator module, FB are set on the power panel
Detecting voltage module, MA current detecting module, FPGA, feedback and output voltage terminals, M25P80 device；
Setting voltage configuration module in the FPGA, voltage read module, electric current read module, voltage compensation module,
FLASH wipes module for reading and writing and Parameter analysis of electrochemical module；
Network interface and USB are set on the host computer, serial ports is set on the DC power supply load machine, the power panel passes through
Feedback connects DC power supply load machine with output voltage terminals, and the DC power supply load machine passes through the USB of serial ports and host computer
Connection, the host computer are connect by network interface with FPGA.
As shown in Fig. 2, voltage and current compensation correction method of the present embodiment based on FPGA, comprising:
S1: host computer carries out parameter correction, show that floating voltage parameter, band carry voltage parameter and current parameters；
S2:FPGA reads floating voltage parameter by Parameter analysis of electrochemical module, band carries voltage parameter and current parameters, and passes through
FLASH wipes module for reading and writing and floating voltage parameter, band load voltage parameter and current parameters is written in M25P80 device, carries out
The preservation of data；
Floating voltage parameter is wiped in module for reading and writing from FLASH by voltage configuration module and is read out by S3:FPGA, into
Row parametrization configuration, output voltage can be directly changed voltage output, user facilitated to debug；
S4:FPGA is parameterized the voltage and current value of output by voltage read module and electric current read module
Conversion, shows the output of voltage and current；
S5:FPGA passes through the relationship of voltage compensation module real-time detection voltage output value and theoretical voltage, is more than theoretical electricity
Press 5mv by the automatic compensation for realizing voltage.
Specifically, the host computer carries out, parameter correction specifically includes floating voltage parameter correction, band carries voltage parameter school
Just corrected with current parameters.
Specifically, the floating voltage parameter correction specifically comprises the following steps:
Host computer issues floating voltage parameter correction order to FPGA by network interface；
Voltage value v needed for host computer issues voltage configuration moduleda, FPGA configures DAC converter and BUCK voltage adjusts
Module is by voltage output；
DC power supply load machine connection feedback and Voltage Feedback terminal, read virtual voltage output valve vout, and pass through USB-
TTL returns to host computer；
Host computer is arranged voltage acquisition range, repeatedly issues ginseng to FPGA by network interface according to user's actual output voltage
Number corrective command, and repeat step (2)-(3)；
Host computer screens collected multiple groups voltage value, Digital Signal Processing is carried out, according to vda=A1*vout+
B1, simulate vdaAnd voutOptimal linear relationship, obtains A1And B1；
Host computer will calculate parameters obtained A by network interface1And B1The parametric solution being sent in the form of four bytes in FPGA
Analyse module.
Specifically comprise the following steps: specifically, the band carries voltage parameter correction
Host computer carries voltage parameter corrective command to hair band under FPGA by network interface；
Voltage value v needed for host computer issues voltage configuration moduleda, FPGA configures DAC converter and BUCK voltage adjusts
Module is by voltage output；
Host computer, which is sent, reads voltage commands, and FPGA executes the block command of voltage reading modulus, by FB detecting voltage module and
ADC converter one detects and reads voltage value vad。
DC power supply load machine connection feedback and Voltage Feedback terminal, read virtual voltage output valve vout, and pass through USB-
TTL returns to host computer；
Host computer is arranged voltage acquisition range, repeatedly issues ginseng to FPGA by network interface according to user's actual output voltage
Number corrective command, and repeat step (2)-(4)；
Host computer screens collected multiple groups voltage value, Digital Signal Processing is carried out, according to vout=A2*vad+
B2, simulate and read voltage value vadWith feedback and Voltage Feedback terminal virtual voltage output valve voutOptimal linear relationship, obtains
A2And B2；
Host computer will calculate parameters obtained A by network interface2And B2The parametric solution being sent in the form of four bytes in FPGA
Analyse module.
Specifically, the current parameters correction specifically comprises the following steps:
PC control DC power supply load machine provides load current to power panel；
Host computer sends electric current reading order, and FPGA executes electric current reading order, is turned by MA current detecting module, ADC
Parallel operation two detects and reads output current value iad；
Host computer reads DC power supply load machine electric current real output value i by serial portsout；
PC control DC power supply load machine repeatedly adjusts electric current output acquisition current point；
Host computer is by resulting iadAnd ioutDigital Signal Processing is carried out, according to iout=A3*iad+B3, fit iadAnd iout
Linear relationship；
Host computer passes through network interface for parameters obtained A3And B3The Parameter analysis of electrochemical mould being sent in the form of four bytes in FPGA
Block.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (6)
1. a kind of voltage and current compensation correction method based on FPGA characterized by comprising
Host computer carries out parameter correction, show that floating voltage parameter, band carry voltage parameter and current parameters；
FPGA reads floating voltage parameter by Parameter analysis of electrochemical module, band carries voltage parameter and current parameters, and is wiped by FLASH
Except floating voltage parameter, band load voltage parameter and current parameters are written in M25P80 device by module for reading and writing, data are carried out
It saves；
Floating voltage parameter is wiped in module for reading and writing from FLASH by voltage configuration module and is read out by FPGA, carries out parameter
Change configuration, output voltage can be directly changed voltage output, user is facilitated to debug；
The voltage and current value of output is carried out parametrization conversion by voltage read module and electric current read module by FPGA, is shown
Show the output of voltage and current；
FPGA passes through the relationship of voltage compensation module real-time detection voltage output value and theoretical voltage, is more than that theoretical voltage 5mv will
The automatic compensation for realizing voltage.
2. the voltage and current compensation correction method according to claim 1 based on FPGA, which is characterized in that described upper
Machine carries out parameter correction and specifically includes floating voltage parameter correction, band load voltage parameter correction and current parameters correction.
3. the voltage and current compensation correction method according to claim 2 based on FPGA, which is characterized in that the zero load
Voltage parameter correction specifically comprises the following steps:
(1) host computer issues floating voltage parameter correction order to FPGA by network interface；
(2) voltage value v needed for host computer issues voltage configuration moduleda, FPGA configures DAC converter and BUCK voltage adjusts mould
Block is by voltage output；
(3) DC power supply load machine connection feedback and Voltage Feedback terminal, read virtual voltage output valve vout, and pass through USB-
TTL returns to host computer；
(4) host computer is arranged voltage acquisition range, repeatedly issues parameter to FPGA by network interface according to user's actual output voltage
Corrective command, and repeat step (2)-(3)；
(5) host computer screens collected multiple groups voltage value, Digital Signal Processing is carried out, according to vda=A1*vout+B1,
Simulate vdaAnd voutOptimal linear relationship, obtains A1And B1；
(6) host computer will calculate parameters obtained A by network interface1And B1The parametric solution being sent in the form of four bytes in FPGA
Analyse module.
4. the voltage and current compensation correction method according to claim 2 based on FPGA, which is characterized in that the band carries
Voltage parameter correction specifically comprises the following steps:
(1) host computer carries voltage parameter corrective command to hair band under FPGA by network interface；
(2) voltage value v needed for host computer issues voltage configuration moduleda, FPGA configures DAC converter and BUCK voltage adjusts mould
Block is by voltage output；
(3) host computer, which is sent, reads voltage commands, and FPGA executes the block command of voltage reading modulus, by FB detecting voltage module and
ADC converter one detects and reads voltage value vad。
(4) DC power supply load machine connection feedback and Voltage Feedback terminal, read virtual voltage output valve vout, and pass through USB-
TTL returns to host computer；
(5) host computer is arranged voltage acquisition range, repeatedly issues parameter to FPGA by network interface according to user's actual output voltage
Corrective command, and repeat step (2)-(4)；
(6) host computer screens collected multiple groups voltage value, Digital Signal Processing is carried out, according to vout=A2*vad+B2,
It simulates and reads voltage value vadWith feedback and Voltage Feedback terminal virtual voltage output valve voutOptimal linear relationship, obtains A2
And B2；
(7) host computer will calculate parameters obtained A by network interface2And B2The parametric solution being sent in the form of four bytes in FPGA
Analyse module.
5. the voltage and current compensation correction method according to claim 2 based on FPGA, which is characterized in that the electric current
Parameter correction specifically comprises the following steps:
(1) PC control DC power supply load machine provides load current to power panel；
(2) host computer sends electric current reading order, and FPGA executes electric current reading order, is converted by MA current detecting module, ADC
Device two detects and reads output current value iad；
(3) host computer reads DC power supply load machine electric current real output value i by serial portsout；
(4) PC control DC power supply load machine repeatedly adjusts electric current output acquisition current point；
(5) host computer is by resulting iadAnd ioutDigital Signal Processing is carried out, according to iout=A3*iad+B3, fit iadAnd iout
Linear relationship；
(6) host computer passes through network interface for parameters obtained A3And B3The Parameter analysis of electrochemical mould being sent in the form of four bytes in FPGA
Block.
6. a kind of voltage and current compensation correction system based on FPGA, which is characterized in that including power panel, host computer and direct current
Power source loads machine；
DAC converter, ADC converter one, ADC converter two, BUCK voltage regulator module, FB voltage are set on the power panel
Detecting module, MA current detecting module, FPGA, feedback and output voltage terminals, M25P80 device；
Setting voltage configuration module, voltage read module, electric current read module, voltage compensation module, FLASH are wiped in the FPGA
Except module for reading and writing and Parameter analysis of electrochemical module；
Network interface and USB are set on the host computer, serial ports is set on the DC power supply load machine, the power panel passes through feedback
DC power supply load machine is connected with output voltage terminals, the DC power supply load machine passes through the USB connection of serial ports and host computer,
The host computer is connect by network interface with FPGA.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910001461.3A CN109768695A (en) | 2019-01-02 | 2019-01-02 | Voltage and current compensation correction system and its working method based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910001461.3A CN109768695A (en) | 2019-01-02 | 2019-01-02 | Voltage and current compensation correction system and its working method based on FPGA |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109768695A true CN109768695A (en) | 2019-05-17 |
Family
ID=66453427
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910001461.3A Pending CN109768695A (en) | 2019-01-02 | 2019-01-02 | Voltage and current compensation correction system and its working method based on FPGA |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109768695A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111077936A (en) * | 2019-12-30 | 2020-04-28 | 南京广慈医疗科技有限公司 | Programmable self-calibration positive voltage constant power output circuit and method |
| CN111124030A (en) * | 2019-12-30 | 2020-05-08 | 南京广慈医疗科技有限公司 | Programmable self-calibration negative voltage constant power output circuit and method |
| CN115599013A (en) * | 2022-09-08 | 2023-01-13 | 苏州中科行智智能科技有限公司（Cn） | Method for improving working efficiency of power supply |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102570814A (en) * | 2010-12-22 | 2012-07-11 | 中兴通讯股份有限公司 | Switching power supply feedback compensation method and digital signal processing device |
| CN207882786U (en) * | 2018-01-01 | 2018-09-18 | 珠海市运泰利自动化设备有限公司 | A kind of programme control precision adjustable direct voltage source |
-
2019
- 2019-01-02 CN CN201910001461.3A patent/CN109768695A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102570814A (en) * | 2010-12-22 | 2012-07-11 | 中兴通讯股份有限公司 | Switching power supply feedback compensation method and digital signal processing device |
| CN207882786U (en) * | 2018-01-01 | 2018-09-18 | 珠海市运泰利自动化设备有限公司 | A kind of programme control precision adjustable direct voltage source |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111077936A (en) * | 2019-12-30 | 2020-04-28 | 南京广慈医疗科技有限公司 | Programmable self-calibration positive voltage constant power output circuit and method |
| CN111124030A (en) * | 2019-12-30 | 2020-05-08 | 南京广慈医疗科技有限公司 | Programmable self-calibration negative voltage constant power output circuit and method |
| CN111077936B (en) * | 2019-12-30 | 2021-10-22 | 南京广慈医疗科技有限公司 | Programmable self-calibration positive voltage constant power output circuit and method |
| CN115599013A (en) * | 2022-09-08 | 2023-01-13 | 苏州中科行智智能科技有限公司（Cn） | Method for improving working efficiency of power supply |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109768695A (en) | Voltage and current compensation correction system and its working method based on FPGA | |
| CN110988782B (en) | Calibration circuit and system, electric energy metering chip and metering device | |
| CN101915903A (en) | Power meter calibrating system and power meter calibrating method for intelligent electric meter | |
| CN105680860B (en) | Improve the circuit and method of microcontroller A/D conversion accuracy | |
| CN103888140A (en) | Analog-to-digital conversion error self-correction device and method | |
| CN105446409A (en) | Method for calibrating power supply and tuning power supply unit | |
| CN101964660A (en) | Self-correcting analog quantity output circuit | |
| CN117666693A (en) | High-precision adjustable reference voltage source | |
| CN103630729A (en) | One-step wiring device and method for testing 1000kV lightning arrester reference voltage and leakage current | |
| CN106787902B (en) | A kind of amendment wave inverter output voltage control system and control method | |
| CN107656572B (en) | Multi-path adjustable voltage source realized by digital-to-analog converter and control method thereof | |
| CN104330096B (en) | A kind of rectification building-out of measurement signal and the method and device of automatic Calibration | |
| CN101064513B (en) | Digital-to-analog conversion circuit and conversion method | |
| CN108562795A (en) | A kind of solar cell impedance measurement system | |
| CN101603838A (en) | Intelligent transducer and scaling method thereof | |
| CN205720475U (en) | A kind of automatization terminal DTU tests device | |
| CN109814407A (en) | A digital photovoltaic array simulator and its control method | |
| CN208953615U (en) | A kind of array electric resistance measuring apparatus | |
| CN115729211A (en) | Automatic test system and test method for integration of actual measurement and modeling | |
| CN108933590A (en) | A kind of voltage conversion circuit and lighting test device | |
| CN206258759U (en) | Voltage stable output device | |
| CN221946484U (en) | Magnetic sensor communication system | |
| CN106405264A (en) | Automatic terminal DTU test device | |
| CN207819763U (en) | A kind of multichannel adjustable DC is for electric installation | |
| CN105425663A (en) | System and method for analog output signal read-back channel based on FPGA |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190517 |
|
| RJ01 | Rejection of invention patent application after publication |