CN109727864A - Semiconductor structure and forming method thereof - Google Patents
Semiconductor structure and forming method thereof Download PDFInfo
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- CN109727864A CN109727864A CN201711033862.4A CN201711033862A CN109727864A CN 109727864 A CN109727864 A CN 109727864A CN 201711033862 A CN201711033862 A CN 201711033862A CN 109727864 A CN109727864 A CN 109727864A
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Abstract
A kind of semiconductor structure and forming method thereof, wherein method includes: offer substrate, has gate structure in the substrate；The first side wall is formed in the side wall of the gate structure, there is loss ion in first side wall；Protective layer is formed in the side wall of first side wall, it is described protective layer used in the loss for stopping loss ion；Lightly doped district is respectively formed in the substrate of gate structure, the first side wall and protective layer two sides；It is formed after the lightly doped district, forms the second side wall in the side wall of the protective layer.The performance for the first side wall that the method is formed is more stable.
Description
Technical field
The present invention relates to field of semiconductor manufacture more particularly to a kind of semiconductor structure and forming method thereof.
Background technique
Metal oxide semiconductor transistor includes gate structure, the source and drain doping in the substrate of gate structure two sides
Area, the gate structure lower section is conducting channel.The side wall of the gate structure has side wall, on the one hand the side wall is used to protect
Gate structure is protected, on the other hand prevents the source and drain doping area ion implanting of large dosage from getting too close to conducting channel so that occurring source
It is connected between leakage.Development in particular with from semiconductor processing technology to more high-tech node, the size of gate structure is increasingly
Small, the conducting channel in gate structure lower substrates is shorter and shorter, and the side wall that can reduce source and drain leakage current is particularly important,
More stringent requirements are proposed for this manufacturing process to side wall.
The manufacturing step of side wall generally includes: forming side in the side wall and top surface of the substrate and gate structure
Wall film；Removal is located at the side wall film of substrate and gate structure top surface, forms side wall on the side wall of the gate structure.
However, the performance of side wall described in the prior art is poor.
Summary of the invention
The technical problem to be solved by the present invention is to provide a kind of semiconductor structures and forming method thereof, to improve the side wall
Performance.
In order to solve the above technical problems, the embodiment of the present invention provides a kind of forming method of semiconductor structure, comprising: provide
Substrate has gate structure in the substrate；The first side wall, tool in first side wall are formed in the side wall of the gate structure
There is loss ion；Protective layer is formed in the side wall of first side wall, it is described protective layer used in the loss for stopping loss ion；?
Lightly doped district is respectively formed in the substrate of the gate structure, the first side wall and protective layer two sides；Formed the lightly doped district it
Afterwards, the second side wall is formed in the side wall of the protective layer.
Optionally, the forming step of second side wall includes: at the top of the substrate, the first side wall and gate structure
The side wall and top surface of surface and protective layer form the second side wall film；Remove substrate protective layer, the first side wall and grid knot
Second side wall film of structure top surface forms second side wall.
Optionally, the material of second side wall is different from the material of the first side wall；Remove the substrate, protective layer,
The technique of second side wall film of one side wall and gate structure top surface includes: anisotropic dry etch process, it is described respectively to
Anisotropic dry etch process is to the second side wall film and to the etching selection ratio of the first side wall are as follows: 1:1~8:1.
Optionally, the dielectric constant of first side wall are as follows: 5~9.
Optionally, the material of first side wall includes: silicon oxygen carboritride, and the loss ion is Nitrogen ion；Institute
The material for stating the second side wall includes silicon nitride.
Optionally, the material of the protective layer includes: silica, silicon nitride or amorphous silicon.
Optionally, when the material of the protective layer is silicon nitride, the formation process of the protective layer includes: atomic layer deposition
Technique；The parameter of the atom layer deposition process include: temperature be 500 degrees Celsius~650 degrees Celsius, pressure be 0.1 millitorr~
700 supports.
Optionally, the thickness of the protective layer are as follows: 1 angstrom~50 angstroms.
Optionally, it is formed after the protective layer, is formed before source and drain doping area, further include annealing.
Optionally, the technique of the annealing includes: laser annealing technique, flash anneal or ultrashort pulse annealing；
The parameter of the laser annealing technique includes: that temperature is 600 degrees Celsius~1200 degrees Celsius, and the time is 1 second~300 seconds.
Optionally, formed after second side wall, the forming method include: the gate structure, the first side wall,
Source and drain doping area is respectively formed in the substrate of protective layer and the second side wall two sides.
The present invention also provides a kind of semiconductor structures characterized by comprising substrate has grid knot in the substrate
Structure；Positioned at the first side wall of the gate structure sidewall, there is loss ion in first side wall；Positioned at first side wall
The protective layer of side wall, it is described protective layer used in the loss for stopping loss ion；Be located at the gate structure, the first side wall and
The intrabasement lightly doped district in protective layer two sides；Positioned at the second protective layer of the protective layer side wall.
Optionally, the etching selection ratio of second side wall and the first side wall are as follows: 1:1~8:1, Jie of first side wall
Electric constant are as follows: 5~9.
Optionally, the material of first side wall includes: silicon oxygen carboritride, and the loss ion is Nitrogen ion；Institute
The material for stating the second side wall includes silicon nitride.
Optionally, the material of the protective layer includes: silica, silicon nitride or amorphous silicon.
Optionally, the thickness of the protective layer are as follows: 1 angstrom~50 angstroms.
Optionally, the semiconductor structure further include: be located at gate structure, the first side wall, protective layer and the second side wall two
The intrabasement source and drain doping area in side.
Compared with prior art, the technical solution of the embodiment of the present invention has the advantages that
In the forming method for the semiconductor structure that technical solution of the present invention provides, formed after first side wall, directly
The protective layer is formed in the side wall of the first side wall, can effectively shorten the time that the protective layer side wall is exposed, have
Conducive to loss ion in the first side wall of reduction to external diffusion, therefore, it is advantageously ensured that the stability of the first side wall.First side
Wall is used to protect the side wall of gate structure, and therefore, the first side wall is stronger to the protective capability of gate structure sidewall, is conducive to improve
The performance of gate structure.
Further, the material using silicon nitride as the protective layer, so that the protective layer is finer and close, then the protection
Layer stops the ability of loss ion loss in the first side wall stronger, is conducive to the stability for further increasing the first side wall.
Further, it is formed after the protective layer, is formed before lightly doped district, made annealing treatment, be conducive to improve institute
The activity of ion in the first side wall is stated, the stability of the first side wall is improved.
Further, the material of first side wall includes silicon oxygen carboritride, the dielectric constant of silicon oxygen carboritride
It is lower, the capacitor of semiconductor devices is advantageously reduced, the delay time of circuit signal is shortened.Meanwhile silicon oxygen carboritride is made
For the material of the first side wall, first side wall is different from the material of the second side wall film, then described when being subsequently formed the second side wall
Etching technics is high compared with the etching selection to the first side wall to the second side wall, so that the first side wall is not easy to be cut through.Described
One side wall is for protecting the ability of gate structure stronger.
Detailed description of the invention
Fig. 1 to Fig. 3 is a kind of structural schematic diagram of each step of forming method of semiconductor structure；
Fig. 4 to Figure 13 is the structural schematic diagram of each step of the forming method of the semiconductor structure of one embodiment of the invention.
Specific embodiment
As described in background, the performance of the side wall is poor.
Fig. 1 to Fig. 3 is a kind of structural schematic diagram of each step of forming method of semiconductor structure.
Referring to FIG. 1, providing substrate 100, there is gate structure 101 in the substrate 100；In the gate structure 101
Side wall formed the first side wall 102.
Referring to FIG. 2, forming lightly doped district in the substrate 100 of 102 two sides of the gate structure 101 and the first side wall
103。
Referring to FIG. 3, being formed after the lightly doped district 103, the second side wall is formed in the side wall of first side wall 102
104。
In the above method, the forming step of second side wall 104 includes: in the substrate 100 and gate structure 101
Upper and the first side wall 102 side wall and top surface form the second side wall film；Remove substrate 100, the first side wall 102 and grid
Second side wall film of 101 top surface of pole structure forms second side wall.The material of the second side wall film includes nitridation
Silicon, removal substrate 100, the technique of the second side wall film of 101 top surface of the first side wall 102 and gate structure include: each to different
Property dry etch process.The anisotropic dry etch process has biggish on the direction perpendicular to 100 surface of substrate
Etch rate, but be not meant to the anisotropic dry etch process the side for being parallel to 100 surface of substrate fully up
Without etch rate, it may be assumed that in the anisotropic dry etch process, the second side wall film of 101 side wall of gate structure is also carved
Erosion.The second side wall film is formed although with atom layer deposition process, it is also difficult to guarantee that the thickness of the second side wall film is identical.Its
In, the place relatively thin positioned at 101 side wall the second side wall film of gate structure is easily cut through in the anisotropic dry etch process,
To expose the first side wall 102.The material of usual first side wall 102 is also silicon nitride, therefore, in the anisotropy
First side wall 102 is also etched during dry etch process.Since the thickness of the first side wall 102 is relatively thin, so that shape
After second side wall 104, the first side wall 102 may be cut through, so that first side wall 102 is to 101 side of gate structure
The protective capability of wall is inadequate, so that the part side wall of gate structure 101 is exposed.It is formed after second side wall 104, institute
State forming method further include: the shape in the substrate 100 of 104 two sides of the gate structure 101, the first side wall 102 and the second side wall
At source and drain doping area.The forming step in the source and drain doping area includes: in the gate structure 101, the first side wall 102 and second
Source and drain opening is formed in the substrate 100 of 104 two sides of side wall；Epitaxial layer is formed in the source and drain is open；In the epitaxial layer
Mix Doped ions.During forming the epitaxial layer, since the partial sidewall of gate structure 101 is exposed,
Therefore the part that gate structure 101 is exposed also easy epitaxial growth is unfavorable for improving the performance of gate structure 101.
Also, when selecting material of the silicon nitride as the first side wall 102, the dielectric constant of silicon nitride is higher, so that partly leading
The capacitor of body device is larger, leads to the delay of circuit signal, is unfavorable for improving the performance of semiconductor devices.
While a kind of the first side wall 102 of raising is to 101 protective capability of gate structure, the side of capacitors of semiconductor device is reduced
Method includes: the material using silicon oxygen carboritride as the first side wall 102.The forming step of first side wall 102 includes:
In the substrate 100 and the side wall and top surface of gate structure 101 form the first side wall film；Remove substrate 100 and grid
First side wall film of 101 top surface of pole structure.Wherein, the formation process of the first side wall film includes: atom layer deposition process.Institute
It includes ammonia that the parameter for stating atom layer deposition process, which includes: nitrogen source,.In the first side wall film formed using atom layer deposition process
The free unstable Nitrogen ion of easy residual fraction.The first side wall film is used to form the first side wall 102, therefore, described
The unstable Nitrogen ion that also residual fraction dissociates in one side wall 102.Although the subsequent side wall in the first side wall 102 forms second
Side wall 104, second side wall 104 can stop the diffusion of Nitrogen ion in the first side wall 102.However, forming the first side wall 102
Later, it is formed before the second side wall 104, also needs to form lightly doped district 103, so that the time that 102 side wall of the first side wall exposes
Too long, so that Nitrogen ion is easy to external diffusion, so that the stability of the first side wall 102 constantly reduces, then the first side wall 102 is to grid
The protective capability and dielectric constant of pole structure 101 become uncontrollable, therefore, are unfavorable for improving the stability of semiconductor devices.
To solve the technical problem, the present invention provides a kind of forming methods of semiconductor structure, comprising: described first
There is loss ion in side wall, formed after first side wall, directly form protective layer on the side wall of first side wall,
So that the time of the first side wall side wall exposure is shorter, the outside loss of loss ion is advantageously reduced, is conducive to improve the first side wall
The stability of performance.
It is understandable to enable above-mentioned purpose of the invention, feature and beneficial effect to become apparent, with reference to the accompanying drawing to this
The specific embodiment of invention is described in detail.
Fig. 4 to Figure 13 is the structural schematic diagram of each step of the forming method of the semiconductor structure of one embodiment of the invention.
Referring to FIG. 4, providing substrate 200.
In the present embodiment, the substrate 200 includes: substrate 201 and the fin 202 on substrate 201.At other
In embodiment, the substrate is planar substrates.
In the present embodiment, the forming step of the substrate 200 includes: offer initial substrate, the top of the initial substrate
Portion surface has the first mask layer, and first mask layer exposes the top surface of part initial substrate；It is covered with described first
Film layer is exposure mask, etches the initial substrate, forms the substrate 201 and the fin 202 on substrate 201.
In the present embodiment, the material of the initial substrate is monocrystalline silicon, correspondingly, the substrate 201 and fin 202
Material is monocrystalline silicon.
In other embodiments, the material of the initial substrate includes: monocrystalline germanium, SiGe, silicon carbide (SiC), insulator
Upper silicon (SOI) or germanium on insulator (GOI) and III-V compounds of group of GaAs.Correspondingly, the material of the substrate and fin
It include: monocrystalline germanium, SiGe, silicon carbide (SiC), silicon-on-insulator (SOI) or germanium on insulator (GOI) and GaAs III-V
Compounds of group.
The material of first mask layer includes: silicon nitride, and first mask layer is used to form substrate 201 and fin
202 exposure mask.
Also there is separation layer (not marking in figure) in the substrate 200, the forming step of the separation layer includes: described
On substrate 201 and the side wall of fin 202 and top surface form isolated material film；Remove part isolated material film, formed every
Absciss layer, the top surface of the separation layer are lower than the top surface of fin 202, and the side wall of covering part fin 202.
The material of the isolated material film includes: silica or silicon oxynitride, correspondingly, the material packet of the separation layer
It includes: silica or silicon oxynitride.
The formation process of the isolated material film includes: fluid chemistry gas-phase deposition.It is heavy using fluid chemistry gas phase
The separation layer that product technique is formed is finer and close, is conducive to improve the electric isolution performance between separation layer isolation of semiconductor different components.
Referring to FIG. 5, being developed across the gate structure 203 of fin 202.
In the present embodiment, the gate structure 203 include: gate dielectric layer (not marked in figure) and be located at gate dielectric layer
On grid layer (not marked in figure).The top surface of the grid layer has the second mask layer, and second mask layer is used for
Form the exposure mask of gate dielectric layer and grid layer.The material of second mask layer includes silicon nitride.
In the present embodiment, the material of the gate dielectric layer includes: silica, and the material of the grid layer includes: silicon.
Referring to FIG. 6, in the substrate 200 and the side wall and top surface of gate structure 203 formed the first side wall
Film 204, the first side wall film 204 is interior to have loss ion.
The dielectric constant of the first side wall film 204 are as follows: 5~9.
In the present embodiment, the material of the first side wall film 204 includes: silicon oxygen carboritride.Silicon oxygen carbon nitrification
The dielectric constant of object is lower, advantageously reduces the capacitor of semiconductor devices, reduces the delay of circuit signal, is conducive to improve and partly lead
The performance of body device
The formation process of the first side wall film 204 includes: atom layer deposition process, the ginseng of the atom layer deposition process
Number includes: that temperature is 500 degrees Celsius~650 degrees Celsius, and pressure is 0.1 millitorr~700 supports, and nitrogen source includes ammonia.
In the present embodiment, the silicon oxygen carboritride, silicon oxygen carboritride are formed using atom layer deposition process
The free unstable Nitrogen ion of interior easy residual fraction.That is: the described loss ion is Nitrogen ion.
The first side wall film 204 is formed using atom layer deposition process, the first side wall film 204 is to gate structure
203 is stronger with the Step Coverage ability of 202 corner of fin, and is located at the first side wall film 204 of 203 side wall of gate structure
It is used to form the first side wall, therefore, the first side wall is stronger to the protective capability of 203 side wall of gate structure, is conducive to improve grid
The performance of structure 203.
Material using silicon oxygen carboritride as the first side wall film 204.It can also make be subsequently formed
The material etching selection ratio with higher of one side wall and the second side wall film, so that subsequent removal substrate 200, gate structure 203
When with the second side wall film of the first side wall top surface, the first side wall is not cut through.First side wall is for protecting grid knot
Structure 203, so that the first side wall is stronger to the protective capability of gate structure 203, so that subsequent in gate structure, the first side wall, guarantor
When being respectively formed source and drain doping area in the substrate 200 of sheath and the second side wall two sides, there is not mushroom effect in gate structure sidewall,
Be conducive to improve the performance of semiconductor structure.
Referring to FIG. 7, the first side wall film 204 (see Fig. 6) on removal substrate 200 and gate structure 203, in the grid
The first side wall 205 is formed on the side wall of structure 203.
Removal substrate 200 and the first side wall film 204 on gate structure 203 technique include: dry etch process or
One of wet-etching technology or two kinds of combinations.
The first side wall film 204 is used to form the first side wall 205, and therefore, the material of first side wall 205 includes silicon
Oxygen carboritride, first side wall 205 is interior to have loss ion.The effect of first side wall 205 includes: one side,
First side wall 205 is used to protect the side wall of gate structure 203；On the other hand, first side wall 205 is subsequently formed for defining
Lightly doped district position.
Referring to FIG. 8, in the substrate 200, the side wall of the top surface of gate structure 203 and the first side wall 205
Protective film 206 is formed with top surface, the protective film 206 is used to stop the loss of loss ion.
It is formed after first side wall 205, directly forms the protective film 206, so that 205 side wall of the first side wall is sudden and violent
The time of exposing is shorter, is conducive to reduce loss ion loss outward in the first side wall 205, is conducive to improve the first side wall 205
Stability so that first side wall 205 and the second side wall etching selection ratio with higher for being subsequently formed, and first side
The dielectric constant of wall 205 is lower, is conducive to the performance for improving semiconductor devices.
In the present embodiment, the material of the protective film 206 is silicon nitride.In other embodiments, the protective film
Material includes: silica.
In the present embodiment, the formation process of the protective film 206 includes: atom layer deposition process, the atomic layer deposition
The parameter of product technique includes: that temperature is 500 degrees Celsius~650 degrees Celsius, and pressure is 0.1 millitorr~700 supports.
In the present embodiment, the density of the silicon nitride formed using atom layer deposition process is larger, so that the protective film
The barrier properties of loss ion are stronger in 206 pair of first side wall 205, are conducive to further increase the steady of 205 performance of the first side wall
It is qualitative.
The thickness of the protective film 206 are as follows: 1 angstrom~50 angstroms, the protective film 206 is for being subsequently formed protective layer, therefore,
The thickness of the protective film 206 determines the thickness for the protective layer being subsequently formed.
Referring to FIG. 9, removal substrate 200,203 top surface of the first side wall 205 and gate structure protective film 206 (see
Fig. 8), protective layer 207 is formed on the side wall of the first side wall 205.
Remove substrate 200, the technique of protective film 206 of 203 top surface of the first side wall 205 and gate structure includes: dry
One of method etching technics and wet-etching technology or two kinds of combinations.
In the present embodiment, the material of the protective layer 207 is silicon nitride.In other embodiments, the protective layer
Material includes: silica.
The protective film 206 is used to form protective layer 207, therefore, the thickness of the protective layer 207 are as follows: 1 angstrom~50 angstroms,
Select the meaning of the thickness of the protective layer 207 to be: if the thickness of the protective layer 207 less than 1 angstrom so that the protective layer
The protection of 207 pair of first side wall 205 is inadequate, so that the loss ion in the first side wall 205 is still easy to happen escape, causes
The stability of first side wall 205 is poor, is unfavorable for improving the stability of semiconductor devices；If the thickness of the protective layer 207 is big
In 50 angstroms, so that subsequent in gate structure 203, the first side wall 205, protective layer 207 and the second side wall two sides being subsequently formed
The source and drain doping area formed in substrate 200 is apart from each other, is unfavorable for improving the integrated level of semiconductor devices.
Since the protective layer 207 is covered in the side wall of the first side wall 205, the protective layer 207 can stop
Loss ion in one side wall 205 is escaped, so that the performance of the first side wall 205 is more stable.
In the present embodiment, it is formed after the protective layer 207, is made annealing treatment.
In other embodiments, it is formed after the protective layer, without annealing.
In the present embodiment, the technique of the annealing includes: laser annealing (Laser anneal, LSA ANN), institute
It is 600 degrees Celsius~1200 degrees Celsius that the parameter for stating laser annealing technique, which includes: temperature, and the time is 1 second~300 seconds.
In other embodiments, the annealing process includes: flash anneal (Flash anneal, FLA ANN) or surpasses
Short pulse anneals (Millisecond anneal).
In the present embodiment, it is formed after the protective layer, is made annealing treatment, be conducive to activate in the first side wall 205
The activity of ion is conducive to the stability for improving 205 performance of the first side wall.
Referring to FIG. 10, being formed in the fin 202 of 207 two sides of gate structure 203, the first side wall 205 and protective layer light
Doped region 208.
The formation process of the lightly doped district 208 includes ion implantation technology, and the ion implantation technology includes being lightly doped
The type of ion, the conduction type for asking Doped ions and transistor is closely related.
In the present embodiment, the type of transistor is NMOS transistor, and therefore, the ion that is lightly doped is N-type ion,
Such as: phosphonium ion or arsenic ion.In other embodiments, the type of transistor be PMOS transistor, therefore, it is described be lightly doped from
Son is P-type ion, such as: boron ion.
Figure 11 is please referred to, is formed after the lightly doped district 208, in the substrate 200, gate structure 203, the first side wall
205 top surface and the side wall and top surface of protective layer 207 form the second side wall film 209.
The material of the second side wall film 209 includes silicon nitride, and the formation process of the second side wall film 209 includes atom
Layer depositing operation.The second side wall film 209 is for being subsequently formed the second side wall.
Please refer to Figure 12, the of removal substrate 200,207 top surface of gate structure 203, the first side wall 205 and protective layer
Two side wall films 209 (see Figure 11) form the second side wall 210 in the side wall of the protective layer 207.
Remove the second side wall film 209 of substrate 200,207 top surface of gate structure 203, the first side wall 205 and protective layer
Technique include anisotropic dry etch process.The anisotropic dry etch process is perpendicular to 200 surface of substrate
There is higher etch rate on direction, it is not intended that the anisotropic dry etch process is being parallel to substrate 200
Absolutely not therefore etch rate in removal substrate 200, gate structure 203, the first side wall 205 and is protected on the direction on surface
During second side wall film 209 of 207 top surface of layer, the second side wall film 209 of 203 side wall of gate structure is also etched.
Although the second side wall film 209 is formed by atom layer deposition process, also it is difficult to ensure that the thickness of the second side wall 209 is complete
It is exactly the same, it may be by the anisotropic dry etch process in the relatively thin place of 203 side wall the second side wall film 209 of gate structure
It cuts through, exposes the partial sidewall of the first side wall 205.However, due to the material and the second side wall film of first side wall 205
209 material is different, even if the partial sidewall of the first side wall 205 is exposed, the anisotropic dry etch process is to the
The etch rate of one side wall 205 is also relatively slow.Specifically, the anisotropic dry etch process is to the second side wall film 209 and
The etching selection ratio of one side wall 205 are as follows: 1:1~8:1, so that first side wall 205 is not cut through, institute after forming the second side wall 210
The ability for stating the first side wall 205 protection gate structure 203 is stronger, is conducive to the performance for improving gate structure 203.
The material of second side wall 210 includes silicon nitride.Second side wall 210 is for defining the source and drain being subsequently formed
The position of doped region.
Figure 13 is please referred to, in the gate structure 203, the first side wall 205, protective layer 207 and the second side wall 210 two sides
Source and drain doping area 211 is formed in substrate 200.
The forming step in the source and drain doping area 211 includes: in gate structure 202, the first side wall 205,207 and of protective layer
Source and drain opening is formed in the fin 202 of second side wall, 210 two sides；Epitaxial layer is formed in the source and drain is open；In the extension
Source and drain ion is mixed in layer.
The forming step of the source and drain opening includes: one of dry etch process and wet-etching technology or two kinds
Combination.
The conduction type of the epitaxial layer and source and drain ion is related to the type of transistor.In the present embodiment, crystal
Pipe is NMOS transistor, and therefore, the material of the epitaxial layer includes: silicon carbide or silicon, and the source and drain ion is N-type ion,
Such as: phosphonium ion or arsenic ion.In other embodiments, transistor is PMOS transistor, and therefore, the material of epitaxial layer includes:
SiGe or silicon, the source and drain ion are P-type ion, such as: boron ion.
In the present embodiment, the formation process of the epitaxial layer includes epitaxial growth technology.Using epitaxial growth technology shape
During at the epitaxial layer, since the side wall of the gate structure 203 is protected by the first side wall 205, protective layer 207 and second
Sheath 210 is protected, and the top surface of the gate structure 203 has the protection of the second mask layer, therefore, the side wall of gate structure 203
With top surface will not additional epitaxial growth, the pattern of the gate structure 203 is preferable, is conducive to improve gate structure 203
Pattern.
Correspondingly, the embodiment of the present invention also provides one kind is formed by semiconductor structure in aforementioned manners, Figure 12 is please referred to,
Include:
Substrate 200 has gate structure 203 in the substrate 200；
The first side wall 205 on 203 side wall of gate structure, first side wall 205 is interior to have loss ion；
Positioned at the protective layer 207 of the side wall of first side wall 205；
The lightly doped district being located in 207 two sides substrate 200 of the gate structure 203, the first side wall 205 and protective layer
208；
Positioned at the second side wall 210 of 207 side wall of protective layer.
The etching selection ratio of first side wall 205 and the second side wall 210 are as follows: 1:1~8:1, first side wall 205
Dielectric constant are as follows: 5~9.
The material of first side wall 205 includes: silicon oxygen carboritride, and the loss ion is Nitrogen ion；Described
The material of two side walls includes silicon nitride.
The material of the protective layer 207 includes: silica, silicon nitride or amorphous silicon.The thickness of the protective layer 207
Are as follows: 1 angstrom~50 angstroms.
The semiconductor structure further include: be located at gate structure 203, the first side wall 205, protective layer 207 and the second side wall
Source and drain doping area in 210 two sides substrates 200.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (17)
1. a kind of forming method of semiconductor structure characterized by comprising
Substrate is provided, there is gate structure in the substrate；
The first side wall is formed in the side wall of the gate structure, there is loss ion in first side wall；
Protective layer is formed in the sidewall surfaces of first side wall, it is described protective layer used in the loss for stopping loss ion；
Lightly doped district is formed in the substrate of the gate structure, the first side wall and protective layer two sides；
It is formed after the lightly doped district, forms the second side wall in the side wall of the protective layer.
2. the forming method of semiconductor structure as described in claim 1, which is characterized in that the forming step of second side wall
It include: to form the in the substrate, the side wall of the top surface of the first side wall and gate structure and protective layer and top surface
Two side wall films；The second side wall film of the substrate, protective layer, the first side wall and gate structure top surface is removed, described in formation
Second side wall.
3. the forming method of semiconductor structure as claimed in claim 2, which is characterized in that the material of the second side wall film with
The material of first side wall is different；Remove the second side wall film of the substrate, protective layer, the first side wall and gate structure top surface
Technique include: anisotropic dry etch process, the anisotropic dry etch process is to the second side wall film and to first
The etching selection ratio of side wall are as follows: 1:1~8:1.
4. the forming method of semiconductor structure as claimed in claim 3, which is characterized in that the dielectric constant of first side wall
Are as follows: 5~9.
5. the forming method of semiconductor structure as claimed in claim 4, which is characterized in that the material packet of first side wall
Include: silicon oxygen carboritride, the loss ion are Nitrogen ion；The material of second side wall includes silicon nitride.
6. the forming method of semiconductor structure as described in claim 1, which is characterized in that the material of the protective layer includes:
Silica, silicon nitride or amorphous silicon.
7. the forming method of semiconductor structure as claimed in claim 6, which is characterized in that the material of the protective layer is nitridation
When silicon, the formation process of the protective layer includes: atom layer deposition process；The parameter of the atom layer deposition process includes: temperature
Degree is 500 degrees Celsius~650 degrees Celsius, and pressure is 0.1 millitorr~700 supports.
8. the forming method of semiconductor structure as described in claim 1, which is characterized in that the thickness of the protective layer are as follows: 1 angstrom
~50 angstroms.
9. the forming method of semiconductor structure as described in claim 1, which is characterized in that formed after the protective layer, shape
Before lightly doped district, the forming method further includes annealing.
10. the forming method of semiconductor structure as claimed in claim 9, which is characterized in that the technique packet of the annealing
It includes: laser annealing technique, flash anneal or ultrashort pulse annealing；The parameter of the laser annealing technique includes: that temperature is 600
Degree Celsius~1200 degrees Celsius, the time is 1 second~300 seconds.
11. the forming method of semiconductor structure as described in claim 1, which is characterized in that it is formed after second side wall,
The forming method includes: to be respectively formed in the gate structure, the first side wall, protective layer and the substrate of the second side wall two sides
Source and drain doping area.
12. a kind of semiconductor structure characterized by comprising
Substrate has gate structure in the substrate；
Positioned at the first side wall of gate structure sidewall, there is loss ion in first side wall；
It is described protective layer used in the loss for stopping loss ion positioned at the protective layer of the first side wall side wall；
It is located at the gate structure, the intrabasement lightly doped district of the first side wall and protective layer two sides；
Positioned at the second side wall of the protective layer side wall.
13. semiconductor structure as claimed in claim 12, which is characterized in that the choosing of the etching of second side wall and the first side wall
Select ratio are as follows: 1:1~8:1, the dielectric constant of first side wall are as follows: 5~9.
14. semiconductor structure as claimed in claim 13, which is characterized in that the material of first side wall includes: silicon oxygen carbon
Nitrogen compound, the loss ion are Nitrogen ion；The material of second side wall includes silicon nitride.
15. semiconductor structure as claimed in claim 12, which is characterized in that the material of the protective layer includes: silica, nitrogen
SiClx or amorphous silicon.
16. semiconductor structure as claimed in claim 12, which is characterized in that the thickness of the protective layer are as follows: 1 angstrom~50 angstroms.
17. semiconductor structure as claimed in claim 12, which is characterized in that the semiconductor structure further include: be located at grid
Structure, the first side wall, the intrabasement source and drain doping area of protective layer and the second side wall two sides.
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