CN109713081B - Method for manufacturing integrated silicon-based visible light detector array device - Google Patents
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Abstract
集成硅基可见光探测器阵列器件的制作方法，属于光电技术领域。提供了硅基可见光雪崩光电二极管阵列的高集成度以及高集成度的探测单元之间复杂的连接方式的制作工艺方法。本发明的制作方法，先在清洗处理后的衬底材料上沉积外延层作为雪崩层，然后在雪崩层之上沉积场控层，然后在场控层之上沉积吸收层，然后在吸收层之上沉积非耗尽层，然后制备隔离区，然后制备阳极及阳极电极引线，然后制备透光层，然后进行衬底减薄，直至露出隔离区，形成衬底层，最后制备阴极及阴极电极引线，去除基底，得到集成硅基可见光探测器阵列器件。该制作方法制作的阵列器件蓝光响应度高、可见光全波段的量子效率高。
The invention relates to a manufacturing method of an integrated silicon-based visible light detector array device, belonging to the field of optoelectronic technology. The invention provides a manufacturing process method for the high integration of the silicon-based visible light avalanche photodiode array and the complex connection mode between the high integration detection units. In the manufacturing method of the present invention, an epitaxial layer is deposited on the cleaned substrate material as an avalanche layer, a field control layer is deposited on the avalanche layer, an absorption layer is deposited on the field control layer, and then an absorption layer is deposited on the absorption layer. Deposit a non-depleted layer, then prepare the isolation region, then prepare the anode and anode electrode leads, then prepare the light-transmitting layer, then thin the substrate until the isolation region is exposed to form the substrate layer, and finally prepare the cathode and cathode electrode leads, remove A substrate is obtained to obtain an integrated silicon-based visible light detector array device. The array device fabricated by the fabrication method has high blue light responsivity and high quantum efficiency in the entire visible light band.
Description
Technical Field
The invention belongs to the technical field of photoelectricity, and particularly relates to a manufacturing method of an integrated silicon-based visible light detector array device.
Background
An Avalanche Photodiode (APD) is a photosensitive element, which is often used in the field of optical communications. After a reverse bias is applied to a P-N junction of a photodiode made of silicon or germanium, incident light is absorbed by the P-N junction to form a photocurrent, and an avalanche phenomenon (i.e., the photocurrent is multiplied) is generated when the reverse bias is increased.
The operating principle of the avalanche photodiode is as follows: the avalanche effect is generated by utilizing the directional movement of photo-generated carriers in a strong electric field so as to obtain the gain of photocurrent. In the avalanche process, a photon-generated carrier directionally moves at a high speed under the action of a strong electric field, and photon-generated electrons or holes with high kinetic energy collide with lattice atoms to ionize the lattice atoms to generate secondary electron-hole pairs; the secondary electron and hole pairs gain sufficient kinetic energy under the action of the electric field, and the lattice atoms are ionized to generate new electron-hole pairs, and the process continues like avalanche. The number of carriers generated by ionization is far larger than that of photogenerated carriers generated by photoexcitation, and the output current of the avalanche photodiode is rapidly increased. The electrons moving at high speed collide with lattice atoms to ionize the lattice atoms and generate new electron-hole pairs. The newly generated secondary electrons collide again with atoms. The multiple collisions generate chain reactions, resulting in avalanche multiplication of carriers.
In the prior art, the structure of a conventional silicon-based APD is sequentially composed of an n-type non-depletion layer, a p-type avalanche layer, a p-type field control layer, a p-type absorption layer and a p-type substrate layer. Because the absorption rate of the silicon material in a visible light waveband is high, the propagation distance of photons of visible light in the silicon material is short, and the photons are basically and completely absorbed in a non-depletion layer and an avalanche layer after being incident on an APD photosensitive surface, the quantum efficiency of the traditional visible light APD is low. Blue photons of short wavelength are almost completely absorbed in the non-depletion layer of the APD, resulting in a very low blue responsivity of the conventional structure for visible APDs. In the application of systems such as visible light communication and the like, the conventional APD device has the bottleneck problems that high blue light sensitivity, wide band full coverage, high cut-off frequency and the like cannot be simultaneously met, and the development of related application fields is seriously restricted.
Disclosure of Invention
In view of this, the present invention provides a method for manufacturing an integrated silicon-based visible light detector array device, which solves the technical problem that APD in the prior art cannot simultaneously satisfy high blue light sensitivity, wide band full coverage and high cut-off frequency.
The technical scheme adopted by the invention for solving the technical problems is as follows.
The invention provides a method for manufacturing an integrated silicon-based visible light detector array device, which comprises a plurality of detection units, a plurality of isolation regions and a plurality of electrode leads; the detection units are regularly arranged to form an array, and each detection unit comprises an anode, a non-depletion layer, an absorption layer, a field control layer, an avalanche layer, a substrate layer, a cathode and a light transmission layer; the field control layer, the absorption layer and the non-depletion layer are sequentially arranged on the upper surface of the avalanche layer from bottom to top; the euphotic layer and the anode are both arranged on the upper surface of the non-depletion layer, the lower surface of the anode is in contact with the upper surface of the non-depletion layer, the lower surface of the euphotic layer is in full contact with the non-depletion layer or part of the lower surface of the euphotic layer is in contact with the non-depletion layer, and the rest part of the lower surface of the euphotic layer is in contact with the upper surface of the anode; the substrate layer is arranged on the lower surface of the avalanche layer; the cathode is arranged on the lower surface of the substrate layer, and the cathode completely covers or partially covers the lower surface of the substrate layer; the isolation region is arranged between two adjacent detection units and isolates the two adjacent detection units; the electrode lead is arranged on the upper surface of the isolation region, the lower surface of the isolation region or penetrates through the isolation region, and the electrode lead is connected with electrodes among the multiple detection units;
the detection units are connected in parallel, and the manufacturing steps are as follows:
selecting a substrate material, and cleaning the substrate material;
depositing an epitaxial layer on the cleaned substrate material to be used as an avalanche layer;
depositing a field control layer on the upper surface of the avalanche layer;
depositing an absorption layer on the upper surface of the field control layer;
depositing a non-depletion layer on the upper surface of the absorption layer;
preparing a mask pattern on the surface of the non-depletion layer, and preparing an isolation region;
removing the mask material, preparing a mask pattern for filling the isolation region, and removing the mask material to obtain an isolation region;
preparing a mask pattern of the anode and the anode electrode lead, preparing the anode and the anode electrode lead, and removing a mask material;
step nine, preparing a mask pattern of the antireflection film on the upper surfaces of the non-depletion layer or the non-depletion layer and the anode, then preparing the antireflection film, and removing the mask material to obtain a light-transmitting layer;
fixing the front side of the epitaxial wafer on a hard substrate, and then thinning the substrate until the isolation region is exposed to form a substrate layer;
eleventh, preparing a mask of the cathode and the cathode electrode lead, then preparing the cathode and the cathode electrode lead, and removing the mask material;
twelfth, removing the hard substrate fixed on the front surface of the epitaxial wafer, and completing packaging to obtain an integrated silicon-based visible light detector array device;
the detection units are connected in series, and the steps from the seventh step to the twelfth step are replaced by the following steps:
preparing a mask pattern on the surface of the epitaxial wafer with the isolation region, manufacturing an insulating film as a side insulating layer of the detection unit, and removing a mask material;
preparing a mask pattern of the anode and the anode electrode lead coplanar with the anode, preparing the anode and the anode electrode lead, and removing the mask material;
filling the isolation region with an isolation material to form an isolation region;
tenth, preparing an antireflection film on the non-depletion layer or the non-depletion layer and the upper surface of the anode to be used as a light-transmitting layer;
fixing the front side of the epitaxial wafer on a hard substrate, and then thinning the substrate until the lower surface of the isolation region is exposed to form a substrate layer;
preparing mask patterns of the cathode and the cathode electrode lead on the back surface of the epitaxial wafer, manufacturing the cathode and the cathode electrode lead, and removing mask materials;
and thirteen, removing the hard substrate fixed on the front surface of the epitaxial wafer, and completing packaging to obtain the integrated silicon-based visible light detector array device.
Further, the connection mode of the detection unit is a structure that the detection unit is connected in parallel and then connected in series with a mixed electrode, and the steps after the sixth step are replaced by:
when the electrodes are manufactured, firstly, manufacturing of an isolation region, an anode and an anode electrode lead of the detection units needing to be connected in parallel is completed according to corresponding manufacturing steps of a parallel structure, then manufacturing of the anode of the detection units needing to be connected in series, an electrode lead connecting the anode and the cathode between the detection units and the isolation region is completed through corresponding manufacturing steps of a series structure, manufacturing of light transmission layers of all the detection units is completed through corresponding manufacturing steps of the series structure, thinning of substrates of all the detection units is performed, and finally, the cathodes of all the detection units and the cathode electrode lead coplanar with the cathodes are manufactured according to corresponding manufacturing steps of the parallel structure or the series structure.
Further, the connection mode of the detection unit is a structure of first connecting in series and then connecting in parallel, and the steps after the sixth step are replaced by:
when the electrodes are manufactured, firstly, the corresponding manufacturing steps of the series structure are adopted to finish the manufacture of the anodes of the detection units needing to be connected in series, the electrode leads for connecting the anodes and the cathodes between the detection units needing to be connected in series and all the detection unit isolation regions, then the corresponding manufacturing steps of the parallel structure are adopted to finish the manufacture of the anodes of the detection units needing to be connected in parallel and the anode electrode leads between the detection units needing to be connected in parallel, then the manufacture of the euphotic layers of all the detection units is finished according to the corresponding manufacturing steps of the series structure, the substrate thinning is carried out on all the detection units, and then the corresponding manufacturing steps of the parallel structure or the series structure are adopted to finish the manufacture of the cathodes of all the detection units and the cathode electrode leads coplanar with the cathodes.
Further, the substrate material is a silicon wafer.
Further, the shape of the detection unit is square, polygonal, rectangular or circular.
Furthermore, the shape of the anode and the cathode is one or a combination of several of an outer ring shape, a single bar shape, a plurality of bar shapes, a circle shape, an inner ring shape and an inner polygon.
Furthermore, the anode, the cathode and the electrode lead are made of one or more alloys of Au, Ag, Cu, Al, Cr, Ni and Ti.
Further, the non-depletion layer is highly doped p + type silicon with the thickness of 0.01-0.5 micron and the doping concentration of 1017-1019cm-3(ii) a The absorption layer is p-type silicon with a thickness of 1-10 μm and a doping concentration of 1015-1016cm-3(ii) a The field control layer is p-type silicon with a thickness of 0.1-1.0 μm and a doping concentration of 1016-1018cm-3(ii) a The avalanche layer is p-type silicon with a thickness of 0.1-0.5 μm and a doping concentration of 1015-1017cm-3(ii) a The substrate layer is highly doped n + type silicon with the thickness of 5-100 microns and the doping concentration of 1018-1020cm-3。
The p-type silicon doped ion is B3+N-type silicon dopant ion is P5+Or As5+。
Further, the light-transmitting layer is formed by alternately arranging two or three of a high-refractive-index film, a medium-refractive-index film and a low-refractive-index film, and the number of the light-transmitting layers is two to nine; wherein the high refractive index thin film material is CeO2、ZrO2、TiO2、Ta2O5、ZnS、ThO2One or more of MgO and ThO as medium refractive index film material2H2、InO2、MgO-Al2O3One or a combination of more of the above materials, the low refractive index film material is MgF2、SiO2、ThF4、LaF2、NdF3、BeO、Na3(AlF4)、Al2O3、CeF3、LaF3Or LiF, or a combination of any two or more thereof.
Further, the isolation region is made of polyimide, polymethyl methacrylate (PMMA), epoxy resin or SiO2。
The working principle of the integrated silicon-based visible light detector array device provided by the invention is as follows:
the reverse bias voltage is applied between the cathode and the anode of the array device, when light irradiates on a photosensitive surface of the array device, photons reach the absorption layer through the non-depletion layer, photons in a visible light wave band are absorbed, light in a long wave band is transmitted downwards through the absorption layer, absorbed photons in the absorption layer generate non-equilibrium carriers, electrons move towards the n-type substrate layer in an accelerated mode to reach the cathode, holes move towards the p-type non-depletion layer to reach the anode, and therefore current is formed in an external circuit, photoelectric conversion is achieved, when the reverse bias voltage is large enough, the carriers are caused to generate an avalanche multiplication effect in the avalanche layer, the reverse current is increased, and the quantum efficiency of the array device on the light can be increased.
Compared with the prior art, the invention has the beneficial effects that:
the manufacturing method of the integrated silicon-based visible light detector array device provided by the invention combines the MOEMS technology with higher integration level and batch with the semiconductor material growth technology. In terms of device quality, in-situ segmentation of the detection units on the epitaxial wafer of the array device is realized, and uniformity and consistency of unit distribution are ensured; in the manufacturing period, the integrated preparation process is adopted, so that the working efficiency is improved, and the method is suitable for batch manufacturing of large arrays; in the aspect of light receiving of the detection unit, the antireflection film is prepared on the surface of the array device, so that light reflection is reduced, and the light receiving rate is improved.
The integrated silicon-based visible light detector array device manufactured by the manufacturing method can realize the improvement of the blue light responsivity of the array device and simultaneously improve the quantum efficiency of the visible light full-wave band by interchanging the positions of the absorption layer and the avalanche layer.
The integrated silicon-based visible light detector array device manufactured by the manufacturing method adopts a double-sided electrode structure, and the electrode adopts a polygonal, circular or annular electrode shape, so that the electric field distribution of the device is more uniform, the device is protected from being easily broken down, and the quantum efficiency of the device can be improved.
The integrated silicon-based visible light detector array device manufactured by the manufacturing method of the invention arranges the detection units regularly to form the array device, and because the cut-off frequency of the array device is inversely proportional to the area of the photosensitive surface and the sensitivity is proportional to the area of the photosensitive surface, the array device of the invention reduces the photosensitive area of each detection unit and reduces the junction capacitance, thereby improving the cut-off frequency of the device without changing the whole photosensitive area of the device, and the sensitivity of the device is not influenced after the array.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive efforts.
Fig. 1a is a longitudinal sectional view of a parallel structure of an array device of the present invention, fig. 1b is a longitudinal sectional view of a series structure of an array device of the present invention, fig. 1c-1 and fig. 1c-2 are a left-view longitudinal sectional view and a front-view longitudinal sectional view, respectively, of a parallel-first-then-series structure of an array device of the present invention, and fig. 1d-1, fig. 1d-2, and fig. 1d-3 are a front-view longitudinal sectional view, a left-view longitudinal sectional view, and a right-view longitudinal sectional view, respectively, of a series-first-then-parallel structure of an array device of the present invention. In the figure, 1 is an anode, 2 is a non-depletion layer, 3 is an absorption layer, 4 is a field control layer, 5 is an avalanche layer, 6 is a substrate layer, 7 is a cathode, 8 is a light transmission layer, 9 is an isolation region, and 10 is an electrode lead.
In fig. 2, a-d are several exemplary geometrical shapes of the detection unit of the array device of the present invention.
In fig. 3, a-i are several typical electrode shapes of the anode and cathode of the detecting unit of the array device of the present invention; wherein, a and b are outer annular electrodes, c is a single strip electrode, d is a multi-strip electrode, e is the combination of a strip electrode and a circular electrode, f is the combination of an inner annular electrode and a strip electrode, g is the combination of a multi-edge inner annular electrode and a strip electrode, h is the combination of a multi-edge inner annular electrode, a three-strip electrode and a multi-edge outer annular electrode, and i is the combination of a multi-edge inner annular electrode, a double-strip electrode and a multi-edge outer annular electrode.
Fig. 4a, 4b and 4c show several exemplary arrangements of the detecting units of the array device of the present invention.
Fig. 5a is a schematic structural view showing the detection units of the array device of the present invention connected in parallel, fig. 5b is a schematic structural view showing the detection units of the array device of the present invention connected in series, fig. 5c is a schematic structural view showing the detection units of the array device of the present invention connected in series after parallel, and fig. 5d is a schematic structural view showing the detection units of the array device of the present invention connected in series after parallel.
Fig. 6 is a process flow diagram for the preparation of the parallel array device of the present invention, in which (1) - (18) correspond to steps one to eighteen, respectively; (1) - (18) all represent front sectional views.
FIG. 7 is a process flow diagram for the preparation of a tandem array device of the present invention, wherein (1) - (17) correspond to steps one through seventeen, respectively; (1) - (17) all represent front sectional views.
FIG. 8 is a process flow diagram for the fabrication of a parallel-first then series array device of the present invention, wherein (1) - (20) correspond to steps one through twenty, respectively; (1) - (11) each represents a front longitudinal sectional view; (13) the (14), (15) and (16) represent left-side sectional views; (12) of (17), (18), (19) and (20), the left figure represents a left-side sectional view and the right figure represents a front-side sectional view.
Fig. 9 is a process flow diagram for the preparation of a serial-prior-parallel array device according to the present invention, in which (1) - (19) correspond to steps one through nineteen, respectively; (1) - (11) each represents a front longitudinal sectional view; (12) the left figure represents a front sectional view, and the right figure represents a left sectional view; (13) the (14) and (15) represent left-side sectional views; (16) in (17) and (18), the left figure represents a front sectional view, and the right figure represents a right sectional view; (19) the front section, the left section and the right section are represented from top to bottom.
Detailed Description
First embodiment, the first embodiment is described with reference to fig. 1 to 5, and the integrated silicon-based visible light detector array device provided by this embodiment includes a plurality of detection units, a plurality of isolation regions 9, and a plurality of electrode leads 10.
The detection units are regularly arranged to form an array, and each detection unit comprises an anode 1, a non-depletion layer 2, an absorption layer 3, a field control layer 4, an avalanche layer 5, a substrate layer 6, a cathode 7 and a light-transmitting layer 8. The field control layer 4, the absorption layer 3 and the non-depletion layer 2 are sequentially arranged on the upper surface of the avalanche layer 5 from bottom to top. The light-transmitting layer 8 and the anode 1 are both arranged on the upper surface of the non-depletion layer 2, and the lower surface of the anode 1 is in contact with the upper surface of the non-depletion layer 2; the lower surface of the light-transmitting layer 8 can be completely contacted with the non-depletion layer 2, namely, the light-transmitting layer 8 and the anode 1 are positioned on the same plane; a part of the non-depletion layer 2 may be in contact with the upper surface of the anode 1, and the remaining part may be in contact with the upper surface of the anode 1, that is, the light-transmitting layer 8 covers the upper surface of the anode 1. A substrate layer 6 is disposed on the lower surface of the avalanche layer 5. The cathode 7 is arranged on the lower surface of the substrate layer 6, the cathode 7 either completely covering or partially covering the lower surface of the substrate layer 6. The shape of the detection unit of the present embodiment may be circular, square, rectangular, polygonal, or other shapes. The shape of the anode 1 and the cathode 7 can be the same or different, and can be an outer ring shape, a single bar shape, a plurality of bar shapes, a circle shape, an inner ring shape, an inner polygon or other shapes (such as a Chinese character 'Wan' shape), or a combination of one or more of the shapes.
The isolation region 9 is arranged between two adjacent detection units and completely isolates the two adjacent detection units; the isolation region 9 serves to prevent the generation of leakage current and to support the electrode leads.
The electrode lead 10 is arranged on the upper surface of the isolation region, the lower surface of the isolation region or penetrates through the isolation region, and is connected with electrodes among the plurality of detection units in a serial connection mode, a parallel connection mode, a serial connection mode and then a parallel connection mode or a parallel connection mode and then a serial connection mode.
Non-depletion of the present embodimentThe layer 2, the absorption layer 3, the field control layer 4, the avalanche layer 5 and the substrate layer 6 are all prepared by a semiconductor growth technology. The non-depletion layer 2 is highly doped p + type silicon with a thickness of 0.01-0.5 μm and a doping concentration of 1017-1019cm-3(ii) a The absorption layer 3 is p-type silicon with the thickness of 1-10 microns and the doping concentration of 1015-1016cm-3(ii) a The field control layer 4 is p-type silicon with a thickness of 0.1-1.0 μm and a doping concentration of 1016-1018cm-3(ii) a The avalanche layer 5 is p-type silicon with a thickness of 0.1-0.5 μm and a doping concentration of 1015-1017cm-3(ii) a The substrate layer 6 is highly doped n + type silicon with a thickness of 5-100 μm and a doping concentration of 1018-1020cm-3. Wherein, the P-type silicon doping ions are trivalent B ions, and the n-type silicon doping ions are pentavalent P ions or pentavalent As ions.
The anode 1, the cathode 7 on the detection unit and the electrode lead 10 outside the detection unit can be made of one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like. The light transmission layer 8 is formed by alternately arranging two or three of a high-refractive-index film, a medium-refractive-index film and a low-refractive-index film, and has two to nine layers; wherein the high refractive index thin film material may be CeO2、ZrO2、TiO2、Ta2O5、ZnS、ThO2One or more of the above materials can be MgO and ThO2H2、InO2、MgO-Al2O3One or a combination of more of the above materials, the low refractive index film material can be MgF2、SiO2、ThF4、LaF2、NdF3、BeO、Na3(AlF4)、Al2O3、CeF3、LaF3Or LiF, or a combination of any two or more thereof. The isolation region 9 of the present embodiment may be made of polyimide, PMMA, epoxy resin, or SiO2Or other materials.
The thicknesses of the anode 1, the non-depletion layer 2, the absorption layer 3, the field control layer 4, the avalanche layer 5, the substrate layer 6, the cathode 7 and the euphotic layer 8 in the embodiment are not particularly limited, and can be selected according to actual needs or common thicknesses in the field; the longitudinal section of the isolation region 10 may be rectangular or inverted trapezoidal.
Second to eighth embodiments are methods for manufacturing an integrated silicon-based visible light detector array device according to the first embodiment.
In a second embodiment, with respect to a parallel electrode structure array device and a structure in which the light-transmitting layer 8 and the anode 1 are located on the same plane, the basic process steps of the embodiment are as follows with reference to fig. 6:
firstly, selecting a highly doped n + type silicon wafer as a substrate material of an array device, and cleaning; the impurity is a pentavalent element such as P, As.
Depositing a silicon epitaxial layer on a substrate material by using the technologies of Vapor Phase Epitaxy (VPE) or Molecular Beam Epitaxy (MBE) and the like to be used as an avalanche layer 5 of the array device; the epitaxial material grown is silicon with low doping concentration and low defects.
And step three, growing a p-type Si field control layer 4 on the avalanche layer 5 by utilizing a vapor phase epitaxy or molecular beam epitaxy method.
And fourthly, after the field control layer 4 is prepared, growing a layer of p-type Si-based absorption layer 3 on the field control layer 4 by utilizing a vapor phase epitaxy or molecular beam epitaxy method.
And fifthly, growing a layer of p + type Si-based non-depletion layer 2 on the upper surface of the absorption layer 3 by utilizing a vapor phase epitaxy or molecular beam epitaxy method on the surface of the absorption layer 3.
Sixthly, cleaning the epitaxial wafer after the non-depletion layer 2 grows by a heat treatment method, an active ion beam method, an optical cleaning treatment method or a chemical cleaning treatment method, and then preparing SiO on the upper surface of the non-depletion layer 22And (3) a layer.
Step seven, spin-coating photoresist on the surface of the epitaxial wafer, preparing a mask pattern through a photoetching process, and removing redundant SiO by using a chemical corrosion or dry etching method2。
And step eight, forming an isolation region by wet etching, dry etching or mechanical method and the like, wherein the depth of the isolation region is 1-20 μm, and the width of the isolation region is 1-1 mm.
Step nine, utilizing degumming agentRemoving the photoresist, and then removing SiO by wet etching or dry etching2And (5) masking the layer.
Step ten, filling the isolation region with an isolation material to form an isolation region 9, wherein the specific process is as follows:
a) taking photosensitive polyimide as an isolation region material, coating the photosensitive polyimide on the surface of an epitaxial wafer with an isolation region, adopting a vacuum coating method to ensure that the isolation region is filled with the photosensitive polyimide, and then performing pre-curing;
b) and removing the isolation material outside the isolation region through ultraviolet exposure and development, and heating to completely cure the isolation material to complete the preparation of the polyimide isolation region.
Step eleven, cleaning and drying the upper surface of the epitaxial wafer, then spin-coating photoresist on the upper surface, and preparing the anode 1 and anode electrode lead mask patterns of the device through a photoetching process.
And a twelfth step of preparing the anode 1 and the anode electrode lead by evaporation coating, magnetron sputtering, electroforming and other methods, wherein the material is one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and removing the photoresist.
And thirteen, cleaning the upper surface of the epitaxial wafer, then spin-coating photoresist on the surface, and preparing a mask pattern of the antireflection film through a photoetching process.
Fourteen, preparing an antireflection film with the thickness of about 0.1-5 μm on the upper surface of the non-depletion layer 2 by a low-temperature evaporation method to serve as a light-transmitting layer 8 of the array device, and then removing the surface photoresist.
And fifteen, fixing the front surface of the epitaxial wafer on a hard substrate, and then mechanically thinning or chemically thinning and polishing until the isolation region 9 is exposed to form the substrate layer 6.
Sixthly, cleaning the back surface of the epitaxial wafer, drying, then spin-coating photoresist on the back surface, and preparing a mask pattern of the cathode 7 and the cathode electrode lead through a photoetching process.
Seventhly, preparing the cathode 7 and a cathode electrode lead by evaporation coating, magnetron sputtering, electroforming and other methods, wherein the cathode is made of one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and then removing the photoresist.
Eighteen, removing the hard substrate fixed on the front surface of the epitaxial wafer to finish packaging.
In the third embodiment, a manufacturing process for the case where a part of the lower surface of the light-transmitting layer 8 of the array device is in contact with the non-depletion layer 2 and the remaining part is in contact with the upper surface of the anode 1: combining the third step and the fourteenth step in the second embodiment, changing to: and preparing an antireflection film with the thickness of about 0.1-5 mu m on the upper surfaces of the non-depletion layer 2 and the anode 1 by a low-temperature evaporation method to be used as a light-transmitting layer 8 of the array device.
In the fifth embodiment, the isolation material in the second embodiment is replaced with PMMA or epoxy resin, and the process of filling the isolation region with the isolation material in the eleventh step is changed to:
a) coating an isolation material on the surface of the epitaxial wafer with the isolation region, adopting a vacuum coating method to ensure that the isolation region is filled with the isolation material, and then performing pre-curing;
b) and then coating photoresist on the upper surface of the epitaxial wafer, preparing a mask pattern through ultraviolet exposure and development, removing the isolation material outside the isolation region under the protection of the mask, then removing the photoresist, heating to completely cure the isolation material in the isolation region, and completing the preparation of the isolation region 9.
Fifth embodiment, the isolation material in the second embodiment is replaced by SiO2And step eleven, the process for filling the isolation region with the isolation material is changed into the following steps: covering the mask material on the part outside the isolation region, and epitaxially growing SiO2Filling the isolation region, and removing the mask material.
In a sixth embodiment and the method for manufacturing the array device with the serial electrode structure according to this embodiment, the longitudinal section of the detection unit is trapezoidal, and the longitudinal section of the isolation region 9 is inverted trapezoidal, as described in this embodiment with reference to fig. 7. The tenth to eighteen steps in the second embodiment are changed to:
step ten, preparing a mask pattern on the surface of the epitaxial wafer with the isolation region, and performing epitaxial growth or evaporationSputtering of SiO2The film is used as an insulating layer on the side surface of the detection unit (the right side surface of each detection unit), and the mask material is removed.
Eleventh, mask patterns of the anode 1 and the anode electrode lead are manufactured through a photoetching process, the anode 1 and the anode electrode lead are manufactured through processes of evaporation or sputtering, electroforming and the like, the material is one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and the mask material is removed.
Step twelve, filling the isolation region with an isolation material to prepare an isolation region 9, and the specific process is as follows:
a) taking photosensitive polyimide as an isolation region material, coating the photosensitive polyimide on the surface of an epitaxial wafer with an isolation region, adopting a vacuum coating method to ensure that the isolation region is filled with the photosensitive polyimide, and then performing pre-curing;
b) and removing the isolation material outside the isolation region through ultraviolet exposure and development, and heating to completely cure to complete the preparation of the polyimide isolation region.
And thirteen, preparing an antireflection film with the thickness of about 0.1-5 μm on the upper surfaces of the non-depletion layer 2 and the anode 1 by a low-temperature evaporation method to be used as a light-transmitting layer 8 of the array device.
Fourteen, fixing the front surface of the epitaxial wafer on a hard substrate, and then mechanically thinning or chemically thinning and polishing until the anode electrode lead on the lower surface of the isolation region 9 is exposed to form a substrate layer 6.
And fifteenth, cleaning the back surface of the epitaxial wafer, drying, then spin-coating photoresist on the back surface, preparing a mask pattern of the cathode 7 and the cathode electrode lead coplanar with the cathode by a photoetching process, and enabling the cathode electrode lead coplanar with the cathode 7 to be in contact with the anode electrode lead at the bottom part of the isolation region 9.
Sixthly, preparing the cathode 7 and a cathode electrode lead by evaporation coating, magnetron sputtering, electroforming and other methods, wherein the cathode is made of one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and then removing the mask material.
Seventhly, removing the hard substrate fixed on the front surface of the epitaxial wafer to finish packaging.
In the sixth embodiment, the isolation material can also be selected from PMMA, epoxy resin and SiO2Or other materials, and the processing method adopts the steps corresponding to the fourth embodiment and the fifth embodiment.
Seventh embodiment, the present embodiment is described with reference to fig. 8, and a mixed electrode structure that is first connected in parallel and then connected in series is adopted for an array device, for example, parallel connection between columns and serial connection between rows are adopted, when an electrode is manufactured, the manufacturing of the isolation region 9, the anode 1 and the anode electrode lead (located on the upper surface of the isolation region) of the detection unit that needs to be connected in parallel is completed by adopting corresponding steps of the parallel connection structure in the second embodiment, then the manufacturing of the anode 1 on the upper surface of the detection unit that needs to be connected in series, the electrode lead (penetrating through the isolation region) connecting the anode 1 and the cathode 7 between the detection units in series and the isolation region 9 are completed by adopting corresponding steps of the series connection structure in the sixth embodiment, then the manufacturing of the light-transmitting layers 8 of all the detection units is completed by adopting corresponding steps of the series connection structure in the sixth embodiment, and thinning of the substrate is completed by manufacturing all the series connection structure in the sixth embodiment or the parallel connection structure in the second embodiment The cathode 7 of the detection unit and the cathode electrode lead (positioned on the lower surface of the isolation region) coplanar with the cathode are manufactured, the manufacturing methods of the cathode 7 and the cathode electrode lead of the serial structure in the sixth embodiment and the cathode electrode lead of the parallel structure in the second embodiment are the same, the manufacturing methods are that a mask pattern is firstly made, then the electrodes are manufactured by evaporation or sputtering and electroforming, and the serial structure and the pure serial structure/the pure parallel structure are firstly connected in parallel and then the mask pattern is different. The method comprises the following specific steps:
the first to ninth steps are the same as those in the second embodiment (the longitudinal section of the isolation region 9 in the eighth step is an inverted trapezoid);
step ten, filling the isolation area of the detection unit of the parallel part with an isolation material to form an isolation area 9;
a) taking photosensitive polyimide as an isolation region material, coating the photosensitive polyimide on the surface of an epitaxial wafer with an isolation region, adopting a vacuum coating method to ensure that the isolation region is filled with the photosensitive polyimide, and then performing pre-curing;
b) and removing the isolation materials of the isolation regions on the surfaces of the detection units and the leftmost column and the rightmost column of the array through ultraviolet exposure and development, and heating to completely cure the isolation materials to complete the preparation of the polyimide isolation region.
Step eleven, cleaning and drying the upper surface of the epitaxial wafer, then spin-coating photoresist on the upper surface, and preparing the anode 1 of the detection unit of the parallel part and the anode electrode lead mask pattern through a photoetching process.
Step twelve, preparing the anode 1 and the anode electrode lead of the detection unit of the parallel part by methods of evaporation coating, magnetron sputtering, electroforming and the like, wherein the material is one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and removing the photoresist;
thirteen, preparing a mask pattern on the surface of the epitaxial wafer with the isolation region 9, and growing or evaporating or sputtering SiO by epitaxy2The thin film serves as an insulating layer on the side surface (right side surface of each detection unit) of the detection units of the serial connection part, and the mask material is removed.
Fourteen, mask patterns of the anode 1 of the detection unit of the serial part and electrode leads (electrode leads penetrating the isolation region 9) connecting the anode 1 and the cathode 7 are manufactured through a photoetching process, the anode 1 of the detection unit of the serial part and the electrode leads connecting the anode 1 and the cathode 7 are manufactured through processes of evaporation, sputtering, electroforming and the like, the materials are one or more alloys of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and the mask materials are removed.
Step fifteen, filling the isolation region of the detection unit of the series part with an isolation material to prepare an isolation region 9, and the specific process is as follows:
a) taking photosensitive polyimide as an isolation region material, coating the photosensitive polyimide on the surface of an epitaxial wafer with an isolation region, adopting a vacuum coating method to ensure that the isolation region is filled with the photosensitive polyimide, and then performing pre-curing;
b) and removing the isolation materials except the leftmost column and the rightmost column of the array through ultraviolet exposure and development, and heating to completely cure the isolation materials to complete the preparation of the polyimide isolation region.
Sixthly, preparing an antireflection film with the thickness of about 0.1-5 mu m on the upper surfaces of the non-depletion layer 2 and the anode 1 of the epitaxial wafer by using a low-temperature evaporation method to serve as a light-transmitting layer 8 of the array device.
Seventhly, fixing the front side of the epitaxial wafer on a hard substrate, and then mechanically thinning or chemically thinning and polishing until the detection units of the serial connection part expose the anode electrode lead on the lower surface of the isolation region 9 and the detection units of the parallel connection part expose the isolation region 9 to obtain the substrate layer 6.
Eighteen, cleaning and drying the back of the epitaxial wafer, then coating photoresist on the back in a spinning mode, preparing mask patterns of cathodes 7 of all detection units and cathode electrode leads coplanar with the cathodes 7 through a photoetching process, and enabling the cathode electrode leads coplanar with the cathodes 7 of the detection units in the series connection part to be in contact with the anode electrode leads at the bottom of the isolation area 9.
Nineteenth, preparing a cathode 7 and a cathode connecting wire lead by evaporation coating, magnetron sputtering, electroforming and other methods, wherein the material is one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and then removing the mask material.
And twenty, removing the hard substrate fixed on the front surface of the epitaxial wafer to finish packaging.
The eighth embodiment is described with reference to fig. 9, and the embodiment is directed to an array device that adopts a series-first and then-parallel mixed electrode structure, for example, series connection between columns and parallel connection between rows, when electrodes are manufactured, the isolation regions 9 of all detection units, the anodes 1 on the upper surfaces of the detection units to be connected in series, and electrode leads (electrode leads penetrating through the isolation regions 9) connecting the anodes 1 and the cathodes 7 between the detection units are manufactured by adopting corresponding steps of the series structure in the sixth embodiment, then the anode 1 common connection (i.e., the anode leads between the detection units connected in parallel) between the detection units to be connected in parallel and the anodes 1 on the upper surfaces of the detection units are manufactured by adopting corresponding steps of the parallel structure in the second embodiment, and then the light-transmitting layers 8 of all detection units are manufactured according to corresponding steps of the series structure in the sixth embodiment, and thinning the substrate, and finally manufacturing the cathodes 7 of all the detection units and cathode electrode leads (positioned on the lower surface of the isolation region) coplanar with the cathodes according to corresponding steps of the serial structure in the sixth embodiment or the parallel structure in the second embodiment. The method comprises the following specific steps:
the first to ninth steps are the same as those in the seventh embodiment;
step ten, preparing a mask pattern on the surface of the epitaxial wafer with the isolation region 9, and growing or evaporating or sputtering SiO by epitaxy2The film serves as an insulating layer on the side of the detecting unit (the right side of each detecting unit) of the serial portion, and the mask material is removed.
Eleventh, mask patterns of the anode 1 on the upper surface of the detection units connected in series and electrode leads (electrode leads penetrating the isolation region 9) connecting the anode 1 and the cathode 7 between the detection units connected in series are manufactured through a photoetching process, the anode 1 and the electrode leads connecting the anode 1 and the cathode 7 are manufactured through processes of evaporation, sputtering, electroforming and the like, the materials are one or more alloys of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and the mask materials are removed.
Step twelve, filling the isolation regions of all the detection units with an isolation material to prepare an isolation region 9, and the specific process is as follows:
a) taking photosensitive polyimide as an isolation region material, coating the photosensitive polyimide on the surface of an epitaxial wafer with an isolation region, adopting a vacuum coating method to ensure that the isolation region is filled with the photosensitive polyimide, and then performing pre-curing;
b) and removing the isolation material outside the isolation region through ultraviolet exposure and development, and heating to completely cure to complete the preparation of the polyimide isolation region.
And thirteen, cleaning and drying the upper surface of the epitaxial wafer, then spin-coating photoresist on the upper surface, and preparing the anode 1 of the detection unit of the parallel part and the anode electrode lead mask pattern through a photoetching process.
Fourteen, preparing the anode 1 and the anode electrode lead of the detection unit in parallel connection by evaporation coating, magnetron sputtering, electroforming and other methods, wherein the material is one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and removing the photoresist.
And fifteen, preparing an antireflection film with the thickness of about 0.1-5 mu m on the upper surfaces of the non-depletion layer 2 and the anode 1 of the epitaxial wafer by a low-temperature evaporation method to serve as a light-transmitting layer 8 of the array device.
Sixthly, fixing the front side of the epitaxial wafer on a hard substrate, and then mechanically thinning or chemically thinning and polishing until the serial detection unit exposes the anode electrode lead on the lower surface of the isolation region 9 and the parallel detection unit exposes the isolation region 9 to obtain the substrate layer 6.
Seventhly, cleaning the back of the epitaxial wafer, drying, then, coating photoresist on the back in a spinning mode, preparing a mask pattern of the cathodes 7 of all the detection units and the cathode electrode leads coplanar with the cathodes 7 through a photoetching process, and enabling the cathode electrode leads coplanar with the cathodes 7 of the detection units in the series connection part to be in contact with the anode electrode leads at the bottom of the isolation area 9.
Eighteen, preparing a cathode 7 (the cathode of all the detection units) and a cathode electrode lead by evaporation coating, magnetron sputtering, electroforming and other methods, wherein the material is one or more of Au, Ag, Cu, Al, Cr, Ni, Ti and the like, and then removing the mask material.
And nineteenth, removing the hard substrate fixed on the front surface of the epitaxial wafer, and finishing packaging.
The process steps, materials used, and shapes of structures in the various embodiments are interchangeable.
It should be understood that the above embodiments are only examples for clearly illustrating the present invention, and are not intended to limit the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Claims (10)
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| CN107958944A (en) * | 2016-10-14 | 2018-04-24 | 意法半导体(R&D)有限公司 | Avalanche diode and method of manufacturing the same |
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