CN109698204B - Drive substrate and display device - Google Patents
Drive substrate and display device Download PDFInfo
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- CN109698204B CN109698204B CN201710999747.6A CN201710999747A CN109698204B CN 109698204 B CN109698204 B CN 109698204B CN 201710999747 A CN201710999747 A CN 201710999747A CN 109698204 B CN109698204 B CN 109698204B
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- 239000000758 substrate Substances 0.000 title claims abstract description 75
- 239000010410 layer Substances 0.000 claims abstract description 141
- 239000004065 semiconductor Substances 0.000 claims abstract description 76
- 239000011241 protective layer Substances 0.000 claims abstract description 47
- 239000000463 material Substances 0.000 claims abstract description 27
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 20
- 239000011787 zinc oxide Substances 0.000 claims description 10
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 5
- ZBFOLPMOGPIUGP-UHFFFAOYSA-N dizinc;oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Zn+2].[Zn+2] ZBFOLPMOGPIUGP-UHFFFAOYSA-N 0.000 claims description 5
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 5
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical group [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 5
- 229910003437 indium oxide Inorganic materials 0.000 claims description 5
- BDVZHDCXCXJPSO-UHFFFAOYSA-N indium(3+) oxygen(2-) titanium(4+) Chemical compound [O-2].[Ti+4].[In+3] BDVZHDCXCXJPSO-UHFFFAOYSA-N 0.000 claims description 5
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims 2
- 238000002161 passivation Methods 0.000 description 20
- 239000010409 thin film Substances 0.000 description 8
- 239000010408 film Substances 0.000 description 6
- 230000003071 parasitic effect Effects 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B26/00—Optical devices or arrangements for the control of light using movable or deformable optical elements
- G02B26/004—Optical devices or arrangements for the control of light using movable or deformable optical elements based on a displacement or a deformation of a fluid
- G02B26/005—Optical devices or arrangements for the control of light using movable or deformable optical elements based on a displacement or a deformation of a fluid based on electrowetting
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/165—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field
- G02F1/166—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect
- G02F1/167—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect by electrophoresis
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Nonlinear Science (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Molecular Biology (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本发明提供一种驱动基板及显示装置，该驱动基板包括基材、至少一主动元件、电阻、第一保护层以及第二保护层。具有氧化物半导体层的主动元件与耦接至主动元件的电阻配置于基材上。第一保护层覆盖主动元件，其中部分第一保护层直接接触氧化物半导体层而使氧化物半导体层具有第一导电率。第二保护层覆盖第一保护层与电阻，其中部分第二保护层直接接触电阻而使电阻具有第二导电率。第一导电率不同于第二导电率。
The invention provides a driving substrate and a display device. The driving substrate includes a base material, at least one active element, a resistor, a first protective layer and a second protective layer. An active element having an oxide semiconductor layer and a resistor coupled to the active element are disposed on the substrate. The first protective layer covers the active element, wherein a part of the first protective layer directly contacts the oxide semiconductor layer so that the oxide semiconductor layer has a first conductivity. The second protective layer covers the first protective layer and the resistor, wherein a part of the second protective layer directly contacts the resistor so that the resistor has a second conductivity. The first conductivity is different from the second conductivity.
Description
Technical Field
The present invention relates to a substrate and an electronic device, and more particularly, to a driving substrate and a display device having the driving substrate.
Background
Generally, the amorphous silicon thin film transistor is prone to cause threshold voltage shift and high leakage current (off current) under a high voltage operating environment, and the molecular structure arrangement of the amorphous silicon is non-sequential and non-directional, which affects the electron movement of the channel layer in the amorphous silicon thin film transistor, and further degrades the carrier mobility (mobility). In contrast, the oxide semiconductor thin film transistor has superior high voltage stability and better carrier mobility. Therefore, the oxide semiconductor thin film transistor has a potential to be a driving element of a display device in a high voltage operating environment.
However, although the oxide semiconductor thin film transistor has a good high voltage resistance, it does not resist high current (high heat), and thus the oxide semiconductor thin film transistor cannot withstand high current and is damaged in a high voltage operating environment, and the display device cannot be used normally. Therefore, the channel layer length of the oxide semiconductor thin film transistor is usually increased to reduce the current load, but this method is accompanied by the increase of the parasitic capacitance, which results in the serious signal delay and higher power loss.
Disclosure of Invention
The invention provides a driving substrate, which is provided with a resistor coupled with an active element, can effectively prevent the active element from being burnt due to high current of a load in the active element, and can simultaneously solve the problems of signal delay and high power consumption caused by parasitic capacitance.
The invention provides a display device, which comprises the driving substrate and has better stability and longer service life.
The driving substrate of the invention comprises a base material, at least one active element, a resistor, a first protective layer and a second protective layer. The active device is disposed on the substrate and includes an oxide semiconductor layer. The resistor is disposed on the substrate and coupled to the active device. The first protective layer covers the active device, wherein a portion of the first protective layer directly contacts the oxide semiconductor layer to make the oxide semiconductor layer have a first conductivity. The second protective layer covers the first protective layer and the resistor, wherein part of the second protective layer is in direct contact with the resistor, so that the resistor has a second conductivity. The first conductivity is different from the second conductivity.
In an embodiment of the invention, the active device further includes a gate electrode, a gate insulating layer, a source electrode and a drain electrode. The gate insulating layer is disposed between the gate electrode and the oxide semiconductor layer. The source electrode and the drain electrode are arranged on the same side of the oxide semiconductor layer, and part of the oxide semiconductor layer is exposed between the source electrode and the drain electrode.
In an embodiment of the invention, the oxide semiconductor layer is located between the gate and the substrate. The source electrode and the drain electrode are positioned between the grid insulating layer and the base material.
In an embodiment of the invention, the resistor is electrically connected in series with the source or the drain.
In an embodiment of the invention, an orthographic projection of the first passivation layer on the substrate does not overlap an orthographic projection of the resistor on the substrate.
In an embodiment of the invention, a material of the first passivation layer is different from a material of the second passivation layer.
In an embodiment of the invention, the first passivation layer is made of silicon oxide, and the second passivation layer is made of silicon nitride.
In an embodiment of the invention, a material of the oxide semiconductor layer is selected from an indium gallium zinc oxide, an indium oxide, a zinc oxide, an indium titanium oxide, or a zinc titanium oxide.
In an embodiment of the invention, the resistor and the oxide semiconductor layer belong to the same film layer.
The display device of the invention comprises a driving substrate and a display medium. The driving substrate comprises a base material, at least one active element, a resistor, a first protective layer and a second protective layer. The active device is disposed on the substrate and includes an oxide semiconductor layer. The resistor is disposed on the substrate and coupled to the active device. The first protective layer covers the active device, wherein a portion of the first protective layer directly contacts the oxide semiconductor layer to make the oxide semiconductor layer have a first conductivity. The second protective layer covers the first protective layer and the resistor, wherein part of the second protective layer is in direct contact with the resistor, so that the resistor has a second conductivity. The first conductivity is different from the second conductivity. The display medium is disposed on the driving substrate.
In an embodiment of the invention, the active device further includes a gate electrode, a gate insulating layer, a source electrode and a drain electrode. The gate insulating layer is disposed between the gate electrode and the oxide semiconductor layer. The source electrode and the drain electrode are arranged on the same side of the oxide semiconductor layer, and part of the oxide semiconductor layer is exposed between the source electrode and the drain electrode.
In an embodiment of the invention, the resistor is electrically connected in series with the source or the drain.
In an embodiment of the invention, an orthographic projection of the first passivation layer on the substrate does not overlap an orthographic projection of the resistor on the substrate.
In an embodiment of the invention, a material of the first passivation layer is different from a material of the second passivation layer.
In an embodiment of the invention, a material of the oxide semiconductor layer is selected from an indium gallium zinc oxide, an indium oxide, a zinc oxide, an indium titanium oxide, or a zinc titanium oxide.
In an embodiment of the invention, the display medium includes an electrophoretic display film or an electrowetting display film.
In an embodiment of the invention, the display device further includes a planarization layer disposed between the driving substrate and the display medium.
In view of the above, the active device of the driving substrate of the invention is coupled to the resistor, wherein the first protection layer directly contacts the oxide semiconductor layer to make the oxide semiconductor layer have the first conductivity, and the second protection layer directly contacts the resistor to make the resistor have the second conductivity. Therefore, the current passing through the active element can be effectively limited, the situation that the active element is burnt by the high current accompanied by high-voltage operation can be avoided, the parasitic capacitance of the active element can be minimized, and the problems of signal delay and high power consumption can be further improved.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1A is a schematic partial cross-sectional view illustrating a display device according to an embodiment of the invention;
FIG. 1B is a schematic top view of the driving substrate of FIG. 1A;
fig. 2 is a partial cross-sectional view of a driving substrate according to another embodiment of the invention.
The reference numbers illustrate:
10: display device
100A, 100B: driving substrate
110: base material
120. 120': active component
122. 122': grid electrode
124. 124': gate insulating layer
126A, 126A': source electrode
126B, 126B': drain electrode
128. 128': oxide semiconductor layer
130: resistance (RC)
140: first protective layer
150: second protective layer
160: scanning line
170: data line
180: pixel electrode
200: display medium
300: planarization layer
Detailed Description
Fig. 1A is a partial cross-sectional view of a display device according to an embodiment of the invention. Fig. 1B is a schematic top view of the driving substrate of fig. 1A. Referring to fig. 1A, a display device 10 of the present embodiment includes a driving substrate 100A and a display medium 200, wherein the display medium 200 is disposed on the driving substrate 100A. Here, the display medium 200 is, for example, an electrophoretic display film or an electrowetting display film, but not limited thereto. As shown in fig. 1A, the display device 10 of the present embodiment may further include a planarization layer 300 disposed between the driving substrate 100A and the display medium 200 for planarizing the driving substrate 100A.
In detail, referring to fig. 1A and fig. 1B, a driving substrate 100A of the display device 10 of the present embodiment includes a base 110, at least one active device 120 (only one is schematically shown in fig. 1A and fig. 1B), a resistor 130, a first protection layer 140, and a second protection layer 150. The active device 120 is disposed on the substrate 110 and includes an oxide semiconductor layer 128. The resistor 130 is disposed on the substrate 110 and coupled to the active device 120, wherein the resistor 130 and the oxide semiconductor layer 128 belong to the same layer. The first protection layer 140 covers the active device 120, wherein a portion of the first protection layer 140 directly contacts the oxide semiconductor layer 128 to make the oxide semiconductor layer 128 have a first conductivity. The second passivation layer 150 covers the first passivation layer 140 and the resistor 130, wherein a portion of the second passivation layer 150 directly contacts the resistor 130 to make the resistor 130 have a second conductivity. The material of the first passivation layer 140 is different from the material of the second passivation layer 150, and the first conductivity is different from the second conductivity.
As shown in fig. 1A and 1B, the active device 120 of the present embodiment includes a gate 122, a gate insulating layer 124, a source 126A and a drain 126B. The gate insulating layer 124 is disposed between the gate electrode 122 and the oxide semiconductor layer 128. The source 126A and the drain 126B are disposed on the same side of the oxide semiconductor layer 128, and a portion of the oxide semiconductor layer 128 is exposed between the source 126A and the drain 126B. Specifically, the gate electrode 122 and the gate insulating layer 124 are sequentially disposed on the substrate 110, and the gate insulating layer 124 completely covers the gate electrode 122 and the substrate 110. The oxide semiconductor layer 128 and the resistor 130 are the same layer and disposed on the gate insulating layer 124. In other words, the orthographic projection of the oxide semiconductor layer 128 on the substrate 110 does not overlap the orthographic projection of the resistor 130 on the substrate 110. Here, the material of the oxide semiconductor layer 128 and the resistor 130 may be selected from indium gallium zinc oxide, indium oxide, zinc oxide, indium titanium oxide, zinc titanium oxide, and the like, but is not limited thereto.
Furthermore, the source 126A and the drain 126B of the active device 120 partially cover the oxide semiconductor layer 128 and oppositely extend to cover the gate insulating layer 124, wherein the source 126A and the drain 126B have a gap above the oxide semiconductor layer 128, such that the oxide semiconductor layer 128 is partially exposed between the source 126A and the drain 126B. Here, the drain 126B extends to the resistor 130, and the drain 126B is electrically connected in series with the resistor 130, but not limited thereto. In other embodiments, not shown, the resistor and the source may be electrically connected in series, which still falls within the scope of the present invention. As can be seen from the configuration of the gate 122, the gate insulating layer 124, the source 126A and the drain 126B in the present embodiment, the active device 120 in the present embodiment is embodied as a bottom-gate thin film transistor, but not limited thereto.
In addition, the first protection layer 140 of the driving substrate 100A covers the source 126A and the drain 126B of the active device 120 and the oxide semiconductor layer 128 exposed by the source 126A and the drain 126B, wherein a portion of the first protection layer 140 directly contacts the oxide semiconductor layer 128 to make the oxide semiconductor layer 128 have the first conductivity. The second passivation layer 150 covers the first passivation layer 140 and the resistor 130, wherein a portion of the second passivation layer 150 directly contacts the resistor 130 to make the resistor 130 have a second conductivity. In particular, the material of the first passivation layer 140 is different from the material of the second passivation layer 150, and the first conductivity is different from the second conductivity. Here, the material of the first protection layer 140 is, for example, silicon oxide, and the material of the second protection layer 150 is, for example, silicon nitride, but not limited thereto.
It should be noted that although the oxide semiconductor layer 128 of the active device 120 and the resistor 130 belong to the same layer, the oxide semiconductor layer 128 and the resistor 130 have different electrical characteristics according to different materials of the passivation layers covering the oxide semiconductor layer 128 and the resistor 130. For example, since the oxide semiconductor layer 128 is in direct contact with the first protection layer 140 (e.g., silicon oxide), the oxide semiconductor layer 128 has a first conductivity, wherein the resistance of the active device 120 is, for example, 106～1013Omega. In addition, the resistor 130 is in direct contact with the second passivation layer 150 (e.g., silicon nitride), such that the resistor 130 has a second conductivity, wherein the resistance of the resistor 130 is, for example, 1.6 × 105Omega. Generally, the resistance is inversely proportional to the conductivity, so the second conductivity is greater than the first conductivity in this embodiment, and the resistor 130 can be regarded as a current limiting resistor.
Since the high current is always accompanied in the high voltage operation environment, the total resistance in the circuit is increased by electrically connecting the active device 120 and the resistor 130 in series, so as to reduce the current passing through the active device 120, thereby avoiding the active device 120 from being burned out due to the high current load. In addition, the current passing through the active device 120 is reduced by the resistor 130, and compared with the conventional method of increasing the channel length of the oxide semiconductor thin film transistor to reduce the current load, the parasitic capacitance generated by an active device having a large-area channel layer for reducing the high current flow can be avoided.
It should be noted that the present embodiment does not limit the structural type of the active device 120, although in the above embodiments, the active device 120 is embodied as a bottom-gate thin film transistor. However, in other embodiments, referring to fig. 2, the oxide semiconductor layer 128 ' of the driving substrate 100B is located between the gate electrode 122 ' and the substrate 110, and the source electrode 126A ' and the drain electrode 126B ' are located between the gate insulating layer 124 ' and the substrate 110. That is, it can be seen from the configuration of the gate 122 ', the gate insulating layer 124 ', the source 126A ' and the drain 126B ', that the active device 120 ' of the present embodiment is embodied as a top-gate thin film transistor, which still falls within the scope of the present invention.
In addition, referring to fig. 1A and fig. 1B, the driving substrate of the present embodiment further includes a plurality of scan lines 160, a plurality of data lines 170, and a plurality of pixel electrodes 180. Each pixel electrode 180 is electrically connected to the corresponding scan line 160 and the corresponding data line 170 through the active device 120. That is, the pixel electrode 180 is electrically connected to the active device 120, and the active device 120 is electrically connected to the corresponding scan line 160 and the corresponding data line 170. In the embodiment of the invention, the scan line 160 is coupled to the gate 122 of the active device 120, the data line 170 is coupled to the source 126A of the active device 120, and the pixel electrode 180 is coupled to the drain 126B of the active device, but not limited thereto. In other embodiments, not shown, the data line may be coupled to the drain of the active device, and the pixel electrode may be coupled to the source of the active device.
In summary, the active device of the driving substrate of the invention is electrically connected in series to the resistor, and the resistor and the oxide semiconductor layer of the active device belong to the same film layer, wherein the first protection layer directly contacts the oxide semiconductor layer to make the oxide semiconductor layer have the first conductivity, and the second protection layer directly contacts the resistor to make the resistor have the second conductivity. Therefore, the current passing through the active element can be effectively limited, the situation that the active element is burnt by the high current accompanied by high-voltage operation can be avoided, the parasitic capacitance of the active element can be minimized, and the problems of signal delay and high power consumption can be further improved. In addition, the display device adopting the driving substrate of the invention has better stability and longer service life.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
Claims (11)
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| CN104576746A (en) * | 2013-10-11 | 2015-04-29 | 元太科技工业股份有限公司 | Active element and manufacturing method thereof |
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| DE10054184C1 (en) * | 2000-11-02 | 2002-04-04 | Infineon Technologies Ag | Transistor with electrostatic discharge protection has layer resistance of source and drain diffusion zones increased via insulating strip zones |
| KR100446309B1 (en) * | 2002-11-14 | 2004-09-01 | 삼성전자주식회사 | Method of fabricating semiconductor device having L-type spacer |
| KR101496148B1 (en) * | 2008-05-15 | 2015-02-27 | 삼성전자주식회사 | Semiconductor device and manufacturing method thereof |
| JP5258467B2 (en) * | 2008-09-11 | 2013-08-07 | 富士フイルム株式会社 | Thin film field effect transistor and display device using the same |
| CN103456794B (en) * | 2008-12-19 | 2016-08-10 | 株式会社半导体能源研究所 | How Transistors Are Made |
| EP2234100B1 (en) * | 2009-03-26 | 2016-11-02 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device |
| WO2011052437A1 (en) * | 2009-10-30 | 2011-05-05 | Semiconductor Energy Laboratory Co., Ltd. | Non-linear element, display device including non-linear element, and electronic device including display device |
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| US10416504B2 (en) * | 2013-05-21 | 2019-09-17 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device |
| KR102169034B1 (en) * | 2014-07-25 | 2020-10-23 | 엘지디스플레이 주식회사 | Display device and manufacturing for method of the same |
| CN105140271B (en) * | 2015-07-16 | 2019-03-26 | 深圳市华星光电技术有限公司 | The manufacturing method and display device of thin film transistor (TFT), thin film transistor (TFT) |
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| CN103367248A (en) * | 2013-07-01 | 2013-10-23 | 京东方科技集团股份有限公司 | Array substrate, preparation method of array substrate and display device |
| TW201503374A (en) * | 2013-07-01 | 2015-01-16 | Chunghwa Picture Tubes Ltd | Oxide semiconductor thin film transistor |
| CN103474468A (en) * | 2013-07-12 | 2013-12-25 | 福建华映显示科技有限公司 | Oxide-semiconductor-film transistor |
| CN104576746A (en) * | 2013-10-11 | 2015-04-29 | 元太科技工业股份有限公司 | Active element and manufacturing method thereof |
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