CN109698141A - A method of promoting gate oxide thickness uniformity - Google Patents
A method of promoting gate oxide thickness uniformity Download PDFInfo
- Publication number
- CN109698141A CN109698141A CN201811607230.9A CN201811607230A CN109698141A CN 109698141 A CN109698141 A CN 109698141A CN 201811607230 A CN201811607230 A CN 201811607230A CN 109698141 A CN109698141 A CN 109698141A
- Authority
- CN
- China
- Prior art keywords
- region
- wafer
- grid oxygen
- oxygen film
- gate oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Formation Of Insulating Films (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The present invention provides a kind of method for promoting gate oxide thickness uniformity, comprising: provides a wafer, multiple grid oxygen film adjustment locations are distributed on wafer；Polar coordinate system is established as pole using the center of circle of wafer, crystal column surface is divided into multiple regions, each region corresponds to a polar radius value；Each area distribution has at least one grid oxygen film adjustment location；Halogen lamp and multiple control probes for heating wafer is provided；Obtain each control probe and correspond to polar radius value, and according to its radius value obtain each control probe corresponding to region；Standard thickness is provided, and obtains temperature value required for grid oxygen film under standard thickness, calculates the corresponding grid oxygen film average thickness in each region, then calculates the temperature value that grid oxygen film corresponding with each region needs to adjust.By corresponding polar coordinates and thermoprobe physical location, it is precisely calculated temperature-compensating, can effectively promote wafer grid oxygen film thickness uniformity.
Description
Technical field
The present invention relates to IC manufacturing fields, more particularly to a kind of method for promoting gate oxide thickness uniformity.
Background technique
As semiconductor technology continues to develop, the size of cmos device is steadily decreasing.This just proposes more electrology characteristic
More cause the concern of people for strict requirements, especially grid oxygen area electrical characteristics and its uniformity.But in actual production
In, it is uneven that many reasons will lead to gate oxide thickness.Usually because pressure, gas flow, the unequal factor of heat will lead to grid
Oxygen film growth thickness is uneven, to affect the electric property of whole silicon wafer, this phenomenon will affect device entirety yield.
Traditional technology is typically only used for control baffle for the adjustment of inhomogeneities, usually diametrically measures according to one more
Point substantially adjusts amplitude by being calculated, or is substantially adjusted according to film thickness figure, and product cannot because measuring region
Along straight line measure multiple spot, however control baffle can not completely reactor product film thickness.
The uniformity of gate oxide thickness is promoted therefore, it is necessary to a kind of method for being able to solve the above problem.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of promotion gate oxide thickness uniformities
Method, for solving in the prior art due to pressure, gas flow, it is thick that the unequal factor of heat will lead to the growth of grid oxygen film
Spend non-uniform problem.
In order to achieve the above objects and other related objects, the present invention provides a kind of method for promoting gate oxide thickness uniformity,
This method includes at least: Step 1: providing a wafer, multiple grid oxygen film adjustment locations are distributed on the wafer；Step 2: with
The center of circle of the wafer is that pole establishes polar coordinate system, the crystal column surface is divided into multiple regions, each region corresponds to institute
State a polar radius value；Each area distribution has at least one grid oxygen film adjustment location；Step 3: providing for heating
The halogen lamp of wafer and multiple control probes；It obtains each control probe and corresponds to polar radius value, and partly according to it
Diameter value obtains region corresponding to each control probe；Step 4: providing standard thickness, and obtain grid oxygen under the standard thickness
Temperature value required for film carries out film thickness measurement to each grid oxygen film adjustment location and the corresponding grid oxygen film in each region is average
Then thickness calculates the temperature value that grid oxygen film corresponding with each region needs to adjust.
Preferably, wafer described in step 1 is the wafer with semiconductor devices, and the grid oxygen film is the semiconductor
A part of device.
Preferably, the adjustment location of grid oxygen film described in step 1 is 63.
Preferably, the number in the multiple region in step 2 is 19, respectively first area to the 19th region.
Preferably, in the step 2 polar radius value be respectively as follows: 0mm, 25.9mm, 32.9mm, 41.87mm,
51.8mm、61.36mm、65.8mm、70.7mm、77.7mm、84.4mm、98.7mm、101.8mm、103.6mm、108.7mm、
111.5mm、122.7mm、125.7mm、129.5mm、131.6mm。
Preferably, one 63 points are shared in 19 regions, wherein corresponding the point in first area；Second, third,
Five, the seven, the nine, the 11st, the 14th, the 18th, the 19th region respectively corresponds two points；4th, the 6th, the 8th,
13, the 15th, the 16th, the 17th region respectively correspond four points；Tenth, No.12 District domain respectively corresponds eight points,
In a point in each region represent a grid oxygen film adjustment location.
Preferably, the halogen lamp in the step 3 includes two-dimentional pointolite array, described in the heat by lalonge lamp
When wafer, described two-dimension light source array projection is in whole wafer.
Preferably, the number of control probe is seven in the step 3, the respectively first to the 7th control probe.
Preferably, the corresponding radius value of the described first to the 7th control probe be followed successively by respectively 16.6mm, 24.3mm,
64.5mm、81.3mm、106.6mm、134.4mm、141.4mm。
As described above, the method for promotion gate oxide thickness uniformity of the invention, has the advantages that through corresponding pole
Coordinate and thermoprobe physical location, are precisely calculated temperature-compensating, can effectively promote wafer grid oxygen film thickness uniformity.
Detailed description of the invention
Fig. 1 is shown as the method flow diagram of promotion gate oxide thickness uniformity of the invention；
Fig. 2 is shown as 63 distribution schematic diagrams on wafer of the invention；
Fig. 3 is shown as the distribution schematic diagram of corresponding eight points in No.12 District domain of the invention；
Fig. 4 is shown as two-dimension light source array schematic diagram in halogen lamp of the invention.
Component label instructions
The first to the 7th control probe of 1-7
10 different zones boundaries
11 halogen lamp boundaries
12 ring outer diameters
13 edge of wafer
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
It please refers to Fig.1 to Fig.4.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, only shown in schema then with related component in the present invention rather than package count when according to actual implementation
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its
Assembly layout kenel may also be increasingly complex.
The method of promotion gate oxide thickness uniformity of the invention, as shown in Figure 1, Fig. 1 is shown as promotion grid oxygen of the invention
The method flow diagram of the thickness uniformity.The specific steps of which are as follows:
Step 1: providing a wafer, multiple grid oxygen film adjustment locations are distributed on the wafer；Ideally wafer
The thickness of each grid oxygen film of upper distribution is consistent, but due to the problem of manufacturing process, waiting many reasons by heated in reality
Lead to the different zones uneven heating on wafer and the gate oxide thickness of each region is made to have difference, therefore, it is necessary to measure
The thickness of multiple grid oxygen films in different location, therefore, present invention proposition are distributed multiple grid oxygen film adjustment locations on wafer；
Each adjustment location reacts a grid oxygen film thickness.Under normal circumstances, it is reacted with the wafer with semiconductor devices, preferably
Ground uses the wafer of semiconductor devices in the present embodiment, and the grid oxygen film is a part for constituting the semiconductor devices.
Further, in this embodiment the grid oxygen film adjustment location is 63.
Such as Fig. 1, then carry out Step 2: polar coordinate system is established as pole using the center of circle of the wafer, by the wafer table
Face is divided into multiple regions, and each region corresponds to polar radius value；There is at least one described grid in each region
Oxygen film adjustment location；In the present embodiment, it is preferable that the number of multiple regions described in the step is 19, respectively the firstth area
Domain to the 19th region.Further, in the step 2 polar radius value be respectively as follows: 0mm, 25.9mm, 32.9mm,
41.87mm、51.8mm、61.36mm、65.8mm、70.7mm、77.7mm、84.4mm、98.7mm、101.8mm、103.6mm、
108.7mm,111.5mm,122.7mm,125.7mm,129.5mm,131.6mm.Further, one shared in 19 regions
63 points, as shown in Fig. 2, Fig. 2 is shown as 63 distribution schematic diagrams on wafer of the invention.Wherein first area is one corresponding
Point, polar coordinates 0, corresponding radius value are 0mm；Second, third, the 5th, the 7th, the 9th, the 11st, the 14th, the tenth
Eight, the 19th region respectively corresponds two points；As shown in Fig. 2, the polar coordinates of two points in second area are respectively 25.9, it is right
The radius value answered is 25.9mm, figure it is seen that two points are located at a left side adjacent with the first area corresponding points
Right side；The polar coordinates of corresponding two points in third region be 32.9, corresponding radius value be 32.9mm, as shown in Fig. 2, this two
A point is located at the upper and lower position adjacent with the first area corresponding points；The polar coordinates of two points in 5th region are distinguished
It is 51.8, corresponding radius value is 51.8mm, which is located at the left and right adjacent with two points of the second area
Side；The polar coordinates of two points in District 7 domain are respectively 65.8, and corresponding radius value is 65.8mm, which distinguishes position
In the upper and lower position adjacent with two, third region point；Nine, the 11st, the 14th, the 18th, the 19th region difference
Corresponding two points, and so on, polar coordinates and radius value are as shown in Figure 2.
Equally, the four, the six, the eight, the 13rd, the ten five, the 16th, the 17th region respectively corresponds four points；The
Ten, No.12 District domain respectively corresponds eight points, and so on, polar coordinates and radius value are as shown in Figure 2.Fig. 3 is shown as this hair
The distribution schematic diagram of corresponding eight points in bright No.12 District domain.
Preferably, wherein a point in each region represents a grid oxygen film adjustment location.Radius value in each region
Identical, the identical point of polar coordinates, each area distribution has at least one described grid oxygen film.
Step 3: providing the halogen lamp and multiple control probes for heating wafer；It obtains each control probe and corresponds to institute
State polar radius value, and according to its radius value obtain each control probe corresponding to region；Preferably, the present embodiment
In, it is described
Halogen lamp in step 3 includes two-dimentional pointolite array, as shown in figure 4, Fig. 4 is shown as halogen of the invention
Two-dimension light source array schematic diagram in lamp.The number of control probe is seven, the respectively first to the 7th control probe.Wherein first
1 to the 7th control probe 7 of control probe is used to detect and the temperature in the region corresponding to it, that is to say, that according to the temperature control
The radius value of probe position, determines the region of its measurement control temperature, and control probe measurement controls the temperature in which region
It is determined by the control probe close to which region, as shown in figure 4, in the present embodiment, it is preferable that in the present embodiment, described
The corresponding radius value of one to the 7th control probe be followed successively by respectively 16.6mm, 24.3mm, 64.5mm, 81.3mm, 106.6mm,
134.4mm、141.4mm。
First control probe 1 corresponds to first area, the corresponding second area of the second control probe 2, and third control probe 3 corresponds to
District 7 domain, corresponding tenth region of the 4th control probe 4, corresponding 14th region of the 5th control probe 5, the 6th control probe 6
Corresponding 19th region.Each control probe adjusts and controls the temperature in the corresponding close region, and the 7th temperature control
The presence of probe and the 6th control probe can all influence the measurement of the grid oxygen film thickness in the 19th region, and the half of the 7th control probe
Diameter value is 141.mm, and close to the 19th region, therefore, the 7th control probe and the 6th control probe are used to measure together the
The grid oxygen film thickness in 19 regions.When the wafer described in the heat by lalonge lamp, described two-dimension light source array projection is in entire brilliant
Circle.In Fig. 4, when the point light source within different zones boundary 10 irradiates the wafer, the grid oxygen with the different zones in its boundary
Film is corresponding.In the present embodiment, halogen lamp boundary 11 is in except ring outer diameter 12, edge of wafer 13 be in the ring outer diameter it
It is interior.
Step 4: providing standard thickness, and temperature value required for grid oxygen film under the standard thickness is obtained, to each grid
Oxygen film adjustment location carries out film thickness measurement and calculates the corresponding grid oxygen film average thickness in each region, then calculates and each region
Corresponding grid oxygen film needs the temperature value adjusted.In the present invention, the standard thickness is that the gate oxide thickness of full wafer wafer needs one
It causes, and is the normal grid oxygen film thickness of product.The corresponding point in each region, the grid oxygen film thickness of the difference in each of which region
Difference, but there are an average values, therefore the gate oxide thickness of difference in each region is averaged to obtain each region pair
The grid oxygen film average thickness answered.Then according to the difference and standard of the average value of each region grid oxygen film thickness and standard thickness
Temperature value required for grid oxygen film under thickness, to calculate the temperature value that the corresponding grid oxygen film in each region needs to adjust.
In conclusion the present invention passes through corresponding polar coordinates and thermoprobe physical location, it is precisely calculated temperature-compensating, energy
It is enough effectively to promote wafer grid oxygen film thickness uniformity, improve the yield of product.So the present invention effectively overcomes in the prior art
Various shortcoming and have high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (9)
1. a kind of method for promoting gate oxide thickness uniformity, which is characterized in that this method includes at least:
Step 1: providing a wafer, multiple grid oxygen film adjustment locations are distributed on the wafer；
Step 2: establishing polar coordinate system as pole using the center of circle of the wafer, the crystal column surface is divided into multiple regions, often
A region corresponds to polar radius value；Each area distribution has at least one described grid oxygen film adjustment location；
Step 3: providing the halogen lamp and multiple control probes for heating wafer；It obtains each control probe and corresponds to the pole
The radius value of coordinate, and according to its radius value obtain each control probe corresponding to region；
Step 4: providing standard thickness, and temperature value required for grid oxygen film under the standard thickness is obtained, to each grid oxygen film
Adjustment location carries out film thickness measurement and calculates the corresponding grid oxygen film average thickness in each region, then calculates corresponding with each region
Grid oxygen film need the temperature value that adjusts.
2. the method according to claim 1 for promoting gate oxide thickness uniformity, it is characterised in that: wafer described in step 1
For the wafer with semiconductor devices, the grid oxygen film is a part of the semiconductor devices.
3. the method according to claim 1 for promoting gate oxide thickness uniformity, it is characterised in that: grid oxygen described in step 1
Film adjustment location is 63.
4. the method according to claim 1 for promoting gate oxide thickness uniformity, it is characterised in that: described more in step 2
The number in a region is 19, respectively first area to the 19th region.
5. the method according to claim 4 for promoting gate oxide thickness uniformity, it is characterised in that: pole is sat in the step 2
Target radius value be respectively as follows: 0mm, 25.9mm, 32.9mm, 41.87mm, 51.8mm, 61.36mm, 65.8mm, 70.7mm,
77.7mm、84.4mm、98.7mm、101.8mm、103.6mm、108.7mm、111.5mm、122.7mm、125.7mm、129.5mm、
131.6mm。
6. the method according to claim 5 for promoting gate oxide thickness uniformity, it is characterised in that: one in 19 regions
63 points are shared, wherein the corresponding point in first area；Second, third, the 5th, the 7th, the 9th, the 11st, the 14th, the tenth
Eight, the 19th region respectively corresponds two points；Four, the six, the eight, the 13rd, the 15th, the 16th, the 17th region point
It Dui Ying not four points；Tenth, No.12 District domain respectively corresponds eight points, wherein in each region a point represents a grid oxygen
Film adjustment location.
7. the method according to claim 1 for promoting gate oxide thickness uniformity, it is characterised in that: the halogen in the step 3
Plain lamp includes two-dimentional pointolite array, when the wafer described in the heat by lalonge lamp, described two-dimension light source array projection in
Whole wafer.
8. according to claim 7 state promotion gate oxide thickness uniformities methods, it is characterised in that: temperature control in the step 3
The number of probe is seven, the respectively first to the 7th control probe.
9. the method according to claim 8 for promoting gate oxide thickness uniformity, it is characterised in that: the described first to the 7th control
The corresponding radius value of warm probe be followed successively by respectively 16.6mm, 24.3mm, 64.5mm, 81.3mm, 106.6mm, 134.4mm,
141.4mm。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811607230.9A CN109698141A (en) | 2018-12-27 | 2018-12-27 | A method of promoting gate oxide thickness uniformity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811607230.9A CN109698141A (en) | 2018-12-27 | 2018-12-27 | A method of promoting gate oxide thickness uniformity |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109698141A true CN109698141A (en) | 2019-04-30 |
Family
ID=66232963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811607230.9A Pending CN109698141A (en) | 2018-12-27 | 2018-12-27 | A method of promoting gate oxide thickness uniformity |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109698141A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111785622A (en) * | 2020-07-15 | 2020-10-16 | 上海华力集成电路制造有限公司 | Annealing process, device and metal contact layer forming method for forming metal silicide |
| CN116845007A (en) * | 2023-07-14 | 2023-10-03 | 北京屹唐半导体科技股份有限公司 | A temperature control method for semiconductor processes |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW421832B (en) * | 1999-09-23 | 2001-02-11 | Applied Materials Inc | Method for adjusting the temperature distribution on the wafer surface in a thermal treatment |
| CN1627494A (en) * | 2003-12-08 | 2005-06-15 | 松下电器产业株式会社 | Rapid thermal processing system, method for manufacturing the same, and method for adjusting temperature |
| US20050247266A1 (en) * | 2004-05-04 | 2005-11-10 | Patel Nital S | Simultaneous control of deposition time and temperature of multi-zone furnaces |
| CN1877791A (en) * | 2005-06-10 | 2006-12-13 | 硅绝缘体技术有限公司 | Thermal processing equipment calibration method |
| JP2007081348A (en) * | 2005-09-16 | 2007-03-29 | Matsushita Electric Ind Co Ltd | Heat treatment temperature adjustment method, substrate heat treatment method, and substrate heat treatment apparatus |
| CN102386132A (en) * | 2010-08-27 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Method of reducing alignment tolerance and special equipment thereof applied in heat treatment process |
| CN103760753A (en) * | 2013-12-31 | 2014-04-30 | 深圳市华星光电技术有限公司 | Substrate roasting device and temperature adjustment method thereof |
-
2018
- 2018-12-27 CN CN201811607230.9A patent/CN109698141A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW421832B (en) * | 1999-09-23 | 2001-02-11 | Applied Materials Inc | Method for adjusting the temperature distribution on the wafer surface in a thermal treatment |
| CN1627494A (en) * | 2003-12-08 | 2005-06-15 | 松下电器产业株式会社 | Rapid thermal processing system, method for manufacturing the same, and method for adjusting temperature |
| US20050247266A1 (en) * | 2004-05-04 | 2005-11-10 | Patel Nital S | Simultaneous control of deposition time and temperature of multi-zone furnaces |
| CN1877791A (en) * | 2005-06-10 | 2006-12-13 | 硅绝缘体技术有限公司 | Thermal processing equipment calibration method |
| JP2007081348A (en) * | 2005-09-16 | 2007-03-29 | Matsushita Electric Ind Co Ltd | Heat treatment temperature adjustment method, substrate heat treatment method, and substrate heat treatment apparatus |
| CN102386132A (en) * | 2010-08-27 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Method of reducing alignment tolerance and special equipment thereof applied in heat treatment process |
| CN103760753A (en) * | 2013-12-31 | 2014-04-30 | 深圳市华星光电技术有限公司 | Substrate roasting device and temperature adjustment method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111785622A (en) * | 2020-07-15 | 2020-10-16 | 上海华力集成电路制造有限公司 | Annealing process, device and metal contact layer forming method for forming metal silicide |
| CN116845007A (en) * | 2023-07-14 | 2023-10-03 | 北京屹唐半导体科技股份有限公司 | A temperature control method for semiconductor processes |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8888087B2 (en) | Susceptor support portion and epitaxial growth apparatus including susceptor support portion | |
| CN109698141A (en) | A method of promoting gate oxide thickness uniformity | |
| US9576830B2 (en) | Method and apparatus for adjusting wafer warpage | |
| US9123765B2 (en) | Susceptor support shaft for improved wafer temperature uniformity and process repeatability | |
| CN110462810B (en) | Substrate position calibration method for substrate support in substrate processing system | |
| CN105097421B (en) | Method for the temperature correction of MASSON fast bench heat treaters | |
| CN113281304B (en) | A method for calibrating the cooling rate of annealing furnace | |
| CN106768684A (en) | A kind of multilayer ceramic substrate air-tightness detection method | |
| TW202003906A (en) | Upper electrode assembly, reaction chamber and atomic layer deposition device | |
| TWI755775B (en) | Method for wafer annealing | |
| CN104858806A (en) | Vacuum clamp | |
| TW421832B (en) | Method for adjusting the temperature distribution on the wafer surface in a thermal treatment | |
| CN103972139A (en) | Calibration method for improving wafer spike annealing uniformity | |
| CN105206549A (en) | Method used for improving stability of TEOS thin film on furnace tube machine | |
| CN106771619B (en) | High-precision temperature control resistance testing system | |
| CN203025576U (en) | Cavity temperature adjustment device | |
| CN104198078A (en) | Rapid response single-side double-electrode glass package NTC (Negative-Temperature-Coefficient) thermistor and manufacturing method thereof | |
| US20230061927A1 (en) | Temperature control apparatus and temperature control method | |
| CN102479690A (en) | Method for improving working current uniformity during annealing of source and drain electrodes on wafer | |
| CN104576484A (en) | Tray structure in semiconductor equipment | |
| CN206339793U (en) | A kind of high power laser light hot spot uniforming device | |
| CN107204290A (en) | A kind of school temperature method of LED wafer quick anneal oven | |
| CN105261576A (en) | Heating chamber and semiconductor processing equipment | |
| KR101971117B1 (en) | Thermocouple wafer with micro well | |
| CN101996909A (en) | Detection methods for ashing process and electrical characteristics of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190430 |