CN109683082B - Test system and test method for optical chip - Google Patents
Test system and test method for optical chip Download PDFInfo
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- CN109683082B CN109683082B CN201811597651.8A CN201811597651A CN109683082B CN 109683082 B CN109683082 B CN 109683082B CN 201811597651 A CN201811597651 A CN 201811597651A CN 109683082 B CN109683082 B CN 109683082B
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- 230000003287 optical effect Effects 0.000 title claims abstract description 57
- 238000012360 testing method Methods 0.000 title claims abstract description 54
- 238000010998 test method Methods 0.000 title claims description 7
- 230000008878 coupling Effects 0.000 claims abstract description 50
- 238000010168 coupling process Methods 0.000 claims abstract description 50
- 238000005859 coupling reaction Methods 0.000 claims abstract description 50
- 239000013307 optical fiber Substances 0.000 claims abstract description 30
- 239000000835 fiber Substances 0.000 claims description 23
- 239000000523 sample Substances 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 11
- 239000010703 silicon Substances 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 5
- 241000562569 Riodinidae Species 0.000 description 2
- 241000724291 Tobacco streak virus Species 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000003292 glue Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000009659 non-destructive testing Methods 0.000 description 1
- 238000011417 postcuring Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01M—TESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
- G01M11/00—Testing of optical apparatus; Testing structures by optical methods not otherwise provided for
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B21/00—Microscopes
- G02B21/0004—Microscopes specially adapted for specific applications
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Analytical Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- Immunology (AREA)
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- Optical Couplings Of Light Guides (AREA)
- Mechanical Coupling Of Light Guides (AREA)
Abstract
The invention discloses a test system for an optical chip, which comprises: a microscope having an objective lens; a chip gripper located below the objective lens; the optical fiber coupling block is positioned below the chip clamp; the optical fiber coupling device comprises a position adjusting structure, wherein the optical fiber coupling block is fixed on the position adjusting structure, and the position and the angle of the optical fiber coupling block are adjusted by adjusting the position adjusting structure. By the embodiment disclosed by the invention, the optical chip grating area can complete multi-channel optical coupling simultaneously, the receiving end and the sending end can be tested independently, the chip test is convenient to replace, the multi-channel optical fiber can be recycled, the channels are assembled and molded at one time, the batch assembly can be realized, and the process repeatability is higher.
Description
Technical Field
The invention relates to the technical field of packaging test of optical chips. In particular, the present invention relates to a test system and a test method for an optical chip.
Background
In recent years, as data centers, cloud computing and the like are rapidly developed, massive data needs to be stored and exchanged. Silicon-based photonics is a preferred solution to this problem due to its unique inherent advantages of compatibility with CMOS processes, low cost, etc. On one hand, through continuous research and development of enterprises and research institutes, more and more silicon-based photonic devices such as detectors, modulators, waveguides and gratings are developed quickly and efficiently, and the performance of the silicon-based photonic devices can basically meet the current application requirements no matter the silicon-based photonic devices are separated devices or monolithic integrated chips, but chip nondestructive testing becomes a problem to be solved urgently.
The most used optical coupling for silicon optical chips is grating coupler because it can have a larger coupling area to better match the numerical aperture of single-mode fiber. FIG. 1 shows a schematic diagram of an optical chip test system according to the prior art. As shown in fig. 1, the V-groove fiber block is fixed to the grating region on the front surface of the chip by ultraviolet glue. However, since the grating region is on the front surface of the chip, the electrodes of the coupling platform microscope and the silicon optical device are usually on the same surface, which results in great difficulty in practical operation during coupling, and the integration density and the testing efficiency are greatly limited due to the post-curing of coupling.
For such applications, the industry is currently using active alignment to optically couple the fiber array, followed by curing using uv dispensing, without channel expansibility. Particularly, for the optical chip which is only used for testing in the early stage, the optical fiber coupling block and the optical chip can not be reused, so that the technical problems that the chip is not easy to replace and the like exist, the assembly difficulty is high, the stability is not high, the repeatability is not high, and the limitation on electrical interconnection is high.
Disclosure of Invention
The invention aims to solve the problems of high-precision test of the silicon-based optoelectronic chip and high difficulty in coupling an optical signal into/out of the silicon-based optoelectronic chip. The core structure and the coupling scheme provided by the invention can realize the test and the optical coupling packaging of the multichannel silicon photonic chip.
To solve the problems in the prior art, according to one aspect of the present invention, there is provided a test system for an optical chip, comprising:
a microscope having an objective lens;
a chip gripper located below the objective lens;
the optical fiber coupling block is positioned below the chip clamp;
the optical fiber coupling device comprises a position adjusting structure, wherein the optical fiber coupling block is fixed on the position adjusting structure, and the position and the angle of the optical fiber coupling block are adjusted by adjusting the position adjusting structure.
In one embodiment of the invention, a chip to be tested is fixed on the chip clamp, wherein the back surface of the chip to be tested faces an objective lens of a microscope; the front surface of the chip to be tested faces downwards and comprises an alignment mark and a grating area.
In one embodiment of the present invention, the test system for optical chips further includes a first light source located at a side of the back surface of the chip to be tested and a second light source located at a side of the back surface of the chip to be tested.
In one embodiment of the present invention, the chip holder includes an adjusting unit for adjusting a position of the chip to be tested.
In one embodiment of the invention, the back surface of the chip to be tested is provided with a back electrode, and the back electrode is electrically connected with the front electrode through the TSV conductive hole.
In one embodiment of the invention, the chip holder includes electrical probe adjustment clips electrically connected to the back electrodes.
In one embodiment of the invention, the grating region is in the range of 10 to 60 microns.
In one embodiment of the invention, the position adjustment structure is a five-dimensional position adjustment structure.
In one embodiment of the invention, the fiber coupling block is a V-groove multi-channel fiber coupling block.
According to another aspect of the present invention, there is provided a method of testing an optical chip using a test system, comprising:
installing a chip to be tested on a chip clamp, wherein the back surface of the chip to be tested faces an objective lens of a microscope, the front surface of the chip to be tested faces an optical fiber coupling block, and the front surface comprises an alignment mark and a grating region;
penetrating the chip from the back of the chip through a microscope to see the alignment mark;
the position and the angle of the optical fiber coupling block are adjusted through the position adjusting structure, and the alignment of the optical fiber and the grating area is realized.
The test system and the test method for the optical chip can realize that the grating area of the optical chip completes multi-channel optical coupling simultaneously, can realize independent test of a receiving end and a transmitting end, are convenient to test and replace, can recycle multi-channel optical fibers, can realize batch assembly by one-time assembly molding of channels, and have high process repeatability. The optical/electrical transceiver module is more suitable for optical/electrical transceiver modules with higher density, and can provide application requirements of higher bandwidth and longer distance for large-scale data centers, super-computation centers and the like.
Drawings
To further clarify the above and other advantages and features of embodiments of the present invention, a more particular description of embodiments of the invention will be rendered by reference to the appended drawings. It is appreciated that these drawings depict only typical embodiments of the invention and are therefore not to be considered limiting of its scope. In the drawings, the same or corresponding parts will be denoted by the same or similar reference numerals for clarity.
FIG. 1 shows a schematic diagram of an optical chip test system according to the prior art.
FIG. 2 shows a schematic diagram of a test system 200 for optical chips according to one embodiment of the invention.
FIG. 3 shows a schematic diagram of a photonic chip test area according to one embodiment of the present invention.
FIG. 4 shows a schematic diagram of a photonic chip test area according to another embodiment of the present invention.
FIG. 5 shows a schematic diagram of a test system 500 for optical chips according to another embodiment of the invention.
Detailed Description
In the following description, the invention is described with reference to various embodiments. One skilled in the relevant art will recognize, however, that the embodiments may be practiced without one or more of the specific details, or with other alternative and/or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of embodiments of the invention. Similarly, for purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the embodiments of the invention. However, the invention may be practiced without specific details. Further, it should be understood that the embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale.
Reference in the specification to "one embodiment" or "the embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment.
The test system and the test method for the optical chip can realize that the grating area of the optical chip completes multi-channel optical coupling simultaneously, can realize independent test of a receiving end and a transmitting end, are convenient to test and replace, can recycle multi-channel optical fibers, can realize batch assembly by one-time assembly molding of channels, and have high process repeatability. The optical/electrical transceiver module is more suitable for optical/electrical transceiver modules with higher density, and can provide application requirements of higher bandwidth and longer distance for large-scale data centers, super-computation centers and the like.
FIG. 2 shows a schematic diagram of a test system 200 for optical chips according to one embodiment of the invention. As shown in fig. 2, the optical chip testing system 200 may include a microscope 210, a chip holder 220, a chip 230 to be tested, a fiber coupling block 240, and a position adjusting structure 250 of the fiber coupling block 240.
The microscope 210 may be an IR microscope. For ease of observation, a light source 211 may be provided near the objective lens of the microscope 210. The chip gripper 220 is located below the objective lens of the microscope 210. The chip 230 to be tested is fixed on the chip holder, wherein the back surface of the chip 230 to be tested faces the objective lens of the microscope 210; the chip 230 under test is face down and contains alignment marks and gratings. The chip holder 210 may further include a position adjusting structure to adjust the position of the chip. In one embodiment of the present invention, the chip 230 under test may also be a silicon optical chip, a germanium silicon optical chip, or an optical chip of other semiconductor materials.
The fiber coupling block 240 is located below the chip 230 to be tested. The fiber coupling block 240 is fixed to the position adjustment structure 250. The fiber coupling block 240 may be a multi-channel fiber coupling block with V-grooves. The position adjustment structure 250 may be a five-dimensional adjustment structure. By adjusting the position adjusting structure 250, the optical fiber in the optical fiber coupling block 240 is aligned with a specific grating region of the chip to be tested.
To facilitate alignment and viewing, a second light source 260 may be provided on the front side of the chip under test.
In the process of testing the optical chip by using the structure shown in fig. 2, the alignment mark of metal is arranged on the front surface of the optical chip, and the microscope penetrates through the silicon material from the back surface of the chip to see the alignment mark, so that rapid alignment can be realized. For the optical fiber coupling blocks of the input part and the output part, the alignment of the optical fiber and the grating region can be realized through the movement of two independent five-dimensional adjusting frames, and after the test of one optical chip is finished, the subsequent optical chip can be quickly replaced. And a multi-channel optical fiber coupling block with a V-shaped groove can be added according to the number of channels of the optical chip, so that multi-channel coupling is realized.
In other embodiments of the invention, the microscope may be viewed and aligned on the front side of the chip.
FIG. 3 shows a schematic diagram of a photonic chip test area according to one embodiment of the present invention.
As shown in FIG. 3, the optical chip test area may include alignment marks 310. The alignment marks 310 are easily identifiable metal marks. Grating area 320 is located within alignment mark 310. All 8 fibre channels are used. All waveguides are the same length. All waveguides have the same radius of curvature. The transmit path 330 and the receive path 340 are adjacent.
The grating coupling region is in the range of 10-60 microns and can match a single mode optical fiber with a numerical aperture NA of 1.7.
The waveguide dimensions are about 0.5um x0.5 um x 1cm, the radius of curvature is about 125um, and the fiber spacing is about 250 um.
FIG. 4 shows a schematic diagram of a photonic chip test area according to another embodiment of the present invention.
As shown in fig. 4, the optical chip test area may include an alignment mark 410. The alignment marks 410 are easily identifiable metal marks. Grating region 420 is located within alignment mark 410. All 8 fibre channels are used. The lengths of the waveguides are not all the same. The radii of curvature of the waveguides differ by a factor of three. The transmit channel 430 and the receive channel 440 may or may not be adjacent.
The grating coupling region is in the range of 10-60 microns and can match a single mode optical fiber with a numerical aperture NA of 1.7.
Waveguide dimensions of about 0.5 microns x1 microns, radii of curvature of about 125 microns and 375 microns, and fiber spacing of about 250 microns and 750 microns.
FIG. 5 shows a schematic diagram of a test system 500 for optical chips according to another embodiment of the invention. As shown in fig. 5, the optical chip testing system 500 may include a microscope 510, a chip holder 520, a chip to be tested 530, a fiber coupling block 540, and a position adjusting structure 550 of the fiber coupling block 540.
The microscope 510 may be an IR microscope. For ease of observation, a light source 511 may be provided near the objective lens of the microscope 510. The chip holder 520 is positioned below the objective lens of the microscope 510. The chip to be tested 530 is fixed on the chip holder, wherein the back surface 532 of the chip to be tested 530 faces the objective lens of the microscope 510; the die 530 under test has a front surface 531 facing down and contains alignment marks, gratings, and electrodes. Holes are punched at the positions of the electrodes of the chip 530 to be tested, and the electrical interconnection is realized through the TSVs, so that the electrodes 533 are formed on the back surface of the chip 530 to be tested. The chip clamp is provided with the electrical probe adjusting clamp, so that the chip live-line test can be realized. The chip holder 510 may further include a position adjusting structure to adjust the position of the chip. In one embodiment of the present invention, the chip under test 530 may also be a silicon optical chip, a germanium silicon optical chip, or an optical chip of other semiconductor materials.
The fiber coupling block 540 is located below the chip 530 to be tested. The fiber coupling block 540 is fixed to the position adjustment structure 550. The fiber coupling block 540 may be a multi-channel fiber coupling block with V-grooves. The position adjustment structure 550 may be a five-dimensional adjustment structure. The optical fiber in the optical fiber coupling block 540 is aligned with a specific grating region of the chip to be tested by adjusting the position adjusting structure 550.
To facilitate alignment and viewing, a second light source 560 may be provided on the front side of the chip under test.
While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various combinations, modifications, and changes can be made thereto without departing from the spirit and scope of the invention. Thus, the breadth and scope of the present invention disclosed herein should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.
Claims (9)
1. A test system for an optical chip, comprising:
a microscope having an objective lens;
a chip gripper located below the objective lens;
the optical fiber coupling block is positioned below the chip clamp;
a position adjusting structure, wherein the optical fiber coupling block is fixed on the position adjusting structure, the position and the angle of the optical fiber coupling block are adjusted by adjusting the position adjusting structure,
wherein the chip to be tested is fixed on the chip clamp, and the back surface of the chip to be tested faces the objective lens of the microscope; the front surface of the chip to be tested faces downwards and comprises an alignment mark and a grating area.
2. The test system for optical chips as defined in claim 1, further comprising a first light source on a back side of the chip under test and a second light source on the back side of the chip under test.
3. The test system for optical chips as defined in claim 1, wherein said chip holder includes an adjusting unit for adjusting the position of the chip to be tested.
4. The test system for optical chips as defined in claim 1, wherein the backside of the chip under test has a backside electrode, and the backside electrode is electrically connected to the front side electrode through the TSV conductive via.
5. The test system for optical chips of claim 4 wherein said chip holder includes electrical probe adjustment clips electrically connected to said back side electrodes.
6. The test system for optical chips as defined in claim 1 wherein said grating region is in the range of 10 to 60 microns.
7. The test system for optical chips as defined in claim 1 wherein said position adjustment structure is a five-dimensional position adjustment structure.
8. The test system for optical chips as defined in claim 1, wherein said fiber coupling block is a V-groove multi-channel fiber coupling block.
9. A method of testing an optical chip using the test system of any one of claims 1 to 8, comprising:
installing a chip to be tested on a chip clamp, wherein the back surface of the chip to be tested faces an objective lens of a microscope, the front surface of the chip to be tested faces an optical fiber coupling block, and the front surface comprises an alignment mark and a grating region;
penetrating the chip from the back of the chip through a microscope to see the alignment mark;
the position and the angle of the optical fiber coupling block are adjusted through the position adjusting structure, and the alignment of the optical fiber and the grating area is realized.
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| CN201811597651.8A CN109683082B (en) | 2018-12-26 | 2018-12-26 | Test system and test method for optical chip |
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| CN201811597651.8A CN109683082B (en) | 2018-12-26 | 2018-12-26 | Test system and test method for optical chip |
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