CN109669804B - Method and apparatus for reducing the actual soft error rate of a storage area of an ECC memory - Google Patents
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Abstract
Description
技术领域technical field
本发明涉及电子器件可靠性领域,更具体地涉及用于降低ECC存储器的存储区实际软错误率的方法和装置。The present invention relates to the field of electronic device reliability, and more particularly to a method and apparatus for reducing the actual soft error rate of a storage area of an ECC memory.
背景技术Background technique
存储器在使用的过程中会发生软错误,产生软错误的原因包括辐射粒子(α粒子、中子、质子、重离子等)、随机噪声、信号完整性问题、制造或设计缺陷、临界单元等。发生软错误时,会导致存储器的储存数据发生变化,影响输出数据的正确性,进而对系统工作造成影响。Soft errors may occur during memory use. The causes of soft errors include radiation particles (alpha particles, neutrons, protons, heavy ions, etc.), random noise, signal integrity problems, manufacturing or design defects, and critical cells. When a soft error occurs, the stored data in the memory will change, which will affect the correctness of the output data, thereby affecting the system operation.
ECC(error correcting code)即纠错码,是指在原来的存储器数据位的基础上增加一些校验位,用于检测和纠正软错误。最常用的ECC代码之一是汉明码,可实现纠正一位错误、检测两位错误即“纠一检二”的功能。ECC电路经常和交错结构、刷新配合使用,用于消除存储器中的软错误。ECC (error correcting code) is an error correcting code, which refers to adding some check bits to the original memory data bits to detect and correct soft errors. One of the most commonly used ECC codes is the Hamming code, which can correct one-bit errors and detect two-bit errors, that is, "correct one and detect two". ECC circuits are often used in conjunction with interleaving and refresh to eliminate soft errors in memory.
随着存储器集成度的不断提高,存储单元之间的间距不断减小,存储单元的临界电荷持续降低,更容易发生软错误,这两个因素共同导致ECC存储器失效的概率增大。目前,已有一些对于ECC存储器的失效概率与存储位发生软错误的概率及存储架构之间的关系的研究,但是缺少有效针对ECC存储器的存储区抗软错误优化设计方法,导致使用先进工艺的存储器面临更大的ECC失效风险。With the continuous improvement of memory integration, the spacing between memory cells continues to decrease, the critical charge of memory cells continues to decrease, and soft errors are more likely to occur. These two factors together lead to an increase in the probability of ECC memory failure. At present, there have been some studies on the relationship between the failure probability of ECC memory, the probability of soft errors in storage bits, and the storage architecture. Memory faces a greater risk of ECC failures.
发明内容SUMMARY OF THE INVENTION
基于此,有必要针对目前缺少有效针对ECC存储器的存储区抗软错误优化设计方法的问题,提供一种用于降低ECC存储器的存储区实际软错误率的方法和装置。Based on this, it is necessary to provide a method and apparatus for reducing the actual soft error rate of the storage area of the ECC memory in order to solve the problem of the lack of an effective design method for the soft error resistance of the storage area of the ECC memory.
根据本发明的一个方面,提供了一种用于降低ECC存储器的存储区实际软错误率的方法,该方法包括:获取ECC存储器的存储区实际软错误率的函数关系;根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,其中,k为大于等于1的整数;根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数;根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率。According to one aspect of the present invention, there is provided a method for reducing the actual soft error rate of a storage area of an ECC memory, the method comprising: obtaining a functional relationship of the actual soft error rate of the storage area of an ECC memory; The dismantling level k of the dismantling of the storage architecture of the memory, where k is an integer greater than or equal to 1; according to the dismantling level k, determine the number of words in the storage area after the k-level dismantling of the storage architecture of the ECC memory and the number of words in a single word The actual soft error rate of the storage area after the k-level dismantling of the ECC memory is determined according to the functional relationship, the number of words in the disassembled storage area and the number of digits in a single word.
在其中一个实施例中,获取ECC存储器的存储区实际软错误率的函数关系,包括:获取通过数学推导得到的ECC存储器的存储区实际软错误率与存储区的字数以及单个字内的位数之间的函数关系。In one embodiment, obtaining the functional relationship of the actual soft error rate of the storage area of the ECC memory includes: obtaining the actual soft error rate of the storage area of the ECC memory obtained by mathematical derivation, the number of words in the storage area, and the number of bits in a single word functional relationship between.
在其中一个实施例中,根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,包括:根据函数关系、预设的目标软错误率以及系统参数确定对ECC存储器的存储架构进行拆解的拆解级别k,系统参数包括应用ECC存储器的系统的带宽、工作频率和功耗。In one embodiment, determining the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship includes: determining the storage architecture of the ECC memory according to the functional relationship, a preset target soft error rate, and system parameters. The dismantling level k of the dismantling, the system parameters include the bandwidth, operating frequency and power consumption of the system applying the ECC memory.
在其中一个实施例中,ECC为具有纠一检二功能的汉明码,获得的ECC存储器的存储区实际软错误率的函数关系为:In one of the embodiments, the ECC is a Hamming code with the function of correcting one and detecting two, and the obtained functional relationship of the actual soft error rate of the storage area of the ECC memory is:
或 or
其中,Rsystem为ECC存储器在开启ECC功能时的存储区实际软错误率,Tscrub是ECC存储器的刷新周期,Nw是ECC存储器的存储区的字数,Nb指单个字内的位数,Rraw为ECC存储器在关闭ECC功能时的存储区原始软错误率。Among them, R system is the actual soft error rate of the storage area of the ECC memory when the ECC function is turned on, T scrub is the refresh cycle of the ECC memory, N w is the number of words in the storage area of the ECC memory, N b is the number of bits in a single word, R raw is the raw soft error rate of the storage area of the ECC memory when the ECC function is disabled.
在其中一个实施例中,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数,包括分别根据以下公式确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数:In one embodiment, determining the number of words and the number of bits in a single word of the storage area after performing k-level disassembly of the storage architecture of the ECC memory according to the disassembly level k includes determining the storage architecture of the ECC memory according to the following formulas respectively. The number of words in the storage area after the k-level disassembly and the number of bits in a single word:
Nw,k=Nw,0·2k,N w,k =N w, 0 ·2 k ,
Nb,k=Nd,k+Nc,k,N b,k =N d,k +N c,k ,
其中,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k和进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Among them, Nw,k is the number of words in the storage area of the ECC memory after k-level disassembly, Nw,0 is the original number of words in the storage area of the ECC memory that has not been disassembled, and Nb ,k is the k-level disassembly The number of bits in a single word in the decomposed storage area, N d,k is the data bit after k-level disassembly, N c,k is the check bit after k-level disassembly, and k-level disassembly is performed. The latter data bits N d,k and the check bits N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
在其中一个实施例中,根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率,包括:将进行k级拆解后的存储区实际软错误率确定为:In one of the embodiments, the actual soft error rate of the storage area after the k-level disassembly of the ECC memory is determined according to the functional relationship and the obtained number of words in the disassembled storage area and the number of bits in a single word, including: The actual soft error rate of the storage area after the k-level dismantling is determined as:
或 or
其中,Rsystem,k为进行k级拆解后的存储区实际软错误率,Tscrub是ECC存储器的刷新周期,Rraw为ECC存储器在关闭ECC功能时的存储区原始软错误率,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,k=Nw,0·2k,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nb,k=Nd,k+Nc,k,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k和进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Among them, R system,k is the actual soft error rate of the storage area after k-level dismantling, T scrub is the refresh cycle of the ECC memory, R raw is the original soft error rate of the storage area of the ECC memory when the ECC function is turned off, N w , k is the number of words in the storage area of the ECC memory after k-level dismantling, N w,k =N w,0 · 2k , N w,0 is the original number of words in the storage area of the ECC memory without dismantling, N b,k is the number of bits in a single word in the storage area after k-level dismantling, N b,k =N d,k +N c,k , N d,k is the k-level dismantling Data bits, N c,k are the check bits after k-level dismantling, and the data bits N d,k after k-level dismantling and the check bits N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
在其中一个实施例中,进行k级拆解后的校验位Nc,k被设为满足的最小整数。In one of the embodiments, the parity bits N c,k after k-level dismantling are set to satisfy the smallest integer.
在其中一个实施例中,确定的拆解级别k为1或2。In one of the embodiments, the determined dismantling level k is 1 or 2.
根据本发明的另一个方面,提供了一种用于降低ECC存储器的存储区实际软错误率的装置,该装置包括:函数关系获取模块,用于获取ECC存储器的存储区实际软错误率的函数关系;拆解级别确定模块,用于根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,其中,k为大于等于1的整数;拆解后参数确定模块,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数;软错误率确定模块,用于根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率。According to another aspect of the present invention, there is provided an apparatus for reducing the actual soft error rate of a storage area of an ECC memory, the apparatus comprising: a function relationship obtaining module for obtaining a function of the actual soft error rate of the storage area of the ECC memory relationship; the disassembly level determination module is used to determine the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship, where k is an integer greater than or equal to 1; the parameter determination module after disassembly is based on the disassembly level k determines the number of words and the number of bits in a single word of the storage area after the k-level disassembly of the storage architecture of the ECC memory; the soft error rate determination module is used to obtain the number of words and the sum of the disassembled storage area according to the functional relationship The number of bits in a single word determines the actual soft error rate of the storage area of the ECC memory after k-level disassembly.
根据本发明的又一个方面,提供了一种计算机可读存储介质,其上存储有计算机程序,该程序被处理器执行时实现上述任意实施例中所述的方法的步骤。According to yet another aspect of the present invention, there is provided a computer-readable storage medium on which a computer program is stored, and when the program is executed by a processor, implements the steps of the method described in any of the foregoing embodiments.
上述用于降低ECC存储器的存储区实际软错误率的方法、装置和计算机可读存储介质,首先获取ECC存储器的存储区实际软错误率的函数关系,根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数并确定拆解后的存储区实际软错误率,由于将存储区的单个字拆解为多个字,因而降低了ECC存储器的软错误率,有效提高了ECC存储器的存储区抗软错误能力,且增强了ECC存储器的可靠性。The above-mentioned method, device and computer-readable storage medium for reducing the actual soft error rate of the storage area of the ECC memory, first obtain the functional relationship of the actual soft error rate of the storage area of the ECC memory, and determine the storage architecture of the ECC memory according to the functional relationship. The dismantling level k of dismantling, according to the dismantling level k, determine the number of words in the storage area after the k-level dismantling of the storage architecture of the ECC memory and the number of bits in a single word, and determine the actual soft error rate of the dismantled storage area. , since a single word in the storage area is disassembled into multiple words, the soft error rate of the ECC memory is reduced, the soft error resistance capability of the storage area of the ECC memory is effectively improved, and the reliability of the ECC memory is enhanced.
附图说明Description of drawings
将参考附图通过示例方式来描述本发明的优选而非限制的实施例,其中:Preferred, non-limiting embodiments of the present invention will be described by way of example with reference to the accompanying drawings, in which:
图1是本申请一实施例中的用于降低ECC存储器的存储区实际软错误率的方法的流程图;1 is a flowchart of a method for reducing the actual soft error rate of a storage area of an ECC memory according to an embodiment of the present application;
图2是本申请一实施例中的用于降低ECC存储器的存储区实际软错误率的装置的示意图。FIG. 2 is a schematic diagram of an apparatus for reducing the actual soft error rate of a storage area of an ECC memory according to an embodiment of the present application.
具体实施方式Detailed ways
为使本发明的上述目的、特征和优点能够更加明显易懂,下面结合附图对本发明的具体实施方式做详细的说明。在下面的描述中阐述了很多具体细节以便于充分理解本发明。但是本发明能够以很多不同于在此描述的其它方式来实施,本领域技术人员可以在不违背本发明内涵的情况下做类似改进,因此本发明不受下面公开的具体实施的限制。In order to make the above objects, features and advantages of the present invention more clearly understood, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific implementation disclosed below.
除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本发明。以上实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述,然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. The technical features of the above embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features It is considered to be the range described in this specification.
本申请提供了一种用于降低ECC存储器的存储区实际软错误率的方法,如图1所示,该方法包括以下步骤:The present application provides a method for reducing the actual soft error rate of a storage area of an ECC memory, as shown in FIG. 1 , the method includes the following steps:
步骤S100,获取ECC存储器的存储区实际软错误率的函数关系。Step S100, acquiring the functional relationship of the actual soft error rate of the storage area of the ECC memory.
具体地,ECC存储器是指具有ECC功能的存储器。ECC存储器的存储区实际软错误率为ECC存储器在开启ECC功能时的存储区软错误率。为了降低ECC存储器的存储区实际软错误率,需要首先获取其函数关系,以得知软错误率与各种因素的关联关系。Specifically, the ECC memory refers to a memory having an ECC function. The actual soft error rate of the storage area of the ECC memory is the soft error rate of the storage area of the ECC memory when the ECC function is enabled. In order to reduce the actual soft error rate of the storage area of the ECC memory, it is necessary to obtain its functional relationship first, so as to know the correlation between the soft error rate and various factors.
步骤S200,根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k。Step S200, determining a disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship.
具体地,k为大于等于1的整数。拆解是在硬件上实现的。具体地,在进行ECC存储器的电路设计时,在存储区的字数Nw与单个字内的数据位Nd的乘积(即有效存储容量)不变的前提下,将存储器的字中的数据位Nd成倍降低,例如,将原本的64位存储器在硬件电路设计上变为32位存储器。Specifically, k is an integer greater than or equal to 1. Teardown is implemented in hardware. Specifically, when designing the circuit of the ECC memory, on the premise that the product of the number of words N w in the storage area and the data bits N d in a single word (ie, the effective storage capacity) remains unchanged, the data bits in the word of the memory are N d is doubled, for example, the original 64-bit memory is changed into a 32-bit memory in hardware circuit design.
步骤S300,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数。Step S300, according to the disassembly level k, determine the number of words in the storage area and the number of bits in a single word after performing k-level disassembly on the storage architecture of the ECC memory.
具体地,在对ECC存储器的存储架构进行k级拆解后,ECC存储器的存储区的字数和单个字内的位数均会发生变化,为了确定拆解后的软错误率,需要根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数。Specifically, after the k-level disassembly of the storage architecture of the ECC memory, the number of words in the storage area of the ECC memory and the number of bits in a single word will change. In order to determine the soft error rate after disassembly, it is necessary to Level k determines the number of words and the number of bits in a single word of the memory area after the level-k disassembly of the storage architecture of the ECC memory.
步骤S400,根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率。Step S400: Determine the actual soft error rate of the storage area after the k-level disassembly of the ECC memory according to the functional relationship and the obtained number of words in the disassembled storage area and the number of bits in a single word.
具体地,确定要拆解的拆解级别k之后,需要根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率。Specifically, after determining the dismantling level k to be disassembled, it is necessary to determine the actual storage area of the ECC memory after the k-level dismantling according to the functional relationship and the obtained number of words in the disassembled storage area and the number of bits in a single word. soft error rate.
上述用于降低ECC存储器的存储区实际软错误率的方法,首先获取ECC存储器的存储区实际软错误率的函数关系,根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数并确定拆解后的存储区实际软错误率,由于将存储区的单个字拆解为多个字,因而降低了ECC存储器的软错误率,有效提高了ECC存储器的存储区抗软错误能力,且增强了ECC存储器的可靠性。The above-mentioned method for reducing the actual soft error rate of the storage area of the ECC memory, first obtains the functional relationship of the actual soft error rate of the storage area of the ECC memory, and determines the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship, According to the disassembly level k, the number of words in the storage area after the k-level disassembly of the storage architecture of the ECC memory and the number of bits in a single word are determined, and the actual soft error rate of the disassembled storage area is determined. It is disassembled into multiple words, thereby reducing the soft error rate of the ECC memory, effectively improving the soft error resistance capability of the storage area of the ECC memory, and enhancing the reliability of the ECC memory.
在一个实施例中,获取ECC存储器的存储区实际软错误率的函数关系,包括:获取通过数学推导得到的ECC存储器的存储区实际软错误率与存储区的字数以及单个字内的位数之间的函数关系。In one embodiment, obtaining the functional relationship of the actual soft error rate of the storage area of the ECC memory includes: obtaining the difference between the actual soft error rate of the storage area of the ECC memory obtained by mathematical derivation and the number of words in the storage area and the number of bits in a single word functional relationship between.
具体地,可以通过数学推导的方式确定ECC存储器的存储区实际软错误率与存储区的字数Nw以及单个字内的数据位Nd之间的函数关系。在其他实施例中,可以获取通过实验的方式得到的ECC存储器的存储区实际软错误率与存储区的字数Nw以及单个字内的数据位Nd之间的函数关系。Specifically, the functional relationship between the actual soft error rate of the storage area of the ECC memory and the number of words N w of the storage area and the data bits N d in a single word can be determined by mathematical derivation. In other embodiments, the functional relationship between the actual soft error rate of the storage area of the ECC memory and the number of words N w of the storage area and the data bits N d in a single word obtained through experiments can be obtained.
在一个实施例中,根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,包括:根据函数关系、预设的目标软错误率以及系统参数确定对ECC存储器的存储架构进行拆解的拆解级别k。In one embodiment, determining the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship includes: determining the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship, a preset target soft error rate, and system parameters. The disassembly level k of the solution.
具体地,系统参数包括应用ECC存储器的系统的带宽、工作频率和功耗。一方面,将ECC存储器的存储区中的字拆解为多个字,对每个字各自进行ECC保护,可有效减小ECC存储器的存储区软错误率;另一方面,拆解级别增加会增大ECC编码和译码电路的复杂度,且随着拆解程度的加深,软错误率的减小效果逐渐减弱。因此在确定拆解级别k时,不仅要考虑预设的目标软错误率,还要考虑系统参数对拆解级别的限制,需要根据函数关系、预设的目标软错误率以及系统参数确定对ECC存储器的存储架构进行拆解的拆解级别k。Specifically, the system parameters include the bandwidth, operating frequency and power consumption of the system applying the ECC memory. On the one hand, the words in the storage area of the ECC memory are disassembled into multiple words, and each word is protected by ECC, which can effectively reduce the soft error rate of the storage area of the ECC memory; The complexity of the ECC encoding and decoding circuits is increased, and with the deepening of the degree of disassembly, the effect of reducing the soft error rate is gradually weakened. Therefore, when determining the dismantling level k, not only the preset target soft error rate, but also the restrictions on the dismantling level by system parameters must be considered. The disassembly level k at which the storage architecture of the memory is disassembled.
在一个实施例中,ECC为具有纠一检二功能的汉明码,获得的ECC存储器的存储区实际软错误率的函数关系为:In one embodiment, the ECC is a Hamming code with the function of correcting one and detecting two, and the obtained functional relationship of the actual soft error rate of the storage area of the ECC memory is:
或 or
其中,Rsystem为ECC存储器在开启ECC功能时的存储区实际软错误率,Tscrub是ECC存储器的刷新周期,Nw是ECC存储器的存储区的字数,Nb指单个字内的位数,Rraw为ECC存储器在关闭ECC功能时的存储区原始软错误率。Among them, R system is the actual soft error rate of the storage area of the ECC memory when the ECC function is turned on, T scrub is the refresh cycle of the ECC memory, N w is the number of words in the storage area of the ECC memory, N b is the number of bits in a single word, R raw is the raw soft error rate of the storage area of the ECC memory when the ECC function is disabled.
具体地,ECC为具有纠一检二功能的简单汉明码。由上面的公式可知,存储区实际软错误率Rsystem与存储区内的字数Nw以及单个字中的位数Nb的平方正相关,或者与存储区内的字数Nw以及单个字中的位数Nb·(Nb-1)正相关。在其他实施例中,ECC为其他类型的纠错码,优化原理与简单汉明码的实施例的原理相同,而且简单汉明码占实际应用的90%以上,因而不再赘述。Specifically, the ECC is a simple Hamming code with the function of correcting one and detecting two. It can be seen from the above formula that the actual soft error rate R system in the storage area is positively correlated with the number of words N w in the storage area and the square of the number of bits in a single word N b , or with the number of words in the storage area N w and the number of words in a single word. The number of bits N b ·(N b -1) is positively correlated. In other embodiments, the ECC is other types of error correction codes, and the optimization principle is the same as that of the simple Hamming code embodiment, and the simple Hamming code accounts for more than 90% of practical applications, so it is not repeated here.
在一个实施例中,ECC为具有纠一检二功能的简单汉明码。根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数,包括分别根据以下公式确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数:In one embodiment, the ECC is a simple Hamming code with the function of correcting one and detecting two. The number of words and the number of bits in a single word of the storage area after the k-level dismantling of the storage architecture of the ECC memory is determined according to the dismantling level k, including determining the number of words after the k-level dismantling of the storage architecture of the ECC memory according to the following formulas. The number of words in the memory area and the number of bits in a single word:
Nw,k=Nw,0·2k,N w,k =N w, 0 ·2 k ,
Nb,k=Nd,k+Nc,k,N b,k =N d,k +N c,k ,
其中,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k和进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Among them, Nw,k is the number of words in the storage area of the ECC memory after k-level disassembly, Nw,0 is the original number of words in the storage area of the ECC memory that has not been disassembled, and Nb ,k is the k-level disassembly The number of bits in a single word in the decomposed storage area, N d,k is the data bit after k-level disassembly, N c,k is the check bit after k-level disassembly, and k-level disassembly is performed. The latter data bits N d,k and the check bits N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
在一个实施例中,确定ECC存储器在进行k级拆解后的存储区实际软错误率,包括:将进行k级拆解后的存储区实际软错误率确定为:In one embodiment, determining the actual soft error rate of the storage area after the k-level disassembly of the ECC memory includes: determining the actual soft error rate of the storage area after the k-level disassembly is performed as:
或 or
其中,Rsystem,k为进行k级拆解后的存储区实际软错误率,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,k=Nw,0·2k,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nb,k=Nd,k+Nc,k,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k与进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Wherein, R system,k is the actual soft error rate of the storage area after k-level dismantling, N w,k is the number of words in the storage area of the ECC memory after k-level dismantling, N w,k =N w,0 2 k , N w,0 is the original number of words in the storage area of the undisassembled ECC memory, N b,k is the number of bits in a single word in the storage area after k-level disassembly, N b,k =N d,k +N c,k , N d,k is the data bit after k-level dismantling, N c,k is the check bit after k-level dismantling, and the data after k-level dismantling Bit N d,k and check bit N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
具体地,在上述实施例中,可以看出拆解是针对单个字中的数据位进行拆解,单个字中总的位数等于数据位和校验位之和。进行拆解后的存储区的字数与进行拆解后的数据位的乘积等于存储区的原始字数与原始数据位的乘积,因而有效的存储空间不变。Specifically, in the above embodiment, it can be seen that the disassembly is performed on the data bits in a single word, and the total number of bits in a single word is equal to the sum of the data bits and the check bits. The product of the number of words in the disassembled storage area and the data bits after disassembly is equal to the product of the original number of words in the storage area and the original data bits, so the effective storage space remains unchanged.
在一个实施例中,进行k级拆解后的校验位Nc,k被设为满足的最小整数。In one embodiment, the parity bits N c,k after k-level dismantling are set to satisfy the smallest integer.
具体地,为了节约单个字内的总位数,将校验位Nc,k设为满足的最小整数。例如,当数据位为64位时,校验位为8位;当数据位为32位时,校验位为7位;当数据位为16位时,校验位为6位;当数据位为8位时,校验位为5位;当数据位为4位时,校验位为4位。Specifically, in order to save the total number of digits in a single word, the check digit N c,k is set to satisfy the the smallest integer. For example, when the data bits are 64 bits, the check digit is 8 bits; when the data bits are 32 bits, the check digit is 7 bits; when the data bits are 16 bits, the check digit is 6 bits; when the data bits are 6 bits When it is 8 bits, the check digit is 5 bits; when the data bits are 4 bits, the check digit is 4 bits.
下面以最常见的ECC存储器的存储架构(72,64)为例来比较进行拆解后的软错误率与拆解前的软错误率。对于存储架构(72,64),其中,Nb=72,Nd=64,Nc=8。未拆解时的软错误率以及进行一级、二级、三级和四级拆解后的软错误率如下表所示:The following takes the storage architecture (72, 64) of the most common ECC memory as an example to compare the soft error rate after disassembly and the soft error rate before disassembly. For storage architecture (72, 64), where N b =72, N d =64, and N c =8. The soft error rate without dismantling and the soft error rate after dismantling at the first, second, third and fourth levels are shown in the following table:
由上表可知,拆解的次数越多,软错误率降低得越多,同时随着拆解级别的增大,错误率降低得越缓慢。另外,在确定拆解级别的时候还需要考虑预设的目标软错误率以及ECC存储器所应用的系统的参数,包括带宽、工作频率和功耗等。It can be seen from the above table that the more dismantling times, the more the soft error rate decreases. At the same time, as the dismantling level increases, the error rate decreases more slowly. In addition, the preset target soft error rate and the parameters of the system to which the ECC memory is applied, including bandwidth, operating frequency, and power consumption, need to be considered when determining the disassembly level.
在一个实施例中,确定的拆解级别k通常为1或2。具体地,一般情况下,综合考虑预设的目标软错误率以及系统的带宽、工作频率和功耗等,一般拆解一级或两级,即k被确定为1或2。这样,在适当拆解的情况下,能够实现软错误率的期望降低并且不会大幅增大ECC编码和译码电路的复杂度。In one embodiment, the determined disassembly level k is typically 1 or 2. Specifically, in general, considering the preset target soft error rate and the bandwidth, operating frequency and power consumption of the system, one or two levels are generally dismantled, that is, k is determined to be 1 or 2. In this way, with proper disassembly, the desired reduction in soft error rate can be achieved without greatly increasing the complexity of the ECC encoding and decoding circuits.
本申请还提供了一种用于降低ECC存储器的存储区实际软错误率的装置,如图2所示,该装置包括以下模块:The present application also provides an apparatus for reducing the actual soft error rate of a storage area of an ECC memory, as shown in FIG. 2 , the apparatus includes the following modules:
函数关系获取模块100,用于获取ECC存储器的存储区实际软错误率的函数关系;The functional
拆解级别确定模块200,用于根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,其中,k为大于等于1的整数;A disassembly
拆解后参数确定模块300,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数;The
软错误率确定模块400,用于根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率。The soft error
上述用于降低ECC存储器的存储区实际软错误率的装置,首先获取ECC存储器的存储区实际软错误率的函数关系,根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数并确定拆解后的存储区实际软错误率,由于将存储区的单个字拆解为多个字,因而降低了ECC存储器的软错误率,有效提高了ECC存储器的存储区抗软错误能力,且增强了ECC存储器的可靠性。The above-mentioned device for reducing the actual soft error rate of the storage area of the ECC memory, first obtains the functional relationship of the actual soft error rate of the storage area of the ECC memory, and determines the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship, According to the disassembly level k, the number of words in the storage area after the k-level disassembly of the storage architecture of the ECC memory and the number of bits in a single word are determined, and the actual soft error rate of the disassembled storage area is determined. It is disassembled into multiple words, thereby reducing the soft error rate of the ECC memory, effectively improving the soft error resistance capability of the storage area of the ECC memory, and enhancing the reliability of the ECC memory.
在一个实施例中,函数关系获取模块100具体用于:获取通过数学推导得到的ECC存储器的存储区实际软错误率与存储区的字数以及单个字内的位数之间的函数关系。In one embodiment, the functional
在一个实施例中,拆解级别确定模块200具体用于:根据函数关系、预设的目标软错误率以及系统参数确定对ECC存储器的存储架构进行拆解的拆解级别k,系统参数包括应用ECC存储器的系统的带宽、工作频率和功耗。In one embodiment, the disassembly
在一个实施例中,ECC为具有纠一检二功能的汉明码,获得的ECC存储器的存储区实际软错误率的函数关系为:In one embodiment, the ECC is a Hamming code with the function of correcting one and detecting two, and the obtained functional relationship of the actual soft error rate of the storage area of the ECC memory is:
或 or
其中,Rsystem为ECC存储器在开启ECC功能时的存储区实际软错误率,Tscrub是ECC存储器的刷新周期,Nw是ECC存储器的存储区的字数,Nb指单个字内的位数,Rraw为ECC存储器在关闭ECC功能时的存储区原始软错误率。Among them, R system is the actual soft error rate of the storage area of the ECC memory when the ECC function is turned on, T scrub is the refresh cycle of the ECC memory, N w is the number of words in the storage area of the ECC memory, N b is the number of bits in a single word, R raw is the raw soft error rate of the storage area of the ECC memory when the ECC function is disabled.
在一个实施例中,拆解后参数确定模块300具体用于分别根据以下公式确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数:In one embodiment, the post-disassembly
Nw,k=Nw,0·2k,N w,k =N w, 0 ·2 k ,
Nb,k=Nd,k+Nc,k,N b,k =N d,k +N c,k ,
其中,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k和进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Among them, Nw,k is the number of words in the storage area of the ECC memory after k-level disassembly, Nw,0 is the original number of words in the storage area of the ECC memory that has not been disassembled, and Nb ,k is the k-level disassembly The number of bits in a single word in the decomposed storage area, N d,k is the data bit after k-level disassembly, N c,k is the check bit after k-level disassembly, and k-level disassembly is performed. The latter data bits N d,k and the check bits N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
在一个实施例中,软错误率确定模块400具体用于根据以下公式确定进行k级拆解后的存储区实际软错误率:In one embodiment, the soft error
或 or
其中,Rsystem,k为进行k级拆解后的存储区实际软错误率,Tscrub是ECC存储器的刷新周期,Rraw为ECC存储器在关闭ECC功能时的存储区原始软错误率,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,k=Nw,0·2k,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nb,k=Nd,k+Nc,k,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k和进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Among them, R system,k is the actual soft error rate of the storage area after k-level dismantling, T scrub is the refresh cycle of the ECC memory, R raw is the original soft error rate of the storage area of the ECC memory when the ECC function is turned off, N w , k is the number of words in the storage area of the ECC memory after k-level dismantling, N w,k =N w,0 · 2k , N w,0 is the original number of words in the storage area of the ECC memory without dismantling, N b,k is the number of bits in a single word in the storage area after k-level dismantling, N b,k =N d,k +N c,k , N d,k is the k-level dismantling Data bits, N c,k are the check bits after k-level dismantling, and the data bits N d,k after k-level dismantling and the check bits N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
在一个实施例中,进行k级拆解后的校验位Nc,k被设为满足的最小整数。In one embodiment, the parity bits N c,k after k-level dismantling are set to satisfy the smallest integer.
在一个实施例中,确定的拆解级别k通常为1或2。In one embodiment, the determined disassembly level k is typically 1 or 2.
本申请还提供了一种计算机可读存储介质,其上存储有计算机程序,该程序被处理器执行时实现以下步骤:获取ECC存储器的存储区实际软错误率的函数关系;根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,其中,k为大于等于1的整数;根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数;根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率。The present application also provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the following steps are implemented: obtaining a functional relationship of the actual soft error rate of the storage area of the ECC memory; The dismantling level k at which the storage architecture of the ECC memory is dismantled, where k is an integer greater than or equal to 1; the number of words and a single word of the storage area after the k-level dismantling of the storage architecture of the ECC memory is determined according to the dismantling level k. The actual soft error rate of the storage area after the k-level disassembly of the ECC memory is determined according to the functional relationship and the obtained number of words in the disassembled storage area and the number of bits in a single word.
在一个实施例中,获取ECC存储器的存储区实际软错误率的函数关系,包括:获取通过数学推导得到的ECC存储器的存储区实际软错误率与存储区的字数以及单个字内的位数之间的函数关系。In one embodiment, obtaining the functional relationship of the actual soft error rate of the storage area of the ECC memory includes: obtaining the difference between the actual soft error rate of the storage area of the ECC memory obtained by mathematical derivation and the number of words in the storage area and the number of bits in a single word functional relationship between.
在一个实施例中,根据函数关系确定对ECC存储器的存储架构进行拆解的拆解级别k,包括:根据函数关系、预设的目标软错误率以及系统参数确定对ECC存储器的存储架构进行拆解的拆解级别k,系统参数包括应用ECC存储器的系统的带宽、工作频率和功耗。In one embodiment, determining the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship includes: determining the disassembly level k for disassembling the storage architecture of the ECC memory according to the functional relationship, a preset target soft error rate, and system parameters. The disassembly level k of the disassembly, and the system parameters include the bandwidth, operating frequency and power consumption of the system applying the ECC memory.
在一个实施例中,ECC为具有纠一检二功能的汉明码,获得的ECC存储器的存储区实际软错误率的函数关系为:In one embodiment, the ECC is a Hamming code with the function of correcting one and detecting two, and the obtained functional relationship of the actual soft error rate of the storage area of the ECC memory is:
或 or
其中,Rsystem为ECC存储器在开启ECC功能时的存储区实际软错误率,Tscrub是ECC存储器的刷新周期,Nw是ECC存储器的存储区的字数,Nb指单个字内的位数,Rraw为ECC存储器在关闭ECC功能时的存储区原始软错误率。Among them, R system is the actual soft error rate of the storage area of the ECC memory when the ECC function is turned on, T scrub is the refresh cycle of the ECC memory, N w is the number of words in the storage area of the ECC memory, N b is the number of bits in a single word, R raw is the raw soft error rate of the storage area of the ECC memory when the ECC function is disabled.
在一个实施例中,根据拆解级别k确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数,包括分别根据以下公式确定对ECC存储器的存储架构进行k级拆解后的存储区的字数和单个字内的位数:In one embodiment, determining the number of words and the number of bits in a single word of the storage area after performing k-level disassembly on the storage architecture of the ECC memory according to the disassembly level k includes determining the storage architecture of the ECC memory according to the following formulas, respectively. The number of words in the storage area after the k-level disassembly and the number of bits in a single word:
Nw,k=Nw,0·2k,N w,k =N w, 0 ·2 k ,
Nb,k=Nd,k+Nc,k,N b,k =N d,k +N c,k ,
其中,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k和进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Among them, Nw,k is the number of words in the storage area of the ECC memory after k-level disassembly, Nw,0 is the original number of words in the storage area of the ECC memory that has not been disassembled, and Nb ,k is the k-level disassembly The number of bits in a single word in the decomposed storage area, N d,k is the data bit after k-level disassembly, N c,k is the check bit after k-level disassembly, and k-level disassembly is performed. The latter data bits N d,k and the check bits N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
在一个实施例中,根据函数关系和获得的拆解后的存储区的字数和单个字内的位数确定ECC存储器在进行k级拆解后的存储区实际软错误率,包括:将进行k级拆解后的存储区实际软错误率确定为:In one embodiment, determining the actual soft error rate of the storage area after the k-level disassembly of the ECC memory is performed according to the functional relationship and the obtained number of words in the disassembled storage area and the number of bits in a single word, including: performing k The actual soft error rate of the storage area after dismantling is determined as:
或 or
其中,Rsystem,k为进行k级拆解后的存储区实际软错误率,Tscrub是ECC存储器的刷新周期,Rraw为ECC存储器在关闭ECC功能时的存储区原始软错误率,Nw,k是进行k级拆解后的ECC存储器的存储区的字数,Nw,k=Nw,0·2k,Nw,0是未进行拆解的ECC存储器的存储区的原始字数,Nb,k是进行k级拆解后的存储区中的单个字内的位数,Nb,k=Nd,k+Nc,k,Nd,k为进行k级拆解后的数据位,Nc,k为进行k级拆解后的校验位,进行k级拆解后的数据位Nd,k和进行k级拆解后的校验位Nc,k满足其中,Nd,k=Nd,0/2k,Nd,0是未进行拆解的ECC存储器的存储区的原始数据位。Among them, R system,k is the actual soft error rate of the storage area after k-level dismantling, T scrub is the refresh cycle of the ECC memory, R raw is the original soft error rate of the storage area of the ECC memory when the ECC function is turned off, N w , k is the number of words in the storage area of the ECC memory after k-level dismantling, N w,k =N w,0 · 2k , N w,0 is the original number of words in the storage area of the ECC memory without dismantling, N b,k is the number of bits in a single word in the storage area after k-level dismantling, N b,k =N d,k +N c,k , N d,k is the k-level dismantling Data bits, N c,k are the check bits after k-level dismantling, and the data bits N d,k after k-level dismantling and the check bits N c,k after k-level dismantling satisfy Wherein, N d,k =N d,0 /2 k , and N d,0 is the original data bits of the storage area of the ECC memory that is not disassembled.
在一个实施例中,进行k级拆解后的校验位Nc,k被设为满足的最小整数。In one embodiment, the parity bits N c,k after k-level dismantling are set to satisfy the smallest integer.
在一个实施例中,确定的拆解级别k通常为1或2。In one embodiment, the determined disassembly level k is typically 1 or 2.
以上实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述,然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。The technical features of the above embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features It is considered to be the range described in this specification.
以上所述实施例仅表达了本申请的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本申请构思的前提下,还可以做出若干变形和改进,这些都属于本申请的保护范围。因此,本申请专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only represent several embodiments of the present application, and the descriptions thereof are specific and detailed, but should not be construed as a limitation on the scope of the invention patent. It should be pointed out that for those skilled in the art, without departing from the concept of the present application, several modifications and improvements can be made, which all belong to the protection scope of the present application. Therefore, the scope of protection of the patent of the present application shall be subject to the appended claims.
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