CN109657328B - TLM microstructure for GPU hardware line rasterization boundary algorithm - Google Patents
TLM microstructure for GPU hardware line rasterization boundary algorithm Download PDFInfo
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Abstract
The invention relates to the technical field of computer hardware modeling, and provides a TLM microstructure facing GPU hardware line rasterization boundary algorithm, wherein a straight line starting point and end point selection module (1) sends a selected starting point and end point to a straight line equation calculation module (2) and a straight line height difference calculation module (3); the linear equation calculation module (2) performs linear equation calculation and sends the linear equation to the boundary comparison processing module (4); the straight line height difference calculating module (3) calculates the maximum height difference of the straight line and sends the height difference of the straight line to the boundary comparison processing module (4); and the boundary comparison processing module (4) receives the linear equation and the linear height difference to perform boundary comparison processing, when the local height difference is greater than the linear maximum height difference, the height of the fragment is assigned as the terminal height, otherwise, the height is maintained. And scanning the complete straight line, and calculating the coordinate of each fragment on the straight line.
Description
Technical Field
The invention relates to the technical field of computer hardware modeling, in particular to a TLM microstructure facing GPU hardware line rasterization boundary algorithm.
Background
In the design and development of a graphics processing unit chip (GPU for short), the processing of local features of an algorithm, especially special cases, is easily ignored by an RTL designer, and the verification debug cost of an RTL code is usually large. Therefore, before RTL design, the algorithm is verified as early as possible, and the processing of special conditions is comprehensive and accurate, so that the algorithm is realized and verified by utilizing the algorithm hardware TLM microstructure, and a reference basis can be provided for RTL design.
Disclosure of Invention
Based on the problems in the background art, the TLM microstructure facing the GPU hardware line rasterization boundary algorithm can solve the error accumulation problem of rtl simulation GPU line rasterization boundary algorithm, optimizes the boundary algorithm, and can perform functional verification on the hardware microstructure of the line rasterization boundary algorithm on the TLM model in advance.
The technical solution of the invention is as follows:
a TLM microstructure facing a GPU hardware line rasterization boundary algorithm comprises a linear starting point and end point selection module 1, a linear equation calculation module 2, a linear height difference calculation module 3 and a boundary comparison processing module 4;
the straight line starting point and end point selection module 1 is used for selecting a starting point and an end point of a straight line according to coordinates of two end points of the input straight line, also specifies a scanning direction of the straight line from a low point to a high point, and sends the selected starting point and end point to the straight line equation calculation module 2 and the straight line height difference calculation module 3.
The linear equation calculation module 2 receives the starting point and the end point sent by the linear starting point and end point selection module 1, performs linear equation calculation, and sends the linear equation to the boundary comparison processing module 4;
the straight line height difference calculating module 3 receives the starting point and the end point sent by the straight line starting point and end point selecting module 1, calculates the maximum height difference of the straight line, and sends the height difference of the straight line to the boundary comparing and processing module 4;
and the boundary comparison processing module 4 receives the linear equation sent by the linear equation calculation module 2 and the linear height difference sent by the linear height difference calculation module 3 to perform boundary comparison processing, and when the local height difference is greater than the maximum height difference of the linear, the height of the fragment is assigned as the terminal height, otherwise, the height is maintained. And scanning the complete straight line, and calculating the coordinate of each fragment on the straight line.
The boundary comparison processing module 4 comprises a fragment height difference submodule 41 and a boundary modification submodule 42;
the chip height difference submodule 41 receives the straight line starting point sent by the straight line starting point and end point selection module 1 and the straight line equation sent by the straight line equation calculation module 2 to calculate the height difference of each chip.
The boundary correction submodule 42 receives the linear end point sent by the linear start point and end point selection module 1, the linear height difference sent by the linear height difference calculation module 3 and each piece height difference sent by the piece height difference submodule 41, performs boundary correction, and calculates each piece coordinate.
The equation of a straight line: y = kx + b, where k is the slope and b is the intercept.
The straight line height difference calculating module 3 calculates the maximum height difference of the straight line according to the selected end point and the selected start point, and the height difference is the height difference of the straight line.
The invention has the beneficial effects that:
the invention realizes the function optimization, the realization structure and the function verification of the GPU line rasterization boundary algorithm based on the TLM model, solves the problem of inaccurate rasterization of straight lines caused by error accumulation, particularly the condition that the intersection points of the two straight lines are not consistent most probably, and effectively helps RTL design development.
Drawings
Fig. 1 is a block diagram of a hardware TLM microstructure of a line-grating boundary algorithm according to the present invention;
Detailed Description
The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings and the specific embodiments. It is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than the whole embodiments, and that all other embodiments, which can be derived by a person skilled in the art without inventive step based on the embodiments of the present invention, belong to the scope of protection of the present invention.
The invention aims to provide a TLM microstructure facing GPU hardware line rasterization boundary algorithm.
The technical solution of the invention is as follows:
a TLM microstructure facing a GPU hardware line rasterization boundary algorithm comprises a linear starting point and end point selection module 1, a linear equation calculation module 2, a linear height difference calculation module 3 and a boundary comparison processing module 4;
the straight line starting point and end point selection module 1 is used for selecting a starting point and an end point of a straight line according to coordinates of two end points of the input straight line, also specifies a scanning direction of the straight line from a low point to a high point, and sends the selected starting point and end point to the straight line equation calculation module 2 and the straight line height difference calculation module 3.
The linear equation calculation module 2 receives the starting point and the end point sent by the linear starting point and end point selection module 1, performs linear equation calculation, and sends the linear equation to the boundary comparison processing module 4;
the straight line height difference calculating module 3 receives the starting point and the end point sent by the straight line starting point and end point selecting module 1, calculates the maximum height difference of the straight line, and sends the height difference of the straight line to the boundary comparison processing module 4;
and the boundary comparison processing module 4 receives the linear equation sent by the linear equation calculation module 2 and the linear height difference sent by the linear height difference calculation module 3 to perform boundary comparison processing, and when the local height difference is greater than the maximum height difference of the linear, the height of the fragment is assigned as the terminal height, otherwise, the height is maintained. And scanning the complete straight line, and calculating the coordinate of each fragment on the straight line.
The boundary comparison processing module 4 comprises a fragment height difference submodule 41 and a boundary modification submodule 42;
the chip height difference submodule 41 receives the straight line starting point sent by the straight line starting point and end point selection module 1 and the straight line equation sent by the straight line equation calculation module 2 to calculate the height difference of each chip.
The boundary correction submodule 42 receives the linear end point sent by the linear start point and end point selection module 1, the linear height difference sent by the linear height difference calculation module 3 and each piece height difference sent by the piece height difference submodule 41, performs boundary correction, and calculates each piece coordinate.
The working process is as follows:
1) Selection of the starting point and the end point of the straight line:
the start and end points of the straight line are selected, and the scanning direction of the straight line is also defined, and scanning from a low point to a high point is generally selected.
2) And (3) calculating a linear equation:
from the selected end point and start point, a straight line equation can be calculated: y = kx + b, where k is the slope and b is the intercept.
3) Calculating the height difference of the straight lines:
and calculating the height difference of the starting point and the end point of the straight line, wherein the height difference is also the maximum height difference of the whole straight line.
4) And (3) boundary comparison processing:
4.1 Calculate the height of each fragment:
calculating the height of each fragment according to a linear equation when scanning a straight line;
4.2 Calculate the height difference of each fragment from the starting point:
reserving the height of the straight line starting point, and calculating the height difference between the current fragment and the starting point according to the height value obtained in the previous step;
4.2 Boundary comparison and processing:
and comparing the height difference calculated in the previous step with the integral height difference of the straight line: when the height difference is larger than the straight line height difference, the height of the chip is assigned as the terminal height, otherwise, the height is maintained.
Example (b):
the invention is described in further detail below with reference to the accompanying drawings, which refer to fig. 1.
A TLM microstructure facing GPU hardware line rasterization boundary algorithm comprises the following steps:
1) Selection of the starting point and the end point of the straight line:
the coordinates of two end points of the input straight line are used for selecting the starting point and the end point of the straight line, and the scanning direction of the straight line from a low point to a high point is also defined.
2) And (3) calculating a linear equation:
from the selected end point and start point, a straight line equation can be calculated: y = kx + b, where k is the slope and b is the intercept.
3) Calculating the height difference of the straight lines:
and calculating the maximum height difference of the straight line according to the selected end point and the selected starting point, wherein the height difference is the height difference of the straight line.
4) And (3) boundary comparison processing:
4.1 Chip height difference:
the height of each fragment is calculated according to the equation of a straight line, and the height difference of each fragment is calculated according to the starting point of the selected straight line.
4.2 Boundary correction:
and performing boundary correction according to the height difference of each fragment and the height difference of the straight line, wherein when the height difference of the fragment is greater than the height difference of the straight line, the height of the fragment is the terminal point height of the selected straight line, and otherwise, the height of the fragment is kept. And scanning a complete straight line, and calculating the coordinate of each chip element on the straight line.
Claims (3)
1. A TLM microstructure facing GPU hardware line rasterization boundary algorithm is characterized in that: the device comprises a straight line starting point and end point selection module (1), a straight line equation calculation module (2), a straight line height difference calculation module (3) and a boundary comparison processing module (4);
the straight line starting point and end point selection module (1) is used for selecting a starting point and an end point of a straight line according to coordinates of two end points of the input straight line, also specifies the scanning direction of the straight line from a low point to a high point, and sends the selected starting point and end point to the straight line equation calculation module (2) and the straight line height difference calculation module (3);
the linear equation calculation module (2) receives the starting point and the end point sent by the linear starting point and end point selection module (1), calculates a linear equation and sends the linear equation to the boundary comparison processing module (4);
the straight line height difference calculating module (3) receives the starting point and the end point sent by the straight line starting point and end point selecting module (1), calculates the maximum height difference of the straight line and sends the height difference of the straight line to the boundary comparison processing module (4); the straight line height difference calculating module (3) calculates the maximum height difference of the straight line according to the selected end point and the selected starting point, and the height difference is the height difference of the straight line;
the boundary comparison processing module (4) receives the linear equation sent by the linear equation calculating module (2) and the linear height difference sent by the linear height difference calculating module (3) to perform boundary comparison processing; scanning a complete straight line, and calculating the coordinate of each fragment on the straight line;
the process of the boundary comparison processing is as follows:
calculating the height of each fragment according to a linear equation when scanning a straight line; reserving the height of the straight line starting point, and calculating the height difference between the current fragment and the starting point according to the height value obtained in the previous step; and comparing the height difference calculated in the last step with the integral height difference of the straight line, and when the height difference is greater than the height difference of the straight line, assigning the height of the fragment as the height of the terminal point, otherwise, keeping the height.
2. The TLM microstructure for GPU-oriented hardware line rasterization boundary algorithm of claim 1, wherein: the boundary comparison processing module (4) comprises a fragment height difference submodule (41) and a boundary modification submodule (42);
the chip height difference submodule (41) receives a straight line starting point sent by the straight line starting point and end point selection module (1) and a straight line equation sent by the straight line equation calculation module (2) to calculate the height difference of each chip;
and the boundary correction submodule (42) receives the linear end point sent by the linear start point and end point selection module (1), the linear height difference sent by the linear height difference calculation module (3) and each piece height difference sent by the piece height difference submodule (41), performs boundary correction and calculates each piece coordinate.
3. The TLM microstructure for GPU-oriented hardware line rasterization boundary algorithm of claim 1, wherein: the equation of a straight line: y = kx + b, where k is the slope and b is the intercept.
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CN111008515B (en) * | 2019-11-18 | 2023-06-09 | 中国航空工业集团公司西安航空计算技术研究所 | TLM microstructure for GPU hardware sub-texture replacement storage algorithm |
CN110941939B (en) * | 2019-11-18 | 2022-12-06 | 中国航空工业集团公司西安航空计算技术研究所 | TLM microstructure for GPU hardware pixel replication algorithm |
CN111047498B (en) * | 2019-11-18 | 2022-12-06 | 中国航空工业集团公司西安航空计算技术研究所 | GPU hardware copy buffer algorithm-oriented TLM microstructure |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03196379A (en) * | 1989-12-26 | 1991-08-27 | Nippon Steel Corp | Drawing calculation processing unit |
US5122884A (en) * | 1989-11-13 | 1992-06-16 | Lasermaster Corporation | Line rasterization technique for a non-gray scale anti-aliasing method for laser printers |
JPH05128272A (en) * | 1991-10-30 | 1993-05-25 | Hitachi Telecom Technol Ltd | Intersection calculation method in straight line drawing processing |
US5657436A (en) * | 1995-06-08 | 1997-08-12 | Hewlett-Packard Company | Preprocessing apparatus and method for line scan conversion in a computer graphics system |
US6982723B1 (en) * | 1998-08-30 | 2006-01-03 | Gmd-Forschungszentrum Informationstechnik Gmbh | Method and apparatus for eliminating unwanted steps at edges in graphic representations in the line raster |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6753861B2 (en) * | 2001-10-18 | 2004-06-22 | Hewlett-Packard Development Company, L.P. | Active region determination for line generation in regionalized rasterizer displays |
US6954211B2 (en) * | 2003-06-30 | 2005-10-11 | Microsoft Corporation | Hardware-accelerated anti-aliased graphics |
-
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5122884A (en) * | 1989-11-13 | 1992-06-16 | Lasermaster Corporation | Line rasterization technique for a non-gray scale anti-aliasing method for laser printers |
JPH03196379A (en) * | 1989-12-26 | 1991-08-27 | Nippon Steel Corp | Drawing calculation processing unit |
JPH05128272A (en) * | 1991-10-30 | 1993-05-25 | Hitachi Telecom Technol Ltd | Intersection calculation method in straight line drawing processing |
US5657436A (en) * | 1995-06-08 | 1997-08-12 | Hewlett-Packard Company | Preprocessing apparatus and method for line scan conversion in a computer graphics system |
US6982723B1 (en) * | 1998-08-30 | 2006-01-03 | Gmd-Forschungszentrum Informationstechnik Gmbh | Method and apparatus for eliminating unwanted steps at edges in graphic representations in the line raster |
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