CN109446144A - A kind of general purpose I 2C bus control unit for supporting User Agreement - Google Patents
A kind of general purpose I 2C bus control unit for supporting User Agreement Download PDFInfo
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- CN109446144A CN109446144A CN201811264099.0A CN201811264099A CN109446144A CN 109446144 A CN109446144 A CN 109446144A CN 201811264099 A CN201811264099 A CN 201811264099A CN 109446144 A CN109446144 A CN 109446144A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
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Abstract
The present invention discloses a kind of general purpose I 2C bus control unit for supporting User Agreement, it include: microcontroller interface module (1), work register array module (2), dual port data memory module (3), synchronous sequence signal maker module (4) and I2C bus interface timing maker module (5), the present invention can be by x80 Series of MCU together with the various digital integrated circuit device seamless connections with I2C bus interface, constitute the I2C bus communication link between device, after custom system electrification reset normal work, pass through operating mode configuration parameter, general purpose I 2C bus control unit can be configured to main device by custom system, actively initiates and control the process of data communication in I2C bus, general purpose I 2C bus control unit can also be configured to from device, passively receive I The control of other master controllers in 2C bus, so that master controller be cooperated to complete the process of data communication in I2C bus.
Description
Technical field
The present invention relates to a kind of general purpose I 2C bus control unit, especially a kind of total line traffic control of general purpose I 2C for supporting User Agreement
Device processed.
Background technique
Bus is connected in I2C, that is, Inter-Integrated Circuit, also known as integrated circuit, is a kind of simple and effective
Twin wire bi-directional serial data communication bus is mainly used for logical between microprocessor and various Peripheral digital integrated circuit device
News.Last century the eighties, I2C bus are developed by Dutch Philips Semiconductor Co., Ltd., that is, NXP company first, and in century nine
Initial stage in the ten's has issued 1.0 version of I2C bus specification, thus achieves the patent right of I2C bus.Last century 90 years
Dai Mo, with the development of digital integrated electronic circuit and its application technology, PHILIPS Co. has issued I2C bus specification 2.0 again
Version, promotes the function and performance of I2C bus, and meeting digital circuit using a small amount of port pinout can be realized high speed
The demand of data transmission and low-power consumption.The beginning of this century, the I2C bus specification 2.1 editions publish again, make I2C bus
Function and performance have obtained further improving and extending.Although the version of I2C bus specification constantly upgrades, technically also
It is the compatibility maintained comprehensively to previous version.
I2C bus provides more perfect bus protocol and simplest serial connection mode, sets for various application systems
Meter provides the Extended serial-bus technology between the perfect integrated circuit of one kind, enormously simplifies the hardware design of application system,
To realize that the modularized design of application system provides extremely advantageous condition.I2C bus is by two signal line groups at Duo Geqi
Part can be articulated in simultaneously in the same I2C bus, distinguished between different components by different addresses, this had both saved integrated
The I/O pin of circuit chip, also saves the area of custom system pcb board.The electrical good compatibility of I2C bus, between each device
Be coupled to each other with the I/O pin of open-drain, can be realized easily in this way as long as choosing pull-up resistor appropriate 3V/5V logic level it
Between compatibility.I2C bus supports communication also to support to lead in addition to this most common communication mode of one master and multiple slaves more
Machine communication, double main-machine communications and broadcast mode etc..I2C bus communication speed is also very high, under mode standard, I2C bus
Message transmission rate is 100kbps, can reach 400kbps under quick mode, combines low rate data communication.And I2C
Bus protocol is simple, easy to accomplish, it is easy to can be put into I2C bus interface control logic in customization integrated circuit.Therefore,
I2C bussing technique is once open, i.e., by each customization IC design manufacturer welcome energetically.Currently, many fixed
IC design manufacturer processed, including semiconductor giant Texas Instrument, that is, TI company, Intel, STMicw Electronics, that is, ST public affairs
Department, National Semiconductor, that is, National Semiconductor company, Infineon's science and technology etc., have been achieved for I2C bus
Use authorization, and I2C bus is applied in LCD drive control device, I/O interface controller, data storage, A/D, D/A
In a variety of customization integrated circuit device such as converter and temperature sensor, realize between these devices and microprocessor
High-speed data communications, so that I2C bus be made to become a kind of bus standard general in the world.
But without integrated I2C bus interface in some microprocessors, it is for the user being made of this microprocessor
System, way general at present are to pass through microprocessor monitors program, simulated implementation using the I/O pin of open-drain on microprocessor
A kind of I2C bus interface.On the other hand, IC design manufacturer is customized while abiding by I2C bus specification,
Also according to the technical characterstic of oneself integrated circuit device, localization design has been carried out to I2C bus interface, it is total by simplifying I2C
Line communications protocol improves the speed and efficiency of data communication between oneself device and microprocessor, this allows for different manufacturers
Integrated circuit device, although also using I2C bus interface, the I2C that is realized by the I2C bus control unit of device inside
Bus protocol is not quite identical, and therefore, such two kinds of devices cannot link together, and cannot also realize two devices
Between pass through the data communication of I2C bus.
Summary of the invention
It is an object of that present invention to provide a kind of general purpose I 2C bus control units for supporting User Agreement, solve I2C bus interface
When User Agreement is inconsistent, different manufacturers customize the hardware connectivity problem of I2C interface between integrated circuit.
A kind of general purpose I 2C bus control unit for supporting User Agreement, comprising: microcontroller interface module, working storage
Device array module, dual port data memory module, synchronous sequence signal generation module and I2C bus interface timing generation module.
Microcontroller interface module is through interconnector and work register array module and dual port data memory module phase
Even；Work register array module is through interconnector and synchronous sequence signal generation module and I2C interface timing generation module phase
Even；Dual port data memory module is connected through interconnector with I2C bus interface timing generation module；Synchronous sequence signal generates
Module is connected through interconnector with dual port data memory module and I2C bus interface timing generation module.
The function of microcontroller interface module are as follows: realize programmable logic device configurator and the control of x86 Series of MCU
Bus processed, address bus are connected with the hardware of data/address bus, or receive the control command of x86 Series of MCU input, ginseng
Several and data, or send the inner workings information or data of programmable logic device configurator to x86 series micro-control
Device processed.
The function of work register array module are as follows: receive and store the system control life of microcontroller interface module transmission
It enables, parameter and data, realizes configuration and the course of work of the x86 Series of MCU to general purpose I 2C bus control unit running parameter
Control, meanwhile, record the work state information and data of general purpose I 2C bus control unit, and send microcontroller interface mould to
Block.
The function of dual port data memory module are as follows: receive the microcontroller control signals of microcontroller interface module transmission
And data, the information data that storage custom system needs to exchange, or the information that storage external system is come in through the transmission of I2C bus
Data are read for microcontroller interface module.
The function of synchronous sequence signal generation module are as follows: according to the running parameter and life of the transmission of work register array module
It enables, generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and send general purpose I 2C bus marco to
Modules inside device.
The function of I2C bus interface timing generation module are as follows: according to the general purpose I 2C recorded in work register array module
The running parameter of bus control unit and order automatically generate I2C bus interface timing signal and the storage of matched dual port data
Module port operation signal.
When general purpose I 2C bus control unit is configured as I2C bus main device by custom system, I2C bus interface timing
The process of data communication in I2C bus is initiated and controlled to generation module actively, and according to the order of custom system, or by both-end
Data in mouth data memory module are transferred out from I2C bus, or data are received from I2C bus, and are stored in double
In port data memory module.
When custom system configures I2C bus from device for general purpose I 2C bus control unit, I2C bus interface timing is raw
Passively receive the control of other master controllers in I2C bus at module, and according to the order in I2C bus, or by dual-port
Data in data memory module are transferred out from I2C bus, or data are received from I2C bus, and be stored in both-end
In mouth data memory module.
After I2C bus interface timing generation module completes a data communication operation, " a data exchange is automatically generated
End of operation " interrupt request singal.
When by external pin circuit, when setting I2C bus master controller for general purpose I 2C bus control unit, user is
It unites after electrification reset, general purpose I 2C bus control unit is started to work by the running parameter of work register array module default configuration,
And be in idle condition, wait custom system to input configuration parameter, communication data or control life by microcontroller interface module
It enables；When receiving " transfer data command " that custom system is sent, general purpose I 2C bus control unit presses work at present register battle array
The running parameter of column module configuration is generated needed for general purpose I 2C bus control unit normal work as synchronous sequence signal generation module
The synchronous sequence signal wanted, and send general purpose I 2C bus interface timing generation module to, finally given birth to by I2C bus interface timing
I2C bus timing signal SDA and SCK are automatically generated at module, to open specifying in dual port data memory module at address
The information data to begin with designated length, successively step-by-step is sent out from I2C bus port, and fixed number to be all referred to is according to end of transmission
Afterwards, general purpose I 2C bus control unit automatically generates " data exchange operation finishes " interrupt request singal, and is again introduced into the free time
State waits custom system to issue new instruction；When receiving " receiving data command " that custom system is sent, general purpose I 2C
Bus control unit presses the running parameter of work at present register array module configuration, is generated by synchronous sequence signal generation module logical
Synchronous sequence signal required for being worked normally with I2C bus control unit, and send general purpose I 2C bus interface timing to and generate mould
Block then by I2C bus interface timing generation module monitoring I2C bus timing signal SDA and SCK, and presses I2C bus protocol,
Step-by-step successively receives the data that external system transmission is come in from I2C bus port, will finally be connect by dual port data memory module
The data received are successively stored in the continuous memory cell started at specified address, are all received to the data in I2C bus
It finishes, or after receiving the data of designated length, general purpose I 2C bus control unit automatically generates " a data exchange operation
Finish " interrupt request singal, and it is again introduced into idle state, wait custom system to issue new instruction.
When by external pin circuit, when setting I2C bus from controller for general purpose I 2C bus control unit, user system
It unites after electrification reset, general purpose I 2C bus control unit is started to work by the running parameter of work register array module default configuration,
And be in idle condition, wait custom system to input configuration parameter, communication data or control life by microcontroller interface module
It enables, while monitoring the variation of signal in I2C bus；When receiving " data transmission behaviour of starting that Master controller sends
Make " when, general purpose I 2C bus control unit presses the running parameter of work at present register array module configuration, when by I2C bus interface
Sequence generation module 5 monitors clock signal SDA and SCK in I2C bus automatically, and logical according to the bus received from I2C bus
News order executes corresponding data transfer operation；When bus communication order is " reading memory cell data order ", when by synchronizing
Sequential signal generation module generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and sends both-end to
Mouth data memory module and I2C bus interface timing generation module, when I2C bus interface timing generation module receives effectively
Behind memory data address, control dual port data memory module by the data transmission in specified address to I2C bus interface when
Sequence generation module, finally by I2C bus interface timing generation module by the letter in dual port data memory module in designating unit
Data are ceased, successively step-by-step is sent out from I2C bus port, after all referring to fixed number according to end of transmission, the total line traffic control of general purpose I 2C
Device processed automatically generates " data exchange operation finishes " interrupt request singal, and is again introduced into idle state, waits external main
Controller issues new instruction；When bus communication order is " writing memory cell data order ", generated by synchronous sequence signal
Module generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and sends dual port data storage to
Module and I2C bus interface timing generation module, when I2C bus interface timing generation module receives effective memory data
Behind address and data, I2C bus interface timing generation module is controlled by the address received and data and sends dual port data to
The data received are finally successively stored in dual port data memory module by dual port data memory module and referred to by memory module
Determine in the continuous memory cell started at address, is all received to the data in I2C bus, general purpose I 2C bus control unit
" data exchange operation finishes " interrupt request singal is automatically generated, and is again introduced into idle state, waits custom system hair
New instruction out.
The present invention has fully considered the technology of x86 Series of MCU, various customization integrated circuit device I2C bus interface
Feature not only realizes I2C to the internal x86 series micro process without I2C bus interface by general purpose I 2C bus control unit
Bus interface extension, and by the way that suitable configuration words are written to work register module, make custom system may be according to itself
Feature and current needs, configure general purpose I 2C bus control unit, to realize the I2C bus of different data communication modes
Communications protocol, the I2C bus interface between the customization integrated circuit and microprocessor after localization connect, and provide a kind of reliable
Connection type.
Detailed description of the invention
A kind of general purpose I 2C bus control unit composition schematic diagram for supporting User Agreement of Fig. 1.
1. 2. work register module of microcontroller interface module, 3. dual port data memory module, 4. synchronous sequence is raw
At module 5.I2C bus interface timing generation module
Specific embodiment
A kind of general purpose I 2C bus control unit for supporting User Agreement, comprising: microcontroller interface module 1, working storage
Device module 2, dual port data memory module 3, synchronous sequence signal generation module 4 and I2C bus interface timing generation module 5.
Wherein:
Microcontroller interface module 1 is through interconnector and work register array module 2 and dual port data memory module 3
It is connected；Work register array module 2 generates mould through interconnector and synchronous sequence signal generation module 4 and I2C interface timing
Block 5 is connected；Dual port data memory module 3 is connected through interconnector with I2C bus interface timing generation module 5；Synchronous sequence
Signal generation module 4 is connected through interconnector with dual port data memory module 3 and I2C bus interface timing generation module 5.
The function of microcontroller interface module 1 are as follows: realize programmable logic device configurator and the control of x86 Series of MCU
Bus processed, address bus are connected with the hardware of data/address bus, or receive the control command of x86 Series of MCU input, ginseng
Several and data, or send the inner workings information or data of programmable logic device configurator to x86 series micro-control
Device processed.
The function of work register module 2 are as follows: receive and store the system control life of the transmission of microcontroller interface module 1
It enables, parameter and data, realizes configuration and the course of work of the x86 Series of MCU to general purpose I 2C bus control unit running parameter
Control, meanwhile, record the work state information and data of general purpose I 2C bus control unit, and send microcontroller interface mould to
Block 1.
The function of dual port data memory module 3 are as follows: receive the microcontroller that microcontroller interface module 1 transmits and control letter
Number and data, storage custom system need the information data that exchanges, or the letter that storage external system is come in through the transmission of I2C bus
Data are ceased, are read for microcontroller interface module 1.
The function of synchronous sequence signal generation module 4 are as follows: the running parameter and life transmitted according to work register module 2
It enables, generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and send general purpose I 2C bus marco to
Modules inside device.
The function of I2C bus interface timing generation module 5 are as follows: total according to the general purpose I 2C recorded in work register module 2
The running parameter of lane controller and order automatically generate I2C bus interface timing signal and matched dual port data storage mould
3 port operation signal of block.
When general purpose I 2C bus control unit is configured as I2C bus main device by custom system, I2C bus interface timing
The process of data communication in I2C bus is actively initiated and controlled to generation module 5, and according to the order of custom system, or will be double
Data in port data memory module 3 are transferred out from I2C bus, or data are received from I2C bus, and be stored in
In dual port data memory module 3.
When custom system configures I2C bus from device for general purpose I 2C bus control unit, I2C bus interface timing is raw
Passively receive the control of other master controllers in I2C bus at module 5, and according to the order in I2C bus, or by dual-port
Data in data memory module 3 are transferred out from I2C bus, or data are received from I2C bus, and be stored in both-end
In mouth data memory module 3.
After I2C bus interface timing generation module 5 completes a data communication operation, " data a friendship is automatically generated
Change end of operation " interrupt request singal.
When by external pin circuit, when setting I2C bus master controller for general purpose I 2C bus control unit, user is
It unites after electrification reset, general purpose I 2C bus control unit is started to work by the running parameter of 2 default configuration of work register module, and
It is in idle condition, custom system is waited to input configuration parameter, communication data or control life by microcontroller interface module 2
It enables；When receiving " transfer data command " that custom system is sent, general purpose I 2C bus control unit presses work at present register mould
The running parameter that block 2 configures is generated required for general purpose I 2C bus control unit normal work as synchronous sequence signal generation module 4
Synchronous sequence signal, and send general purpose I 2C bus interface timing generation module 5 to, finally generated by I2C bus interface timing
Module 5 automatically generates I2C bus timing signal SDA and SCK, to open specifying in dual port data memory module 3 at address
The information data to begin with designated length, successively step-by-step is sent out from I2C bus port, and fixed number to be all referred to is according to end of transmission
Afterwards, general purpose I 2C bus control unit automatically generates " data exchange operation finishes " interrupt request singal, and is again introduced into the free time
State waits custom system to issue new instruction；When receiving " receiving data command " that custom system is sent, general purpose I 2C
Bus control unit presses the running parameter that work at present register module 2 configures, and is generated by synchronous sequence signal generation module 4 general
Synchronous sequence signal required for I2C bus control unit works normally, and send general purpose I 2C bus interface timing generation module to
5, I2C bus timing signal SDA and SCK are then monitored by I2C bus interface timing generation module 5, and press I2C always mutual agreement,
Step-by-step successively receives the data that external system transmission is come in from I2C bus port, will finally be connect by dual port data memory module 4
The data received are successively stored in the continuous memory cell started at specified address, are all received to the data in I2C bus
It finishes, or after receiving the data of designated length, general purpose I 2C bus control unit automatically generates " a data exchange operation
Finish " interrupt request singal, and it is again introduced into idle state, wait custom system to issue new instruction.
When by external pin circuit, when setting I2C bus from controller for general purpose I 2C bus control unit, user system
It unites after electrification reset, general purpose I 2C bus control unit is started to work by the running parameter of 2 default configuration of work register module, and
It is in idle condition, custom system is waited to input configuration parameter, communication data or control life by microcontroller interface module 1
It enables, while monitoring the variation of signal in I2C bus；When receiving " data transmission behaviour of starting that Master controller sends
Make " when, general purpose I 2C bus control unit presses the running parameter that work at present register module 2 configures, by I2C bus interface timing
Generation module 5 monitors clock signal SDA and SCK in I2C bus automatically, and according to the bus communication received from I2C bus
Order executes corresponding data transfer operation；When bus communication order is " reading memory cell data order ", by synchronous sequence
Signal generation module 4 generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and sends dual-port to
Data memory module 3 and I2C bus interface timing generation module 5, when I2C bus interface timing generation module 5 receives effectively
Memory data address after, control dual port data memory module 3 and give the data transmission in specified address to I2C bus interface
Timing generation module 5 finally will specify storage single by I2C bus interface timing generation module 5 in dual port data memory module 3
Data in member, successively step-by-step is sent out from I2C bus port, and after all referring to fixed number according to end of transmission, general purpose I 2C is total
Lane controller automatically generates " data exchange operation finishes " interrupt request singal, and is again introduced into idle state, waits outer
Portion's master controller issues new instruction；When bus communication order is " writing memory cell data order ", by synchronous sequence signal
Generation module 4 generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and sends dual port data to
Memory module 3 and I2C bus interface timing generation module 5 are effectively deposited when I2C bus interface timing generation module 5 receives
Behind memory data address and data, control I2C bus interface timing generation module 5 sends the address received and data to double
Port data memory module 3, finally received data are stored at specified address by dual port data memory module 3
It in continuous memory cell, is all received to the data in I2C bus, general purpose I 2C bus control unit automatically generates " a number
Finished according to swap operation " interrupt request singal, and it is again introduced into idle state, wait custom system to issue new instruction.
Claims (6)
1. the general purpose I 2C bus control unit that one kind can support User Agreement, characterized by comprising: microcontroller interface module
(1), work register module (2), dual port data memory module (3), synchronous sequence signal generation module (4) and I2C bus
Interface sequence generation module (5)；
Microcontroller interface module (1) is through interconnector and work register array module (2) and dual port data memory module
(3) it is connected；Work register array module (2) is through interconnector and synchronous sequence signal generation module (4) and I2C interface timing
Generation module (5) is connected；Dual port data memory module (3) is through interconnector and I2C bus interface timing generation module (5) phase
Even；Synchronous sequence signal generation module (4) is through interconnector and dual port data memory module (3) and I2C bus interface timing
Generation module (5) is connected；
When general purpose I 2C bus control unit is configured as I2C bus main device by custom system, I2C bus interface timing is generated
The process of data communication in I2C bus is actively initiated and controlled to module (5), and according to the order of custom system, or by both-end
Data in mouth data memory module (3) are transferred out from I2C bus, or data are received from I2C bus, and be stored in
In dual port data memory module (3)；
When custom system configures I2C bus from device for general purpose I 2C bus control unit, I2C bus interface timing generates mould
Block (5) passively receives the control of other master controllers in I2C bus, and according to the order in I2C bus, or by dual-port number
It is transferred out from I2C bus according to the data in memory module (3), or receives data from I2C bus, and be stored in both-end
In mouth data memory module (3)；
After I2C bus interface timing generation module (5) completes a data communication operation, " a data exchange is automatically generated
End of operation " interrupt request singal；
When by external pin circuit, when setting I2C bus master controller for general purpose I 2C bus control unit, in custom system
After reset, general purpose I 2C bus control unit is started to work by the running parameter of work register module (2) default configuration, and is located
In idle state, custom system is waited to input configuration parameter, communication data or control life by microcontroller interface module (2)
It enables；When receiving " transfer data command " that custom system is sent, general purpose I 2C bus control unit presses work at present register mould
The running parameter of block (2) configuration generates general purpose I 2C bus control unit by synchronous sequence signal generation module (4) and works normally institute
The synchronous sequence signal needed, and send general purpose I 2C bus interface timing generation module (5) to, finally by I2C bus interface when
Sequence generation module (5) automatically generates I2C bus timing signal SDA and SCK, thus by dual port data memory module (3) middle finger
Determine to start the information data with designated length at address, successively step-by-step is sent out from I2C bus port, fixed number to be all referred to
After end of transmission, general purpose I 2C bus control unit automatically generates " data exchange operation finishes " interrupt request singal, and again
It is secondary to enter idle state, wait custom system to issue new instruction；When receiving " receiving data command " that custom system sends
When, general purpose I 2C bus control unit presses the running parameter of work at present register module (2) configuration, is generated by synchronous sequence signal
Module (4) generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and sends general purpose I 2C bus to
Interface sequence generation module (5), then by I2C bus interface timing generation module (5) monitoring I2C bus timing signal SDA and
SCK, and I2C always mutual agreement is pressed, step-by-step successively receives the data that external system transmission is come in from I2C bus port, finally by double
The data received are successively stored in the continuous memory cell started at specified address by port data memory module (4), to
Data in I2C bus all receive, or after receiving the data of designated length, general purpose I 2C bus control unit from
It is dynamic to generate " data exchange operation finishes " interrupt request singal, and it is again introduced into idle state, wait custom system to issue
New instruction；
When by external pin circuit, when setting I2C bus from controller for general purpose I 2C bus control unit, in custom system
After reset, general purpose I 2C bus control unit is started to work by the running parameter of work register module (2) default configuration, and is located
In idle state, custom system is waited to input configuration parameter, communication data or control life by microcontroller interface module (1)
It enables, while monitoring the variation of signal in I2C bus；When receiving " data transmission behaviour of starting that Master controller sends
Make " when, general purpose I 2C bus control unit presses the running parameter of work at present register module (2) configuration, when by I2C bus interface
Sequence generation module (5) monitors clock signal SDA and SCK in I2C bus automatically, and according to the bus received from I2C bus
Communication command executes corresponding data transfer operation；When bus communication order is " reading memory cell data order ", by synchronizing
Clock signal generation module (4) generates synchronous sequence signal required for general purpose I 2C bus control unit works normally, and sends to
Dual port data memory module (3) and I2C bus interface timing generation module 5, when I2C bus interface timing generation module (5)
After receiving effective memory data address, dual port data memory module (3) are controlled by the data transmission in specified address
To I2C bus interface timing generation module (5), finally dual port data is stored by I2C bus interface timing generation module (5)
Data in module (3) in designated memory cell, successively step-by-step is sent out from I2C bus port, fixed number evidence to be all referred to
After end of transmission, general purpose I 2C bus control unit automatically generates " data exchange operation finishes " interrupt request singal, and again
Into idle state, Master controller is waited to issue new instruction；When bus communication order is " to write memory cell data life
Enable " when, synchronous sequence required for general purpose I 2C bus control unit works normally is generated by synchronous sequence signal generation module (4)
Signal, and send dual port data memory module (3) and I2C bus interface timing generation module (5) to, when I2C bus interface
After timing generation module (5) receives effective memory data address and data, I2C bus interface timing generation module is controlled
(5) address received and data are sent to dual port data memory module (3), finally by dual port data memory module
(3) received data are stored in the continuous memory cell started at specified address, are all received to the data in I2C bus
It finishes, general purpose I 2C bus control unit automatically generates " data exchange operation finishes " interrupt request singal, and is again introduced into sky
Not busy state waits custom system to issue new instruction.
2. the general purpose I 2C bus control unit that one kind according to claim 1 can support User Agreement, it is characterised in that described
The function of microcontroller interface module (1) are as follows: realize that programmable logic device configurator and the control of x86 Series of MCU are total
Line, address bus are connected with the hardware of data/address bus, or receive x86 Series of MCU input control command, parameter and
Data, or send the inner workings information or data of programmable logic device configurator to x86 Series of MCU.
3. the general purpose I 2C bus control unit that one kind according to claim 1 can support User Agreement, it is characterised in that described
The function of work register module (2) are as follows: receive and store the system control command of microcontroller interface module (1) transmission, ginseng
Several and data realize x86 Series of MCU to the configuration of general purpose I 2C bus control unit running parameter and the control of the course of work
System, meanwhile, the work state information and data of general purpose I 2C bus control unit are recorded, and send microcontroller interface module to
(1)。
4. the general purpose I 2C bus control unit that one kind according to claim 1 can support User Agreement, it is characterised in that described
The function of dual port data memory module (3) are as follows: receive microcontroller interface module (1) transmission microcontroller control signals and
Data, the information data that storage custom system needs to exchange, or the Information Number that storage external system is come in through the transmission of I2C bus
According to for microcontroller interface module (1) reading.
5. the general purpose I 2C bus control unit that one kind according to claim 1 can support User Agreement, it is characterised in that described
The function of synchronous sequence signal generation module (4) are as follows: running parameter and order according to work register module (2) transmission produce
Synchronous sequence signal required for raw general purpose I 2C bus control unit works normally, and send to inside general purpose I 2C bus control unit
Modules.
6. the general purpose I 2C bus control unit that one kind according to claim 1 can support User Agreement, it is characterised in that described
The function of I2C bus interface timing generation module (5) are as follows: according to the total line traffic control of general purpose I 2C recorded in work register module (2)
The running parameter of device processed and order automatically generate I2C bus interface timing signal and matched dual port data memory module (3)
Port operation signal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811264099.0A CN109446144A (en) | 2018-10-29 | 2018-10-29 | A kind of general purpose I 2C bus control unit for supporting User Agreement |
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| CN201811264099.0A CN109446144A (en) | 2018-10-29 | 2018-10-29 | A kind of general purpose I 2C bus control unit for supporting User Agreement |
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| CN201811264099.0A Pending CN109446144A (en) | 2018-10-29 | 2018-10-29 | A kind of general purpose I 2C bus control unit for supporting User Agreement |
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Application publication date: 20190308 |