CN109411518B - Organic light emitting diode display and manufacturing method thereof - Google Patents
Organic light emitting diode display and manufacturing method thereof Download PDFInfo
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- CN109411518B CN109411518B CN201811219052.2A CN201811219052A CN109411518B CN 109411518 B CN109411518 B CN 109411518B CN 201811219052 A CN201811219052 A CN 201811219052A CN 109411518 B CN109411518 B CN 109411518B
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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Abstract
The invention provides an organic light emitting diode display and a manufacturing method thereof, wherein the manufacturing method comprises the following steps: preparing a flexible substrate; manufacturing an active layer on the flexible substrate; manufacturing a first metal layer on the active layer, and carrying out patterning treatment on the first metal layer to enable the first metal layer positioned in the display area to form a grid electrode and the first metal layer positioned in the fan-out area to form a first fan-out line; and manufacturing a second metal layer on the grid and the first fan-out line, and carrying out patterning treatment on the second metal layer to enable the second metal layer positioned in the display area to form a first metal part and the second metal layer positioned in the fan-out area to form a second fan-out line, wherein the resistance values of the second fan-out line and the first fan-out line are equal. The organic light emitting diode display and the manufacturing method thereof can avoid uneven brightness and improve the display effect.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to an organic light-emitting diode display and a manufacturing method thereof.
[ background of the invention ]
An Organic Light-Emitting Diode (OLED) display has the advantages of Light weight, self-luminescence, wide viewing angle, low driving voltage, high Light-Emitting efficiency, low power consumption, high response speed and the like, is widely applied, and particularly, a flexible OLED display has the characteristic of being bendable and easy to carry, and becomes a main product for research and development in the field of display technology.
The existing organic light emitting diode display comprises a display area and a fan-out area, the fan-out area is generally provided with fan-out wiring of data lines in an alternating mode of two layers of metal GE1 and GE2, wherein GE1 and GE2 are both single-layer structures, the resistance of a material of GE1 is large, the resistance of a material of GE2 is small, so that currents received by the data lines are different in size, uneven brightness easily occurs, abnormal display is caused, and the display effect is influenced.
Therefore, it is necessary to provide an organic light emitting diode display and a method for manufacturing the same to solve the problems of the prior art.
[ summary of the invention ]
The invention aims to provide an organic light emitting diode display and a manufacturing method thereof, which can avoid uneven brightness and improve the display effect.
In order to solve the above technical problems, the present invention provides a method for manufacturing an organic light emitting diode display, comprising:
preparing a flexible substrate;
an active layer is manufactured on the flexible substrate positioned in the display area;
manufacturing a first metal layer on the active layer and the flexible substrate which is not covered by the active layer, and carrying out patterning treatment on the first metal layer to enable the first metal layer positioned in the display area to form a grid and the first metal layer positioned in the fan-out area to form a first fan-out line;
and manufacturing a second metal layer on the grid and the first fan-out line, carrying out patterning treatment on the second metal layer to enable the second metal layer positioned in the display area to form a first metal part and the second metal layer positioned in the fan-out area to form a second fan-out line, and enabling the resistance values of the second fan-out line and the first fan-out line to be equal, wherein the resistance value of the second metal layer is not equal to the resistance value of the first metal layer.
In the method for manufacturing an organic light emitting diode display according to the present invention, the patterning the second metal layer to form a first metal portion on the second metal layer in the display region and a second fan-out line on the second metal layer in the fan-out region, and the step of equalizing the resistance of the second fan-out line and the resistance of the first fan-out line includes:
patterning the second metal layer to enable the second metal layer located in the display area to form a first metal part and the second metal layer located in the fan-out area to form a second metal part; wherein the resistance of the second metal layer is less than the resistance of the first metal layer;
and patterning the second metal part to obtain a second fanout line with the thickness smaller than that of the second metal part.
In the method of manufacturing an organic light emitting diode display of the present invention, the second metal layer includes a plurality of sub-metal layers;
the step of patterning the second metal part to obtain a second fanout line with a thickness smaller than that of the second metal part includes:
and removing at least one sub-metal layer close to the top in the second metal part to obtain a second fanout line with the thickness smaller than that of the second metal part.
In the method for manufacturing an organic light emitting diode display, the sub-metal layer of the first metal part comprises Ti/Al/Ti/Al/Ti which are sequentially positioned on the grid electrode and the first fanout line;
the sub-metal layer of the second fan-out line comprises Ti/Al/Ti which are sequentially positioned on the grid and the first fan-out line;
the first metal layer is made of Mo.
In the method for manufacturing an organic light emitting diode display according to the present invention, the step of removing at least one sub-metal layer near the top of the second metal part includes:
and etching the second metal part to remove at least one sub-metal layer close to the top in the second metal part.
In the method of manufacturing an organic light emitting diode display of the present invention, the method further includes:
forming an interlayer insulating layer on the first metal part and the second fan-out line; patterning the interlayer insulating layer to form two first via holes;
and forming a third metal layer on the interlayer insulating layer and in the first via hole, and performing patterning treatment on the third metal layer to form a source electrode and a drain electrode on the third metal layer in the display area, wherein the source electrode and the drain electrode are both connected with the active layer through the first via hole.
In the method of manufacturing an organic light emitting diode display according to the present invention, the position of the first metal portion corresponds to the position of the gate electrode.
The present invention also provides an organic light emitting diode display, which includes:
a flexible substrate;
an active layer disposed on the flexible substrate, the active layer being located in a display area;
the first metal layer is arranged on the active layer and the flexible substrate which is not covered by the active layer, and comprises a grid electrode positioned in the display area and a first fan-out line positioned in the fan-out area;
the second metal layer is arranged on the grid and the first fanout line; the second metal layer comprises a first metal part positioned in the display area and a second fan-out line positioned in the fan-out area; the resistance value of the second metal layer is different from that of the first metal layer, and the resistance values of the second fanout line and the first fanout line are equal.
In the organic light emitting diode display of the present invention, the sub-metal layer of the first metal portion includes Ti/Al/Ti sequentially located on the gate electrode and the first fanout line;
the sub-metal layer of the second fan-out line comprises Ti/Al/Ti which are sequentially arranged on the grid and the first fan-out line, and the first metal layer is made of Mo.
In the organic light emitting diode display of the present invention, the organic light emitting diode display further includes:
the interlayer insulating layer is arranged on the second grid and the second metal routing; two first via holes are formed in the interlayer insulating layer;
and the third metal layer is arranged on the interlayer insulating layer and in the first through hole, comprises a source electrode and a drain electrode which are positioned in the display area, and the source electrode and the drain electrode are both connected with the channel through the first through hole.
According to the organic light-emitting diode display and the manufacturing method thereof, the second metal layer with the multi-layer metal structure is adopted, so that the resistance value of the second metal layer is smaller than that of the first metal layer, the thickness of the second metal layer in the fan-out area is reduced, the resistance value of the second fan-out line is increased, the resistances of the first fan-out line and the second fan-out line in the fan-out area are consistent, the current received by the data line is consistent, uneven brightness is avoided, and the display effect is improved.
[ description of the drawings ]
Fig. 1 is a schematic structural diagram of a first step of a method for manufacturing an organic light emitting diode display according to the present invention.
Fig. 2 is a schematic structural diagram of a first step in a second step of the method for manufacturing an organic light emitting diode display according to the present invention.
Fig. 3 is a cross-sectional view of a second metal layer in an organic light emitting diode display according to the present invention.
Fig. 4 is a schematic structural diagram of a second step in the second step of the method for manufacturing an organic light emitting diode display according to the present invention.
FIG. 5 is a schematic structural diagram of the second step of the manufacturing method of the organic light emitting diode display according to the present invention.
Fig. 6 is a cross-sectional view of a second fan-out line in the organic light emitting diode display according to the present invention.
FIG. 7 is a schematic structural diagram of an OLED display according to the present invention.
[ detailed description ] embodiments
The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the invention may be practiced. In the present invention, directional terms such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side", etc. refer to directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.
Referring to fig. 1 to 7, fig. 1 is a schematic structural diagram of a first step of a method for manufacturing an organic light emitting diode display according to the present invention.
As shown in fig. 1, the organic light emitting diode display of the present invention includes a display region 101 and a fan-out region 102, the fan-out region 102 is located outside the display region 101, signal lines in the display region 101 include data lines and scan lines, and pins of a driving chip are connected to ends of the data lines through fan-out lines, so as to input driving signals on the driving chip into the data lines of the display region 101, that is, the fan-out lines connect the data lines and the driving chip. The manufacturing method mainly comprises the following steps:
s101, sequentially forming a buffer layer, an active layer, a gate insulation layer, a first metal layer and a second gate insulation layer on a flexible substrate; patterning the first metal layer to form a grid electrode on the first metal layer positioned in the display area and a first fan-out line on the first metal layer positioned in the fan-out area;
before fabrication, a flexible substrate 11 is fabricated on a glass substrate, and as shown in fig. 1, a buffer layer 12, an active layer 13, a gate insulating layer 14, a first metal layer 15, and a second gate insulating layer 16 are sequentially formed on the flexible substrate 11.
The active layer 13 is used to form a channel. The active layer 13 is located within the display region 101.
A gate insulating layer 14 is positioned on the active layer 13 and on the buffer layer 12 not covered by the active layer 13.
Patterning the first metal layer 15 by a mask plate, so that the first metal layer located in the display region 101 forms the gate 151 and the first metal layer located in the fan-out region 102 forms the first fan-out line 152. Wherein the material of the first metal layer 15 is Mo. The first metal layer 15 is further used to form scan lines (not shown), which are arranged along a horizontal direction in one embodiment and electrically connected to the gate electrodes 151.
The second gate insulating layer 16 is located on the gate electrode 151, the first fanout line 152, and the gate insulating layer 14 not covered by the gate electrode 151 and the first fanout line 152.
S102, manufacturing a second metal layer on the grid and the first fan-out line, and carrying out patterning treatment on the second metal layer to enable the second metal layer located in the display area to form a first metal part and the second metal layer located in the fan-out area to form a second fan-out line, and enable the resistance values of the second fan-out line and the first fan-out line to be equal.
The number of the second fan-out lines and the number of the first fan-out lines are at least one.
In one embodiment, the resistance of the second metal layer 17 is smaller than the resistance of the first metal layer 15, and the steps include:
s1021, patterning the second metal layer to enable the second metal layer positioned in the display area to form a first metal part and the second metal layer positioned in the fan-out area to form a second metal part;
as shown in fig. 2 to 5, a second gate insulating layer 16 is formed on the gate 151 and the first metal line 152, a second metal layer 17 is formed on the second gate insulating layer 16, and then the second metal layer 17 is patterned by a mask, so that a first metal portion 171 is formed in the second metal layer 17 in the display region 101 and a second metal portion 172 is formed in the second metal layer in the fan-out region 102. The first metal portion 171 corresponds to the gate electrode 151, and the first metal portion 171 and the gate electrode 151 form a storage capacitor.
As shown in fig. 3, the second metal layer 17 includes a plurality of sub-metal layers 31 to 35, 31 to 35 corresponding to Ti/Al/Ti, respectively, on the second gate insulating layer 16. That is, the cross-sectional structure of the second metal layer 17 includes Ti/Al/Ti sequentially on the second gate insulating layer 16.
And S1022, patterning the second metal part to obtain a second fanout line with the thickness smaller than that of the second metal part.
The step of patterning the second metal part to obtain a second fanout line with a thickness smaller than that of the second metal part includes:
s301, removing at least one sub-metal layer close to the top in the second metal part to obtain a second fanout line with the thickness smaller than that of the second metal part.
For example, the second metal portion 172 is patterned to obtain a second fanout line 173 having a thickness smaller than that of the second metal portion 172.
The step S301 may include:
s3011, etching the second metal part to remove at least one sub-metal layer close to the top in the second metal part.
In one embodiment, as shown in fig. 4, a photoresist material 36 is coated on a region except for the second metal portion 172, and the second metal portion 172 is etched to remove the Al/Ti sub-metal layer near the top of the second metal portion 172, so as to obtain a second fanout line 173 having a thickness smaller than that of the second metal portion 172. When the thickness of the second metal layer of the fan-out region is decreased, the resistance of the second fanout line 173 is increased, so that the resistances of the second fanout line 173 and the first fanout line 171 are equal. It is understood that one or more sub-metal layers may be removed as long as the resistances of the second fanout line 173 and the first fanout line 171 are equal. And then removing the photoresist material.
It can be understood that the thickness of the first metal part 171 positioned at the display region 101 is greater than the thickness of the second fan-out line 173 positioned at the fan-out region 102. The cross-sectional structure of the first metal part 171 includes Ti/Al/Ti sequentially on the second gate insulating layer 16.
As shown in fig. 6, the sub-metal layer of the second fanout line 173 includes Ti/Al/Ti sequentially on the second gate insulating layer 16. That is, the cross-sectional structure of the second fanout line 173 includes a multi-layer structure of 31 to 33, and 31 to 33 correspond to Ti/Al/Ti, respectively. That is, the second fanout line 173 is formed by etching away Al/Ti on the upper layer of the second metal part 172.
It is understood that in other embodiments, the material of the first metal layer of the present invention is not limited to Mo, nor is the material of the second metal layer limited to Ti/Al/Ti. For example, the resistance of the first metal layer may be smaller than that of the second metal layer, and the resistance of the second fanout line and the resistance of the first fanout line may be equal by reducing the thickness of the first metal layer corresponding to the first fanout line.
Because the number of data lines is large and the size of the display is limited, it is often necessary to arrange the fan-out lines in layers, for example, a portion of the fan-out lines (first fan-out lines) is formed by the first metal layer, and the rest of the fan-out lines (second fan-out lines) are formed by the second metal layer. In one embodiment, the first fanout line 152 is used to connect odd data lines, and the second fanout line 173 is used to connect even data lines. The scanning lines directly extend out of the display area and are connected with the grid driving circuit.
S103, forming an interlayer insulating layer on the first metal part and the second fan-out line; patterning the interlayer insulating layer to form two first via holes;
as shown in fig. 7, an interlayer insulating layer 18 is formed on the second metal layer 17, and the interlayer insulating layer 18 is patterned to form two first vias (not shown).
And S104, forming a third metal layer on the interlayer insulating layer and in the first via hole, and performing patterning treatment on the third metal layer to form a source electrode and a drain electrode on the third metal layer in the display area, wherein the source electrode and the drain electrode are both connected with the active layer through the first via hole.
As shown in fig. 7, a third metal layer 19 is formed on the interlayer insulating layer 18 and in the first via hole, and the third metal layer 19 is patterned, so that a source electrode 191 and a drain electrode 192 are formed in the third metal layer 19 in the display region 101, and both the source electrode 191 and the drain electrode 192 are connected to the active layer 13 through the first via hole. The third metal layer 19 is also used to form data lines (not shown), which are arranged in a vertical direction in one embodiment and electrically connected to the source electrodes 191. It is understood that third via holes are respectively disposed at positions corresponding to the first and second fanout lines 152 and 173 (e.g., starting ends of the fanout lines), and the data lines are connected to the corresponding fanout lines through the third via holes.
The method may further comprise:
s105, forming a flat layer on the source electrode and the drain electrode, and carrying out patterning treatment on the flat layer to form a second through hole;
as shown in fig. 7, a planarization layer 20 is formed on the source electrode 191 and the drain electrode 192, and the planarization layer 20 is patterned to form a second via hole (not shown).
S106, forming an anode in the second via hole and on the flat layer, and sequentially forming a pixel defining layer and a spacer on the anode.
An anode 21, a pixel defining layer 22 and a spacer 23 are sequentially formed in the second via hole and on the planarization layer 20.
Forming a conductive layer in the second via hole and on the planarization layer 20, patterning the conductive layer to form an anode 21, forming a pixel definition layer 22 and a photoresist spacer layer on the anode 21, and patterning the pixel definition layer 22 and the photoresist spacer layer by a photo-masking process to form a pixel definition layer with a predetermined pattern and a spacer 23.
The present invention also provides an organic light emitting diode display, as shown in fig. 7, the organic light emitting diode display includes the display region 101 and the fan-out region 102, and the cross-sectional structure of the organic light emitting diode display includes: the pixel electrode includes a flexible substrate 11, a buffer layer 12, an active layer 13, a gate insulating layer 14, a first metal layer 15, a second gate insulating layer 16, a second metal layer 17, and further may include an interlayer insulating layer 18, a third metal layer 19, a planarization layer 20, an anode 21, a pixel defining layer 22, and a spacer 23. The resistance of the second metal layer 17 is different from the resistance of the first metal layer 15.
A buffer layer 12 is positioned on the flexible substrate 11, an active layer 13 is positioned on the buffer layer 12 within the display region 101, and a gate insulating layer 14 is positioned on the active layer 13 and on the buffer layer 12 not covered by the active layer 13.
The first metal layer 15 is located on the gate insulating layer 14, and the first metal layer 15 includes a gate 151 located in the display region 101 and a first fan-out line 152 located in the fan-out region 102;
the second gate insulating layer 16 is located on the gate electrode 151 and the first fanout line 152 and the gate insulating layer 14 not covered by the gate electrode 151 and the first fanout line 152.
The second metal layer 17 includes a first metal part 171 positioned in the display region 101 and a second fan-out line 173 of the fan-out region; wherein the second fanout line 173 and the first fanout line 152 have the same resistance value.
The interlayer insulating layer 18 is located on the first metal portion 171, the second fanout line 173, and the second gate insulating layer 16 not covered by the first metal portion 171 and the second fanout line 173, and two first via holes are formed in the interlayer insulating layer 18.
The third metal layer 19 is disposed on the interlayer insulating layer 18 and in the first via hole, and the third metal layer 19 includes a source electrode 191 and a drain electrode 192 disposed in the display region 101.
The planarization layer 20 is disposed on the source electrode 191, the drain electrode 192, and the interlayer insulating layer 18 not covered by the source electrode 191 and the drain electrode 192, and both the source electrode 191 and the drain electrode 192 are connected to the active layer 13 through the first via hole. The planarization layer 20 is provided with a second via hole (not shown). An anode 21 is located within the second via and on the planarization layer 20.
The anode 21 is connected to the drain 192 through a second via.
A pixel defining layer 22 and spacers 23 are sequentially positioned on the anode 21.
In an embodiment, the resistance of the second metal layer 17 is smaller than that of the first metal layer 15, and as shown in fig. 3, the second metal layer 17 includes a plurality of sub-metal layers 31-35, 31-35 located on the second gate insulating layer 16, which correspond to Ti/Al/Ti, respectively. That is, the cross-sectional structure of the second metal layer 17 includes Ti/Al/Ti sequentially on the second gate insulating layer 16. It can be understood that the thickness of the first metal part 171 positioned at the display region 101 is greater than the thickness of the second fan-out line 173 positioned at the fan-out region 102. The cross-sectional structure of the first metal part 171 includes Ti/Al/Ti sequentially on the second gate insulating layer 16.
As shown in fig. 6, the sub-metal layer of the second fanout line 173 includes Ti/Al/Ti sequentially on the second gate insulating layer 16. That is, the cross-sectional structure of the second fanout line 173 includes a multi-layer structure of 31 to 33, and 31 to 33 correspond to Ti/Al/Ti, respectively. The second fanout line 173 is formed by etching away Al/Ti on the upper layer of the second metal part 172.
Due to the fact that the second metal layer of the multi-layer metal structure is adopted, the resistance value of the second metal layer is smaller than that of the first metal layer, the thickness of the second metal layer of the fan-out area is reduced, the resistance value of the second fan-out line is increased, the first fan-out line of the fan-out area is consistent with the resistance of the second fan-out line, the current received by the odd number data line and the current received by the even number data line are consistent, uneven brightness is avoided, and the display effect is improved.
According to the organic light-emitting diode display and the manufacturing method thereof, the second metal layer with the multi-layer metal structure is adopted, so that the resistance value of the second metal layer is smaller than that of the first metal layer, the thickness of the second metal layer in the fan-out area is reduced, the resistance value of the second fan-out line is increased, the resistances of the first fan-out line and the second fan-out line in the fan-out area are consistent, the current received by the data line is consistent, uneven brightness is avoided, and the display effect is improved.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (9)
1. A method of making an organic light emitting diode display, comprising:
preparing a flexible substrate;
manufacturing an active layer on a flexible substrate positioned in a display area;
manufacturing a first metal layer on the active layer and the flexible substrate which is not covered by the active layer, and carrying out patterning treatment on the first metal layer to enable the first metal layer positioned in the display area to form a grid and the first metal layer positioned in the fan-out area to form a first fan-out line;
manufacturing a second metal layer on the grid and the first fan-out line, and performing patterning treatment on the second metal layer to enable the second metal layer positioned in the display area to form a first metal part and the second metal layer positioned in the fan-out area to form a second fan-out line, and enable the resistance values of the second fan-out line and the first fan-out line to be equal, wherein the resistance value of the second metal layer is different from the resistance value of the first metal layer;
the step of patterning the second metal layer to form a first metal part on the second metal layer in the display area and a second fan-out line on the second metal layer in the fan-out area, and making the resistance values of the second fan-out line and the first fan-out line equal to each other includes:
patterning the second metal layer to enable the second metal layer located in the display area to form a first metal part and the second metal layer located in the fan-out area to form a second metal part; wherein the resistance of the second metal layer is less than the resistance of the first metal layer;
and patterning the second metal part to obtain a second fan-out wire with the thickness smaller than that of the second metal part, so that the resistance values of the second fan-out wire and the first fan-out wire are equal.
2. The method of claim 1, wherein the second metal layer comprises a plurality of sub-metal layers;
the step of patterning the second metal part to obtain a second fanout line with a thickness smaller than that of the second metal part includes:
and removing at least one sub-metal layer close to the top in the second metal part to obtain a second fanout line with the thickness smaller than that of the second metal part.
3. The method of manufacturing an organic light emitting diode display according to claim 2,
the sub-metal layer of the first metal part comprises Ti/Al/Ti/Al/Ti which are sequentially positioned on the grid electrode and the first fanout line;
the sub-metal layer of the second fan-out line comprises Ti/Al/Ti which are sequentially positioned on the grid and the first fan-out line;
the first metal layer is made of Mo.
4. The method of claim 2, wherein the removing at least a sub-metal layer near the top of the second metal portion comprises:
and etching the second metal part to remove at least one sub-metal layer close to the top in the second metal part.
5. The method of fabricating an organic light emitting diode display of claim 1, further comprising:
forming an interlayer insulating layer on the first metal part and the second fan-out line; patterning the interlayer insulating layer to form two first via holes;
and forming a third metal layer on the interlayer insulating layer and in the first via hole, and performing patterning treatment on the third metal layer to form a source electrode and a drain electrode on the third metal layer in the display area, wherein the source electrode and the drain electrode are both connected with the active layer through the first via hole.
6. The method of claim 1, wherein the first metal portion is located at a position corresponding to a position of the gate electrode.
7. An organic light emitting diode display comprising a flexible substrate;
an active layer disposed on the flexible substrate, the active layer being located in a display area;
the first metal layer is arranged on the active layer and the flexible substrate which is not covered by the active layer, and comprises a grid electrode positioned in the display area and a first fan-out line positioned in the fan-out area;
the second metal layer is arranged on the grid and the first fanout line; the second metal layer comprises a first metal part positioned in the display area and a second fan-out line positioned in the fan-out area; the resistance value of the second metal layer is different from that of the first metal layer, the resistance values of the second fanout line and the first fanout line are equal, and the resistance value of the second metal layer is smaller than that of the first metal layer; the second metal layer further comprises a second metal part located in the fan-out area, the thickness of the second fan-out line is smaller than that of the second metal part, and the resistance values of the second fan-out line and the first fan-out line are equal.
8. The organic light-emitting diode display according to claim 7, wherein the sub-metal layers of the first metal portion include Ti/Al/Ti sequentially on the gate electrode and the first fanout line;
the sub-metal layer of the second fan-out line comprises Ti/Al/Ti which are sequentially arranged on the grid and the first fan-out line, and the first metal layer is made of Mo.
9. The organic light-emitting diode display defined in claim 7 further comprising:
an interlayer insulating layer disposed on the first metal portion and the second fanout line; two first via holes are formed in the interlayer insulating layer;
and the third metal layer is arranged on the interlayer insulating layer and in the first through hole, comprises a source electrode and a drain electrode which are positioned in the display area, and the source electrode and the drain electrode are both connected with the active layer through the first through hole.
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| CN102799005A (en) * | 2012-09-07 | 2012-11-28 | 深圳市华星光电技术有限公司 | Design of fanout trace in TFT-LCD (thin film transistor-liquid crystal display) narrow frame design |
| KR102430348B1 (en) * | 2015-08-25 | 2022-08-08 | 삼성디스플레이 주식회사 | Liquid crystal display device and manufacturing method thereof |
| CN106707646A (en) * | 2017-02-07 | 2017-05-24 | 厦门天马微电子有限公司 | Array base plate and display panel |
| CN107121860B (en) * | 2017-06-14 | 2020-05-26 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
| CN108493226B (en) * | 2018-05-14 | 2021-04-30 | 上海天马有机发光显示技术有限公司 | Electronic equipment, display panel and preparation method thereof |
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