CN109410861A - Driver and display device - Google Patents
Driver and display device Download PDFInfo
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- CN109410861A CN109410861A CN201811415546.8A CN201811415546A CN109410861A CN 109410861 A CN109410861 A CN 109410861A CN 201811415546 A CN201811415546 A CN 201811415546A CN 109410861 A CN109410861 A CN 109410861A
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- 230000005669 field effect Effects 0.000 claims description 88
- 238000012545 processing Methods 0.000 claims description 18
- 230000005611 electricity Effects 0.000 claims description 6
- 238000012544 monitoring process Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 239000010409 thin film Substances 0.000 description 11
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a driver and a display device, wherein the driver comprises a first amplifier and a control circuit, and before a time schedule controller finishes initial configuration, the control circuit controls a scanning closing signal of a scanning signal to pass through the first amplifier; after the timing controller completes the initial configuration, the control circuit controls a scan-on signal and a scan-off signal of the scan signal to pass through the first amplifier. According to the technical scheme, the control circuit is arranged, so that only the scanning closing signal passes through the first amplifier before the time schedule controller completes initial configuration, and the display panel of the display device is not lightened; after the time schedule controller finishes the initial configuration, the scanning starting signal and the scanning closing signal can both pass through the first amplifier, and the display panel of the display device is controlled by normal driving, so that the problem of starting flicker of the display device is solved.
Description
Technical field
The present invention relates to field of display technology, in particular to a kind of driver and display device.
Background technique
Liquid crystal display (Liquid Crystal Display, LCD) is obtained because its is light-weight, thickness is thin, small power consumption
Be widely applied, such as: the display screen of LCD TV, the display screen of mobile phone, digital camera display screen, computer screen
Or laptop screen etc., it occupies an leading position in flat display field.
The type of liquid crystal display has very much, wherein with thin film transistor (TFT) (Thin Film Transistor) liquid crystal
Show that device is mainstream, Thin Film Transistor-LCD controls the input of scanning signal by a thin film transistor switch, in turn
Control picture is shown.The display screen drive system of Thin Film Transistor-LCD, which specifically includes that, claims grid drive chip (Gate
Driver Integrated Circuit, G-IC), source driving chip (Source Driver Integrated
Circuit, S-IC) and sequence controller (Timing Controller, TCON), the sequence controller receiving is from outside
Signal, and signal is passed into grid drive chip and source driving chip after treatment, then grid drive chip and
Source driving chip drives the display screen work of Thin Film Transistor-LCD.
Currently, Thin Film Transistor-LCD is in rigid booting, since sequence controller needs the regular hour to go to read
It takes external signal and completes the initial configuration setting of the register inside sequence controller, during this period of time, timing control
The problem of signal output of device processed plays pendulum, and Thin Film Transistor-LCD is easy to appear boot flash.
Summary of the invention
The main object of the present invention is to propose a kind of driver, it is intended to solve Thin Film Transistor-LCD and be easy to appear
The problem of boot flash.
To achieve the above object, the present invention proposes a kind of driver, is used for display device, and the driver includes:
First amplifier is swept for receiving the scanning signal of the sequence controller from the display device, and to described
It retouches signal and amplifies processing, the scanning signal includes scanning open signal and scanning shutdown signal；
Control circuit, it is complete in the sequence controller for monitoring the initial configuration completion status of the sequence controller
Before initial configuration, the scanning shutdown signal that the control circuit controls the scanning signal passes through first amplifier；
The sequence controller complete initial configuration after, the control circuit control the scanning signal scanning open signal and
It scans shutdown signal and passes through first amplifier.
Optionally, the control circuit have the first signal input part, second signal input terminal, third signal input part,
Fourth signal input terminal, the first signal output end and second signal output end, the sequence controller also export configuration status letter
Number；
First signal input part and the second signal input terminal are inputted for the scanning signal；The third signal
Input terminal and the fourth signal input terminal are inputted for the configuration status signal；First signal output end and described second
Signal output end is connect with first amplifier；
What the signal and three signal input part that the control circuit is inputted according to first signal input part inputted
Signal exports to control the signal of first signal output end, and according to the signal of second signal input terminal input and institute
The signal of four signal input parts input is stated to control the signal output of the second signal output end.
Optionally, the control circuit includes AND gate circuit and OR circuit, and the AND gate circuit is defeated with door with first
Enter end, second with door input terminal and and gate output terminal, the OR circuit have the first OR gate input end, the second OR gate input end
And or gate output terminal；
Described first forms first signal input part with door input terminal, and first OR gate input end forms described the
Binary signal input terminal, described second forms the third signal input part with door input terminal, and second OR gate input end is formed
The fourth signal input terminal, described to form first signal output end with gate output terminal, described or gate output terminal forms institute
State second signal output end.
Optionally, the control circuit further includes negater circuit, and the configuration status signal includes configuration status forward direction letter
Number and configuration status reverse signal, the sequence controller export the configuration status forward signal, the configuration status is positive
Signal forms the configuration status reverse signal by the negater circuit.
Optionally, first amplifier includes the first p type field effect transistor, the second p type field effect transistor, third
P type field effect transistor, the 4th p type field effect transistor, the first n type field effect transistor, the second n type field effect transistor,
Third n type field effect transistor and the 4th n type field effect transistor；
The input terminal of first p type field effect transistor and the second p type field effect transistor is electrically connected and forms
One power input；
The input terminal of the third p type field effect transistor and the 4th p type field effect transistor is electrically connected and forms
Two power inputs；
First n type field effect transistor, the second n type field effect transistor, third n type field effect transistor and the 4th
The input terminal electrical property of n type field effect transistor simultaneously forms third power input；
The output end of first p type field effect transistor and second n type field effect transistor and the 4th N-type
The controlled end of field effect transistor is electrically connected, and the output end of second p type field effect transistor and first N-type field are imitated
The controlled end of transistor and the third n type field effect transistor is answered to be electrically connected；
It is the controlled end of the output end of the third p type field effect transistor and the 4th p type field effect transistor, described
The output end of third n type field effect transistor is electrically connected；The output end of 4th p type field effect transistor and the third
The controlled end of p type field effect transistor, the 4th n type field effect transistor output end be electrically connected and form scanning signal
Output end；
The controlled end of first signal output end and first p type field effect transistor is electrically connected, and described second
The controlled end of signal output end and second p type field effect transistor is electrically connected.
Optionally, the driver further includes register, and the scanning signal first passes through the register, then passes to institute
State control circuit.
The present invention also proposes a kind of driver, is used for display device, and the driver includes:
First amplifier is swept for receiving the scanning signal of the sequence controller from the display device, and to described
It retouches signal and amplifies processing, the scanning signal includes scanning open signal and scanning shutdown signal；
Second amplifier is carried out for receiving the scanning signal from first amplifier, and to the scanning signal
Enhanced processing simultaneously exports；
Control circuit, it is complete in the sequence controller for monitoring the initial configuration completion status of the sequence controller
Before initial configuration, the scanning shutdown signal that the control circuit controls the scanning signal passes through first amplifier；
The sequence controller complete initial configuration after, the control circuit control the scanning signal scanning open signal and
It scans shutdown signal and passes through first amplifier；
Register receives the scanning signal of the sequence controller from the display device, for adjusting the scanning letter
Number outbound course, then pass to the control circuit.
The present invention also proposes a kind of display device, including
First driver；
Second driver；
Sequence controller is electrically connected with first driver and second driver；
Display panel, the scan line of the display panel and first driver are electrically connected, the display panel
Data line and second driver are electrically connected；
Wherein, first driver includes:
First amplifier is swept for receiving the scanning signal of the sequence controller from the display device, and to described
It retouches signal and amplifies processing, the scanning signal includes scanning open signal and scanning shutdown signal；
Control circuit, it is complete in the sequence controller for monitoring the initial configuration completion status of the sequence controller
Before initial configuration, the scanning shutdown signal that the control circuit controls the scanning signal passes through first amplifier；
The sequence controller complete initial configuration after, the control circuit control the scanning signal scanning open signal and
It scans shutdown signal and passes through first amplifier.
Optionally, the sequence controller also exports configuration status forward signal, and the sequence controller is completed initially
Before configuration, the configuration status forward signal is low level signal；The sequence controller is described to match after completing initial configuration
Setting state forward signal is high level signal.
Optionally, the sequence controller includes signal reading module, signal processing module and signal output module, described
Signal reading module is received and is read from external signal, and passes to the signal processing module, and signal passes through the letter
After number processing module conversion process, then exported by the signal output module.
Technical solution of the present invention is used to monitor the initial configuration of sequence controller by setting control circuit, control circuit
Completion status, before sequence controller completes initial configuration, the scanning shutdown signal of control circuit control scanning signal passes through
First amplifier；Sequence controller complete initial configuration after, control circuit control scanning signal scanning open signal and
It scans shutdown signal and passes through the first amplifier.Due to only scanning shutdown signal before sequence controller completes initial configuration
By the first amplifier, the display panel of display device not can be lit at this time；Initial configuration is completed in the sequence controller
Later, scanning open signal and scanning shutdown signal can by first amplifier, the display panel of display device by
It is controlled to the normal driving of the sequence controller and the first driver, to solve the problems, such as display device in boot flash.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
The structure shown according to these attached drawings obtains other attached drawings.
Fig. 1 is the circuit structure block diagram of one embodiment of the display device of that present invention；
Fig. 2 is the circuit structure block diagram of the first driver as shown in figure 1；
Fig. 3 is the physical circuit connection schematic diagram of control circuit and the first amplifier in Fig. 1.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiment is only a part of the embodiments of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
His embodiment, shall fall within the protection scope of the present invention.
It is to be appreciated that if relating to directionality instruction (such as up, down, left, right, before and after ...) in the embodiment of the present invention,
Then directionality instruction be only used for explain under a certain particular pose (as shown in the picture) between each component relative positional relationship,
Motion conditions etc., if the particular pose changes, directionality instruction is also correspondingly changed correspondingly.
In addition, being somebody's turn to do " first ", " second " etc. if relating to the description of " first ", " second " etc. in the embodiment of the present invention
Description be used for description purposes only, be not understood to indicate or imply its relative importance or implicitly indicate indicated skill
The quantity of art feature." first " is defined as a result, the feature of " second " can explicitly or implicitly include at least one spy
Sign.It in addition, the technical solution between each embodiment can be combined with each other, but must be with those of ordinary skill in the art's energy
It is enough realize based on, will be understood that the knot of this technical solution when conflicting or cannot achieve when occurs in the combination of technical solution
Conjunction is not present, also not the present invention claims protection scope within.
The present invention proposes a kind of driver and display device, the display device can be liquid crystal display, LCD TV or
Person's mobile phone etc. has the electronic device of display panel.
In one embodiment of this invention, as shown in Figure 1, the display device includes sequence controller 300, display panel
400, the second driver 200 and the first driver 100 etc..Wherein, the sequence controller 300 and second driver 200
And first driver 100 is electrically connected, the data line of second driver 200 and the display panel 400 electrically connects
It connects, the scan line of first driver 100 and the display panel is electrically connected.The sequence controller 300 includes signal
Read module, signal processing module and signal output module, the signal reading module are received and are read from external data
Signal, control signal and clock signal, and the signal processing module is passed to, these signals pass through the signal processing mould
Block is converted into being suitble to the data-signal of second driver 200 and first driver 100, control signal and clock letter
Number, then exported by the signal output module.
Specifically, as shown in Figures 2 and 3, first driver 100 includes register 10, the amplification of control circuit 20, first
Device 30 and the second amplifier 40 etc..The register 10 is used to adjust the outbound course of scanning signal, second amplifier 40
For promoting the driving capability of scanning signal.First amplifier 30 is for receiving the timing control from the display device
The scanning signal of device 300, and processing is amplified to the scanning signal.The scanning signal include scanning open signal A and
Scan shutdown signalThe scanning open signal A is high level signal, the scanning shutdown signalFor low level signal,
The scanning open signal A and the scanning shutdown signalReverse signal each other.The scanning open signal A control film is brilliant
The connection of the source electrode and drain electrode of body pipe (Thin Film Transistor, TFT), the scanning shutdown signalIt is brilliant to control film
The disconnection of the source electrode and drain electrode of body pipe.
The control circuit 20 is used to monitor the initial configuration completion status of the sequence controller 300, in the timing
Before controller 300 completes initial configuration, the control circuit 20 controls the scanning shutdown signal of the scanning signalPass through
First amplifier 30；After the sequence controller 300 completes initial configuration, the control circuit 20 controls described sweep
Retouch the scanning open signal A and scanning shutdown signal of signalPass through first amplifier 30.
Specifically, first driver 100 receives the scanning signal from sequence controller 300, the scanning signal
The register 10 is first passed to, is then passing to the control circuit 20 and first amplifier 30.In the timing
Before controller 300 completes initial configuration, the control circuit 20 controls the scanning shutdown signal of the scanning signalPass through
First amplifier 30；After the sequence controller 300 completes initial configuration, the control circuit 20 controls described sweep
Retouch the scanning open signal A and scanning shutdown signal of signalPass through first amplifier 30.By first amplifier
Scanning signal after 30 enhanced processings passes to second amplifier 40 again, and second amplifier 40 carries out scanning signal
Processing, to promote the driving capability of scanning signal.
Due to only scanning shutdown signal before the sequence controller 30 completes initial configurationPass through described first
Amplifier 30, that is, the display panel 400 of the display device not can be lit at this time, even if the sequence controller 300
The problem of signal output plays pendulum, and the display panel 400 that the display device will not occur flashes.When described
After sequence controller 300 completes initial configuration, scanning open signal A and scanning shutdown signalIt can be put by described first
Big device 30, normal driving control of the display panel 400 of display device by the sequence controller 300 and the first driver 100
System.
For technical solution of the present invention by setting control circuit 20, control circuit 20 is used to monitor the first of sequence controller 300
Begin configuration completion status, and before sequence controller 300 completes initial configuration, the scanning that control circuit 20 controls scanning signal is closed
Close signalPass through the first amplifier 30；After sequence controller 300 completes initial configuration, the control scanning letter of control circuit 20
Number scanning open signal A and scanning shutdown signalPass through the first amplifier 30.Due to being completed initially in sequence controller 300
Before configuration, shutdown signal is only scannedBy the first amplifier 30, the display panel 400 of display device will not be opened at this time
It opens；After the sequence controller 300 completes initial configuration, scanning open signal A and scanning shutdown signalIt can lead to
First amplifier 30 is crossed, the display panel 400 of display device is by the sequence controller 300 and the first driver 100
Normal driving control, thus solve the problems, such as display device booting when flash.
Specifically, as shown in Fig. 2, the control circuit 20 have the first signal input part 21, second signal input terminal 22,
Third signal input part 23, fourth signal input terminal 24, the first signal output end 25 and second signal output end 26.In order to realize
The control circuit 20 monitors the initial configuration completion status of the sequence controller 300, and the sequence controller 300 also exports
Configuration status signal, the configuration status signal include configuration status forward signal Ready and configuration status reverse signalThe configuration status forward signal Ready and configuration status reverse signalReverse signal each other.
It should be noted that the configuration status reverse signalIt can be generated in sequence controller 300, it can also
To be generated in first driver 100.In the present embodiment, as shown in Figures 2 and 3, the control circuit 20 further includes
Negater circuit F, the sequence controller 300 export the configuration status forward signal Ready, the configuration status forward signal
Ready forms the configuration status reverse signal by the negater circuit FThe configuration status forward signal
Ready and the configuration status reverse signalThe control circuit 20 is passed to, to realize the control circuit 20
Monitor the initial configuration completion status of the sequence controller 300.
It is appreciated that the negater circuit F can be set one, also can be set it is multiple, as long as can finally form institute
State configuration status reverse signalIn the present embodiment, the negater circuit F is only arranged one, so can simplify electricity
Road.
First signal input part 21 and the second signal input terminal 22 are inputted for the scanning signal, the third
Signal input part 23 and the fourth signal input terminal 24 are inputted for the configuration status signal, first signal output end 25
And the second signal output end 26 is connect with the amplifier.
It should be noted that when first signal input part 21 inputs the scanning open signal A, second letter
Number input terminal 22 inputs the scanning shutdown signalWhen first signal input part 21 inputs the scanning shutdown signal
When, the second signal input terminal 22 inputs the scanning open signal A.Similarly, when the third signal input part 23 inputs
When the configuration status forward signal Ready, the fourth signal input terminal 24 inputs the configuration status reverse signalWhen the third signal input part 23 inputs the configuration status reverse signalWhen, the fourth signal input
The 24 input configuration status forward signal Ready of end.
The signal and three signal input part 23 that the control circuit 20 is inputted according to first signal input part 21
The signal of input exports to control the signal of first signal output end 25, and is inputted according to the second signal input terminal 22
Signal and four signal input part 24 input signal come control the second signal output end 26 signal output.
More specifically, as shown in figure 3, the control circuit 20 includes AND gate circuit Y and OR circuit H, described and door electricity
Road Y have first with door input terminal, second with door input terminal and and gate output terminal, the OR circuit H have first or door it is defeated
Enter end, the second OR gate input end and or gate output terminal；
Described first forms first signal input part with door input terminal, and first OR gate input end forms described the
Binary signal input terminal, described second forms the third signal input part with door input terminal, and second OR gate input end is formed
The fourth signal input terminal, described to form first signal output end with gate output terminal, described or gate output terminal forms institute
State second signal output end.
It should be noted that in the present embodiment, the sequence controller 30 before completing initial configuration, match by output
Setting state forward signal Ready is low level signal, and the sequence controller 300 after completing initial configuration, match by output
Setting state forward signal Ready is high level signal, and described second inputs the configuration status forward signal with door input terminal
Ready, second OR gate input end input the configuration status reverse signal
It is appreciated that it is also possible to the sequence controller 300 before completing initial configuration in other embodiments,
The configuration status forward signal Ready of output be high level signal, the sequence controller 300 after completing initial configuration,
The configuration status forward signal Ready of output is low level signal, and described second is anti-with the door input terminal input configuration status
To signalSecond OR gate input end inputs the configuration status forward signal Ready.
The AND gate circuit Y and OR circuit H is basic logic gate circuit in integrated circuit, makes institute on the semiconductor
The technique for stating AND gate circuit Y and OR circuit H is also very mature, simple and easy to do.
It is appreciated that the AND gate circuit Y and OR circuit H can be set one or multiple, as long as being able to achieve described
The function of control circuit 20 in the present invention.In the present embodiment, the AND gate circuit Y and OR circuit H are respectively arranged one
It is a, to simplify circuit.
Further, in the present embodiment, as shown in figure 3, first amplifier 30 specifically includes the first p-type field-effect
Transistor M1, the second p type field effect transistor M2, third p type field effect transistor M5, the 4th p type field effect transistor M6,
One n type field effect transistor M3, the second n type field effect transistor M4, third n type field effect transistor M7 and the 4th N-type field effect
Answer transistor M8；The input terminal of the first p type field effect transistor M1 and the second p type field effect transistor M2 are electrically connected simultaneously
Form the first power input 32；The input terminal of the third p type field effect transistor M5 and the 4th p type field effect transistor M6
It is electrically connected and forms second source input terminal 33；The first n type field effect transistor M3, the second n type field effect transistor
M4, third n type field effect transistor M7 and the 4th n type field effect transistor M8 input terminal electrical property and form third power input
End 31；The output end and the second n type field effect transistor M4 and the 4th N of the first p type field effect transistor M1
The controlled end of type field effect transistor M 8 is electrically connected, the output end and the first N of the second p type field effect transistor M2
The controlled end of type field effect transistor M 3 and the third n type field effect transistor M7 are electrically connected；The third p-type field-effect
Controlled end, the third n type field effect transistor M7 of the output end of transistor M5 and the 4th p type field effect transistor M6
Output end be electrically connected；The output end of the 4th p type field effect transistor M6 and the third p type field effect transistor M5
Controlled end, the 4th n type field effect transistor M8 output end be electrically connected and form scanning signal output end OUT；Institute
The controlled end for stating the first signal output end and the first p type field effect transistor M1 is electrically connected, the second signal output
End and the controlled end of the second p type field effect transistor M2 are electrically connected.
First power input 32, second source input terminal 33 and third power input 31 with power management core
Piece (Power Management Integrated Circuit, PMIC) is electrically connected, and first power input 32 is used for
VDD level is inputted, the second source input terminal 33 is for inputting VGH level, and the third power input 31 is for inputting
VGL level.Wherein, the VGH level is higher than the level of the scanning open signal A, and the VGL level is closed lower than the scanning
Close the level of signal A.
In the present embodiment, before the sequence controller 300 completes initial configuration, due to described second and door input
Holding input always is low level signal, no matter described first with door input terminal input scanning open signal A or scan closing
Signal A, described to export low level signal always with gate output terminal, what is inputted always due to second OR gate input end is high electricity
Ordinary mail number, described no matter the input of first OR gate input end scans open signal or scans shutdown signal, and described or door is defeated
Outlet exports always high level signal.The height exported with the low level signal of gate output terminal output and described or gate output terminal
After level signal inputs first amplifier 30, the level of the scanning signal output end OUT output of first amplifier 30
For the scanning signal of VGL level, the source electrode and drain electrode of thin film transistor (TFT) is disconnected at this time, and the display panel 400 of display device will not
It is lit.After the sequence controller 300 completes initial configuration, it is with what door input terminal inputted always due to described second
High level signal, the letter that described first with the input of door input terminal are relied on the level height of the signal of gate output terminal output
Number, what is inputted always due to second OR gate input end is high level signal, the electricity of the signal of described or gate output terminal output
Flat height relies on the signal of first OR gate input end input, and the scanning open signal A passes through 20 He of control circuit
After first amplifier 30, level becomes VGH level；The scanning shutdown signal A passes through the control circuit 20 and institute
After stating the first amplifier 30, level becomes VGL level.The display panel 400 of the display device is by sequence controller 300
And the normal driving control of first driver 100.
The above description is only a preferred embodiment of the present invention, is not intended to limit the scope of the invention, all at this
Under the inventive concept of invention, using equivalent structure transformation made by description of the invention and accompanying drawing content, or directly/use indirectly
It is included in other related technical areas in scope of patent protection of the invention.
Claims (10)
1. a kind of driver, it to be used for display device, which is characterized in that the driver includes:
First amplifier is believed for receiving the scanning signal of the sequence controller from the display device, and to the scanning
Processing number is amplified, the scanning signal includes scanning open signal and scanning shutdown signal；
Control circuit is completed just for monitoring the initial configuration completion status of the sequence controller in the sequence controller
Begin before configuration, the scanning shutdown signal that the control circuit controls the scanning signal passes through first amplifier；Institute
After stating sequence controller completion initial configuration, the control circuit controls the scanning open signal and scanning of the scanning signal
Shutdown signal passes through first amplifier.
2. driver as described in claim 1, which is characterized in that the control circuit has the first signal input part, second
Signal input part, third signal input part, fourth signal input terminal, the first signal output end and second signal output end, it is described
Sequence controller also exports configuration status signal；
First signal input part and the second signal input terminal are inputted for the scanning signal；The third signal input
End and the fourth signal input terminal are inputted for the configuration status signal；First signal output end and the second signal
Output end is connect with first amplifier；
The control circuit is according to first signal input part signal inputted and the signal of three signal input part input
To control the signal output of first signal output end, and the signal and described four inputted according to the second signal input terminal
The signal of signal input part input exports to control the signal of the second signal output end.
3. driver as claimed in claim 2, which is characterized in that the control circuit includes AND gate circuit and OR circuit,
The AND gate circuit have first with door input terminal, second with door input terminal and and gate output terminal, the OR circuit have the
One OR gate input end, the second OR gate input end and or gate output terminal；
Described first forms first signal input part with door input terminal, and first OR gate input end forms second letter
Number input terminal, described second forms the third signal input part with door input terminal, and second OR gate input end forms described
Fourth signal input terminal, described to form first signal output end with gate output terminal, described or gate output terminal forms described the
Binary signal output end.
4. driver as claimed in claim 3, which is characterized in that the control circuit further includes negater circuit, the configuration
Status signal includes configuration status forward signal and configuration status reverse signal, and the sequence controller exports the configuration status
Forward signal, the configuration status forward signal form the configuration status reverse signal by the negater circuit.
5. such as the described in any item drivers of claim 2 to 4, which is characterized in that first amplifier includes the first p-type field
Effect transistor, the second p type field effect transistor, third p type field effect transistor, the 4th p type field effect transistor, the first N
Type field effect transistor, the second n type field effect transistor, third n type field effect transistor and the 4th n type field effect transistor；
The input terminal of first p type field effect transistor and the second p type field effect transistor is electrically connected and forms the first electricity
Source input terminal；
The input terminal of the third p type field effect transistor and the 4th p type field effect transistor is electrically connected and forms the second electricity
Source input terminal；
First n type field effect transistor, the second n type field effect transistor, third n type field effect transistor and the 4th N-type
The input terminal electrical property of field effect transistor simultaneously forms third power input；
The output end of first p type field effect transistor and second n type field effect transistor and the 4th N-type field are imitated
The controlled end of transistor is answered to be electrically connected, the output end of second p type field effect transistor and the first N-type field-effect are brilliant
The controlled end of body pipe and the third n type field effect transistor is electrically connected；
The controlled end of the output end of the third p type field effect transistor and the 4th p type field effect transistor, the third
The output end of n type field effect transistor is electrically connected；The output end of 4th p type field effect transistor and the third p-type
The controlled end of field effect transistor, the 4th n type field effect transistor output end be electrically connected and to form scanning signal defeated
Outlet；
The controlled end of first signal output end and first p type field effect transistor is electrically connected, the second signal
The controlled end of output end and second p type field effect transistor is electrically connected.
6. driver as described in claim 1, which is characterized in that the driver further includes register, the scanning signal
The register is first passed through, then passes to the control circuit.
7. a kind of driver, it to be used for display device, which is characterized in that the driver includes:
First amplifier is believed for receiving the scanning signal of the sequence controller from the display device, and to the scanning
Processing number is amplified, the scanning signal includes scanning open signal and scanning shutdown signal；
Second amplifier is amplified for receiving the scanning signal from first amplifier, and to the scanning signal
It handles and exports；
Control circuit is completed just for monitoring the initial configuration completion status of the sequence controller in the sequence controller
Begin before configuration, the scanning shutdown signal that the control circuit controls the scanning signal passes through first amplifier；Institute
After stating sequence controller completion initial configuration, the control circuit controls the scanning open signal and scanning of the scanning signal
Shutdown signal passes through first amplifier；
Register receives the scanning signal of the sequence controller from the display device, for adjusting the scanning signal
Outbound course, then pass to the control circuit.
8. a kind of display device, which is characterized in that including
First driver, for such as the described in any item drivers of claim 1-7；
Second driver；
Sequence controller is electrically connected with first driver and second driver；
Display panel, the scan line of the display panel and first driver are electrically connected, the data of the display panel
Line and second driver are electrically connected.
9. display device as claimed in claim 8, which is characterized in that the sequence controller also exports configuration status forward direction letter
Number, for the sequence controller before completing initial configuration, the configuration status forward signal is low level signal；The timing control
For device processed after completing initial configuration, the configuration status forward signal is high level signal.
10. display device as claimed in claim 8, which is characterized in that the sequence controller includes signal reading module, letter
Number processing module and signal output module, the signal reading module is received and is read from external signal, and passes to institute
Signal processing module is stated, signal exports after the signal processing module conversion process, then by the signal output module.
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| CN201811415546.8A CN109410861B (en) | 2018-11-23 | 2018-11-23 | Driver and display device |
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| CN201811415546.8A CN109410861B (en) | 2018-11-23 | 2018-11-23 | Driver and display device |
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| CN109410861B CN109410861B (en) | 2021-06-04 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110264971A (en) * | 2019-06-26 | 2019-09-20 | 京东方科技集团股份有限公司 | Anti- splashette circuit and method, driving circuit, display device |
| CN114038434A (en) * | 2021-11-09 | 2022-02-11 | 深圳创维－Rgb电子有限公司 | Power sequence control circuit and method for liquid crystal panel, liquid crystal panel and display device |
| WO2024221384A1 (en) * | 2023-04-28 | 2024-10-31 | 京东方科技集团股份有限公司 | Display driving circuit, driving method for display panel, and display apparatus |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101211036A (en) * | 2006-12-29 | 2008-07-02 | 群康科技(深圳)有限公司 | LCD device and its display method |
| CN102044223A (en) * | 2009-10-15 | 2011-05-04 | 瀚宇彩晶股份有限公司 | Liquid crystal display and driving method thereof |
| CN101866637B (en) * | 2010-06-13 | 2012-02-01 | 青岛海信电器股份有限公司 | Power-on time sequence control method for liquid crystal display equipment and television |
| US20140071172A1 (en) * | 2012-09-11 | 2014-03-13 | Apple Inc. | Reduced backlight turn on time |
| CN104683714A (en) * | 2015-02-04 | 2015-06-03 | 四川长虹电器股份有限公司 | Time sequence control method of two-stage V-BY-ONE signal system |
| CN104916263A (en) * | 2015-06-17 | 2015-09-16 | 深圳市华星光电技术有限公司 | Display panel and driving method thereof |
| CN106507013A (en) * | 2016-10-26 | 2017-03-15 | 青岛海信电器股份有限公司 | The control method of VBO signal transmissions, device and display terminal |
| CN107402460A (en) * | 2017-08-07 | 2017-11-28 | 京东方科技集团股份有限公司 | A kind of lighting control system plate, detection method and lighting detection means |
-
2018
- 2018-11-23 CN CN201811415546.8A patent/CN109410861B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101211036A (en) * | 2006-12-29 | 2008-07-02 | 群康科技(深圳)有限公司 | LCD device and its display method |
| CN102044223A (en) * | 2009-10-15 | 2011-05-04 | 瀚宇彩晶股份有限公司 | Liquid crystal display and driving method thereof |
| CN101866637B (en) * | 2010-06-13 | 2012-02-01 | 青岛海信电器股份有限公司 | Power-on time sequence control method for liquid crystal display equipment and television |
| US20140071172A1 (en) * | 2012-09-11 | 2014-03-13 | Apple Inc. | Reduced backlight turn on time |
| CN104683714A (en) * | 2015-02-04 | 2015-06-03 | 四川长虹电器股份有限公司 | Time sequence control method of two-stage V-BY-ONE signal system |
| CN104916263A (en) * | 2015-06-17 | 2015-09-16 | 深圳市华星光电技术有限公司 | Display panel and driving method thereof |
| CN106507013A (en) * | 2016-10-26 | 2017-03-15 | 青岛海信电器股份有限公司 | The control method of VBO signal transmissions, device and display terminal |
| CN107402460A (en) * | 2017-08-07 | 2017-11-28 | 京东方科技集团股份有限公司 | A kind of lighting control system plate, detection method and lighting detection means |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110264971A (en) * | 2019-06-26 | 2019-09-20 | 京东方科技集团股份有限公司 | Anti- splashette circuit and method, driving circuit, display device |
| CN110264971B (en) * | 2019-06-26 | 2022-01-04 | 京东方科技集团股份有限公司 | Anti-flash screen circuit and method, driving circuit and display device |
| US11605360B2 (en) | 2019-06-26 | 2023-03-14 | Hefei Boe Display Technology Co., Ltd. | Circuit and method for preventing screen flickering, drive circuit for display panel, and display apparatus |
| CN114038434A (en) * | 2021-11-09 | 2022-02-11 | 深圳创维－Rgb电子有限公司 | Power sequence control circuit and method for liquid crystal panel, liquid crystal panel and display device |
| CN114038434B (en) * | 2021-11-09 | 2023-03-07 | 深圳创维－Rgb电子有限公司 | Power sequence control circuit and method for liquid crystal panel, liquid crystal panel and display device |
| WO2024221384A1 (en) * | 2023-04-28 | 2024-10-31 | 京东方科技集团股份有限公司 | Display driving circuit, driving method for display panel, and display apparatus |
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|---|---|
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