CN109379812B

CN109379812B - LED automatic coding address circuit and coding method

Info

Publication number: CN109379812B
Application number: CN201811417553.1A
Authority: CN
Inventors: 张贤成; 周兴安
Original assignee: Wuxi Dechip Microelectronics Co ltd
Current assignee: Wuxi Dechip Microelectronics Co ltd
Priority date: 2018-11-26
Filing date: 2018-11-26
Publication date: 2024-02-27
Anticipated expiration: 2038-11-26
Also published as: CN109379812A

Abstract

The invention provides an LED automatic coding address circuit and a coding method. The LED automatic coding address circuit comprises: an encoding circuit; the field register is used for storing the field number of the data which the LED circuit needs to receive; the input end of the address register is connected with the output end of the decoding circuit; the input end of the adder is respectively connected with the field register and the address register, and the output end of the adder is connected with the input end of the coding circuit; the output end of the decoding circuit is connected with the input end of the address register. The automatic coding method of the LED address comprises the following steps: judging whether the LED sub-circuit is a first LED sub-circuit or not; if the LED sub-circuit is the first LED sub-circuit, setting the corresponding circuit address of the first LED sub-circuit to be 0; if the LED sub-circuit is not the first LED sub-circuit, the LED sub-circuit decodes the received signal and stores the decoded signal according to the bit; adding the circuit address of the LED sub-circuit and the number of required fields; and encoding and outputting the addition result information. The invention ensures that each LED circuit is automatically written to obtain the address after the installation is completed and the power-on is performed.

Description

LED automatic coding address circuit and coding method

Technical Field

The invention is suitable for the field of LED data transmission, and particularly relates to an LED automatic coding address circuit and a coding method.

Background

With the wide application of LEDs in various occasions and fields, market terminal customers have increasingly high requirements on the reliability of LED circuits. Products such as LED light bars, light strips, etc. that connect LED circuits in parallel, all LED circuits such as: the LED light bar, the light strip and other products are all connected in parallel on the data line of the main controller, generally two data lines are arranged, and the LED circuit obtains data sent by the main controller through the data lines.

Because all the LED circuits are connected in parallel on the data line, the data line is connected with a master controller, and the master controller sends data to the data line, each LED circuit must have an own address to obtain corresponding data from the data line. The method comprises the following steps: the data sent by the main controller consists of a plurality of fields, each LED circuit correspondingly receives one or more fields, each field corresponds to an address according to the output sequence, each LED circuit needs to have an own address, and the address of the LED circuit corresponds to the field address to be received by the LED circuit to normally receive the data. The method commonly used at present is that after the engineering installation is finished, the master controller uniformly performs write-once address operation, so that each LED circuit has an address, and meanwhile, the LED circuits solidify the received address to ensure that the engineering is not lost when the power is off.

However, the method has the defects that the engineering installation and debugging are troublesome, and the normal work can be realized only after the address writing operation is performed again because the installation is finished or part of the lamp bars are replaced at any time, so that the method is cumbersome and can be completed only by the presence of special technicians.

In view of this, it is necessary to propose a simpler and more reliable solution, reducing the engineering installation and debugging difficulty and saving the engineering installation and maintenance costs.

Disclosure of Invention

In order to solve the defects in the prior art, the invention provides an LED automatic coding address circuit and a coding method, wherein the LED automatic coding address circuit and the coding method can enable each LED circuit to automatically write and obtain an address after a power-on of an engineering installation completion system, and then smoothly enter a working state; any damaged LED circuit in the project can be replaced at any time, the replaced LED circuit can automatically write and acquire own address, and the project enters a normal working state after the automatic acquisition of the address is finished. Therefore, the engineering installation and maintenance are simple, and the engineering installation and maintenance can be completed without the presence of special technicians. The engineering installation and maintenance efficiency is greatly improved, and the installation and maintenance cost is further reduced.

According to the technical scheme provided by the invention, as a first aspect of the invention, an automatic coding address circuit of an LED is provided, and the automatic coding address circuit of the LED is arranged in an LED sub-circuit and comprises: an encoding circuit;

the field register is used for storing the field number of the data which the LED circuit needs to receive;

the input end of the address register is connected with the output end of the decoding circuit and is used for storing the circuit address decoded by the decoding circuit according to the bits;

the input end of the adder is respectively connected with the field register and the address register, and the output end of the adder is connected with the input end of the coding circuit;

and the output end of the decoding circuit is connected with the input end of the address register.

Further, the LED automatic coding address circuit comprises a plurality of LED sub-circuits, wherein a pull-up resistor is arranged in an input end PI of each LED sub-circuit, and each LED sub-circuit is respectively provided with the LED automatic coding address circuit; the input end of the LED sub-circuit is connected with the output end of the front LED sub-circuit, and the input end of the first LED sub-circuit is suspended; the output end of the LED sub-circuit is connected with the input end of the rear LED sub-circuit.

Further, the input end of the decoding circuit of each LED automatic coding address circuit is the input end of the corresponding LED sub-circuit; the output end of the coding circuit of each LED automatic coding address circuit is the output end of the corresponding LED sub-circuit.

Further, the decoding circuit includes:

the input end of the bit clock circuit is connected with the input end of the LED sub-circuit, and the output end of the bit clock circuit is connected with the clock signal input end of the address register;

the first LED sub-circuit judging circuit comprises a frequency-dividing circuit and a second counter; the input end of the LED sub-circuit is respectively connected with the frequency-dividing circuit and the reset end of the second counter circuit, the clock end of the frequency-dividing circuit is connected with the standard clock signal CLK, the output end of the frequency-dividing circuit is connected with one end of the OR gate I25 and one end of the AND gate I23, the output end of the second counter is connected with the other end of the OR gate I25 and the other end of the AND gate I23, the output end of the OR gate I25 is connected with the clock end of the second counter, and the output end of the AND gate I23 is connected with the input end of the pulse circuit I113;

and the reset circuit comprises a third counter, the input end of the LED sub-circuit is connected with the reset end of the third counter after being reversed, and the output end of the third counter is connected with the pulse circuit I112.

Further, the bit clock circuit includes: a pulse circuit and a fourth counter; the input end of the pulse circuit is the input end of the bit clock circuit, and the output end of the fourth counter is the output end of the bit clock circuit; the output end of the pulse circuit is connected with the reset end of the fourth counter in an inverted mode, the standard clock signal CLK is connected with the clock end of the fourth counter after the OR gate I207 is connected, and the output end of the fourth counter is connected with the other input end of the OR gate I207.

Further, the output end of the reset circuit and the output end of the first LED sub-circuit judging circuit are respectively connected with the input end of the OR gate I24, and the output end of the OR gate I24 is connected with the control end of the encoding circuit.

Further, the encoding circuit includes:

the data input end of the data buffer is connected with the output end of the adder;

the clock end of the first counter is connected with the output end of the coding circuit and is used for collecting and counting coding signals output by the coding circuit;

the input end of the clock circuit is connected with the output end of the latch, the input end of the latch is connected with the output end of the first counter, the output end of the clock circuit is connected with the clock ends of the trigger I406 and the trigger I404, and the input ends of the trigger I406 and the trigger I404 are connected with the output end of the data buffer.

Further, the data buffer is a 12-bit in-out shift register.

As a second aspect of the present invention, there is provided an LED address auto-coding method, which specifically includes the steps of:

judging whether the LED sub-circuit is a first LED sub-circuit or a non-first LED sub-circuit;

if the LED sub-circuit is the first LED sub-circuit, setting the corresponding circuit address of the first LED sub-circuit to be 0;

if the LED sub-circuit is a non-first LED sub-circuit, the LED sub-circuit decodes the received signal and stores the decoded signal according to the bit as a circuit address corresponding to the LED sub-circuit;

adding a circuit address corresponding to the LED sub-circuit and the field number of the LED sub-circuit needing to receive data;

and encoding and outputting the addition result information.

Further, the step of determining whether the LED sub-circuit is a first LED sub-circuit or a non-first LED sub-circuit specifically includes:

if the input end of the LED sub-circuit is continuously high level, confirming that the LED sub-circuit is a first LED sub-circuit and periodically sending out a pulse signal SHT;

if the input end of the LED sub-circuit is low level, the LED sub-circuit is confirmed to be a non-first LED sub-circuit, and pulse signals SHT are not sent periodically.

Further, if the low level at the input end of the LED sub-circuit is 250-350 mu s, a reset signal FRH is sent out.

Further, when the pulse signal SHT or the reset signal FRH is detected, the encoding operation of the LED sub-circuit is started, and after the circuit address corresponding to the first LED sub-circuit is set to 0, the data is stored in the address register, or the data obtained by decoding the non-first LED sub-circuit is stored as the address in the address register.

Further, the step of encoding and outputting the addition result specifically includes:

the addition result information is obtained in parallel, and a serial address signal SDO is output;

a clock signal SCK is provided, and the address signal SDO is encoded and output in accordance with the clock signal SCK.

Further, the step of encoding and outputting the address signal SDO in accordance with the clock signal SCK specifically includes: the three clock cycles of the clock signal SCK output one bit of data, and if the address signal SDO is 0, the encoded signal of this bit outputs a 1-cycle high level plus a 2-cycle low level, and if the data address signal SDO is 1, the encoded signal of this bit outputs a 2-cycle high level plus a 1-cycle low level.

From the above, the LED automatic coding address circuit and the coding method provided by the invention have the following advantages compared with the prior art: the LED automatic coding address circuit and the coding method can enable each LED circuit to automatically write and obtain an address after the power-on of the engineering installation completion system, and then smoothly enter a working state; any damaged LED circuit in the project can be replaced at any time, the replaced LED circuit can automatically write and acquire own address, and the project enters a normal working state after the automatic acquisition of the address is finished. Therefore, the engineering installation and maintenance are simple, and the engineering installation and maintenance can be completed without the presence of special technicians. The engineering installation and maintenance efficiency is greatly improved, and the installation and maintenance cost is further reduced.

Drawings

Fig. 1 is a functional block diagram of a first aspect of the present invention.

Fig. 2 is a schematic application diagram of the first aspect of the present invention.

Fig. 3 is a waveform diagram of the output of the LED sub-circuit according to the first aspect of the present invention.

Fig. 4 is a schematic diagram of a data code according to the first aspect of the present invention.

Fig. 5 is a schematic diagram of a decoding circuit according to a first aspect of the present invention.

Fig. 6 is a schematic diagram of a bit clock circuit in a decoding circuit according to a first aspect of the present invention.

Fig. 7 is a schematic diagram of an encoding circuit according to a first aspect of the present invention.

Fig. 8 is a schematic diagram of a data buffer according to a first aspect of the present invention.

Fig. 9 is a schematic diagram of an RSDF circuit in a data buffer according to a first aspect of the present invention.

Fig. 10 is a waveform diagram of a data decoding timing according to the first aspect of the present invention.

FIG. 11 is a timing diagram of the data encoding according to the first aspect of the present invention.

Fig. 12 is a flow chart of a second aspect of the present invention.

Fig. 13 is a flowchart of step S1 according to the second aspect of the present invention.

Fig. 14 is a flowchart of step S2 according to the second aspect of the present invention.

Fig. 15 is a flowchart of step S3 in the second aspect of the present invention.

Fig. 16 is a flowchart of a step S4 according to the second aspect of the present invention.

Detailed Description

The present invention will be further described in detail below with reference to specific embodiments and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent. Wherein like parts are designated by like reference numerals. It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to directions in the drawings. The words "inner" and "outer" are used to refer to directions toward or away from, respectively, the geometric center of a particular component.

As shown in fig. 2, the LED circuit includes a plurality of LED sub-circuits, respectively, IC0, IC1 and IC2, and the plurality of LED sub-circuits are connected in parallel to an output end of the main controller, where the main controller is configured to output data required by the LED sub-circuits, the data is composed of a plurality of fields, and each LED sub-circuit correspondingly receives one or more fields; and each field output by the master controller corresponds to a field address according to the output sequence of the fields, and the model number of the master controller is K-1000. Each LED sub-circuit receives the corresponding field according to its own address, so that each LED sub-circuit needs to be provided with a circuit for automatically encoding an address, and the output end of the preceding automatic encoding address circuit is connected to the input end of the following automatic encoding address circuit, and the input end of the first automatic encoding address circuit (i.e., the automatic encoding address circuit of IC 0) is suspended. As shown in fig. 2, the input end PI of each LED sub-circuit is the input end of the LED sub-circuit auto-code address circuit, and the output end PO is the output end of the LED sub-circuit auto-code address circuit.

As a first aspect of the present invention, there is provided an LED auto-code address circuit provided in each LED sub-circuit, respectively, wherein, taking the current LED auto-code address circuit (i.e., the auto-code address circuit of IC 1) as an example, it includes: the coding circuit is configured to generate a code signal,

the field register is used for storing the field number of the data which the current LED circuit needs to receive;

the address register is used for storing a circuit address corresponding to the current LED circuit;

the two input ends of the adder are respectively connected with the field register and the address register, the output end of the adder is used for being connected with the input end of the coding circuit of the current LED circuit, and the output end of the coding circuit is the output end of the automatic coding address circuit of the current LED; the adder is used for adding the circuit address corresponding to the current LED circuit and the field number of the data to be received, outputting the addition result to the coding circuit of the current LED circuit for coding, and the current LED circuit coding circuit codes according to the addition result and outputs the current LED circuit coding circuit to the following LED automatic coding address circuit (namely the automatic coding address circuit of the IC 2).

The input end of the decoding circuit is connected with the output end of the front LED automatic coding address circuit (namely the automatic coding address circuit of the IC 0); and the address register is used for receiving the address data coded and output by the prior LED automatic coding address circuit and decoding and outputting the address data to the current LED automatic coding address circuit. After the decoding circuit finishes decoding, a control signal DGO is also output to an encoder of the decoding circuit, so that the current LED automatic coding address circuit is controlled to start coding work.

As a first embodiment of the LED auto-code address circuit of the first aspect of the present invention: the decoding circuit includes:

the working principle of the bit clock circuit is as follows: the LED sub-circuit is used for processing each bit of data input by the input end PI of the LED sub-circuit and outputting a bit clock signal DCK; the method comprises the following steps: according to the data received from the input end PI of the LED sub-circuit and the standard clock signal CLK, a bit clock signal DCK corresponding to the data bit of the data input from the input end PI is decoded, and the bit clock signal DCK is output to an address register, and the bit clock signal DCK can enable the data received by the input end PI to be stored in the address register according to the bit.

As shown in fig. 5 and 6, the bit clock circuit has the following specific structure: the input end of the bit clock circuit is connected with the input end PI of the LED sub-circuit, the output end of the bit clock circuit is connected with the clock signal input end of the address register, and the bit clock circuit also receives the standard clock signal CLK provided in the first aspect of the invention. Specifically, as shown in fig. 6, the bit clock circuit includes a pulse circuit and a fourth counter; the input end of the pulse circuit is the input end of the bit clock circuit, and the output end of the fourth counter is the output end of the bit clock circuit. The output end of the pulse circuit is connected with the reset end of the fourth counter in an inverted mode, the pulse circuit enables the pulse circuit to generate a pulse signal on the rising edge of a received signal, the pulse signal is output to the NOT gate I206, and the output end of the NOT gate I206 is connected with the reset end of the fourth counter. The standard clock signal CLK is connected with the OR gate I207 and then is connected with the clock end of the fourth counter, and the output end of the fourth counter is connected with the other input end of the OR gate I207 and is used for controlling the fourth counter to stop working.

The working process of the bit clock circuit specifically comprises the following steps: a positive pulse received by the input end PI of the LED sub-circuit is used as one-bit data; when the fourth counter receives the pulse signal, the bit clock circuit starts to work and sets the output of the bit clock circuit to be low level, and meanwhile, the internal fourth counter is reset in a zero clearing mode and starts to count; when the fourth counter is full of 50-70 mu s according to the requirement, the output of the bit clock circuit is set to be high level, the high level enables the fourth counter to stop working through the OR gate I207, and the fourth counter can work again after receiving the pulse signal again and being reset.

The working principle of the first LED sub-circuit judging circuit is as follows: the first LED sub-circuit judging circuit is used for judging whether an LED sub-circuit is the first LED sub-circuit or not. The method comprises the following steps: and judging whether the input end PI of the LED sub-circuit is continuously high level, and if the input end PI of the LED sub-circuit is continuously high level, the LED sub-circuit is the first LED sub-circuit.

The first LED sub-circuit judging circuit comprises: a frequency dividing circuit and a second counter; the input end PI of the LED sub-circuit is respectively connected with the frequency-dividing circuit and the reset end of the second counter circuit, the clock end of the frequency-dividing circuit is connected with the standard clock signal CLK, the output end of the frequency-dividing circuit is connected with one end of the OR gate I25 and one end of the AND gate I23, the output end of the second counter is connected with the other end of the OR gate I25 and the other end of the AND gate I23, the output end of the OR gate I25 is connected with the clock end of the second counter, and the output end of the AND gate I23 is connected with the input end of the pulse circuit I113.

The working process of the first LED sub-circuit judging circuit comprises the following steps: detecting the time of the continuous high level of the input end PI through the frequency dividing circuit and the second counter, if the time of the continuous high level of the PI reaches a design value, confirming that the LED sub-circuit is a first LED sub-circuit, and outputting a high level signal through the second counter; the high signal output by the second counter enables the and gate I23 to be in an enabled state, and the high signal output by the second counter also stabilizes the second counter in this state through the or gate I25. After the second counter outputs the high level signal, the frequency divider circuit continues to work to generate the clock signal FCK, and the clock signal FCK is finally input to the pulse circuit I113 through the and gate I23, where the pulse circuit I113 generates a positive pulse signal SHT at the rising edge of the signal input to the pulse circuit I113, and the pulse signal SHT is generated at regular time as long as the input end PI of the circuit remains high level, and the SHT signal is generated every 4 ms.

And the reset circuit generates a reset signal FRH if the input end PI of the LED sub-circuit is in low level for a certain time. Specifically, the input end PI of the LED sub-circuit is connected to the reset end of the third counter after being inverted by the not gate I26, the output end of the third counter is connected to the pulse circuit I112, and the output end of the third counter is also connected to the or gate I22. If the input end PI of the LED sub-circuit continues to be low for a certain period of time, the third counter starts to operate and outputs a high-level signal from the output end of the third counter to enter the pulse circuit I112 after being full as required, the pulse circuit I112 will generate a pulse output reset signal FRH when the input end of the pulse circuit I112 jumps to a high level, and when the third counter outputs a high-level signal, the high-level signal controls the input clock of the third counter to stop operating through the or gate I22. The third counter is reset when the input PI of the LED sub-circuit has a high level to be re-operated again.

The output end of the reset circuit and the output end of the first LED sub-circuit judging circuit are respectively connected with the input end of the OR gate I24, the output end of the OR gate I24 is connected with the control end of the coding circuit, and when the OR gate I24 detects that the reset signal FRH or the pulse signal SHT appears, the OR gate I24 outputs a control signal DGO.

As a first embodiment of the LED auto-code address circuit of the first aspect of the present invention: the coding circuit is used for coding the addition result of the adder according to the bits and outputting the addition result through the output end PO of the LED sub-circuit.

Since the encoding circuit outputs data through the LED sub-circuit output terminal PO and the decoding circuit receives data from the input terminal PI, this is accomplished by the data code defined by the present invention. The data code is thus defined as a bit data period Tc of 90 microseconds, data consisting of a high level plus a low level, wherein the high level T0h of data 0 is 30 microseconds and the high level T1h of data 1 is 60 microseconds. The waveform diagram of the data code is shown in fig. 4.

Specifically, the encoding circuit includes:

the data input end of the data buffer is connected with the output end of the adder, the output end of the OR gate I24 is connected with the control end of the data buffer, and the control signal DGO output by the OR gate I24 controls the data buffer to be started; the data buffer is a 12-bit shift register structure which is connected in parallel AND in series, the control signal DGO loads the adder result data AND [11:0] into the data buffer at one time, AND the serial address signal SDO is output from the high-bit shift serial through the output end under the action of the clock signal of the data buffer.

The output end of the or gate I24 is connected with the reset end of the first counter in an inverted mode, and the control signal DGO output by the output end of the or gate I24 is responsible for resetting the first counter and enabling the first counter to start working. The coded signal output by the coding circuit is connected to the clock end of the first counter and used for counting the coded signal.

And the input end of the clock circuit is connected with the output end of the latch, the two input ends of the latch are respectively connected with the output end of the first counter and the output end of the OR gate I24, and the control signal DGO output by the OR gate I24 sets the enabling of the clock circuit to be 1 and enables the clock circuit to start working. When the clock circuit works, the clock circuit outputs a clock signal SCK, and the output end of the clock circuit is connected with the clock ends of the trigger I406 and the trigger I404; the clock signal SCK is 30 microseconds in period, the flip-flops I406 and I404 and other related logic gates output encoded signals under the action of the clock signal SCK, the three clock signals SCK output one bit of data in clock period, if the address signal SDO is 0, the encoded signal of this bit outputs 1 period high level plus 2 period low level, and if the data address signal SDO is 1, the encoded signal of this bit outputs 2 period high level plus 1 period low level. The output end PO of the LED sub-circuit outputs the next data to be output from the output end of the data buffer along the falling edge of the current data. The code timing waveform is shown in fig. 11.

The encoded signal is output and the first counter counts the output encoded signal, and when the first counter is full 12, the output control signal CN12 enables the clock circuit to stop working, namely PO continuously outputs 12-bit data, and then PO keeps low level. The whole working process of the coding circuit is finished.

As a second aspect of the present invention, there is provided an LED address auto-coding method, wherein the LED address auto-coding method specifically includes the steps of:

s1: judging whether the LED sub-circuit is a first LED sub-circuit or a non-first LED sub-circuit; the LED circuit may be regarded as a queue composed of a plurality of LED sub-circuits, and the first LED sub-circuit refers to an LED sub-circuit located at the first position of the queue composed of a plurality of LED sub-circuits, and the LED sub-circuits other than the first LED sub-circuit are non-first LED sub-circuits.

S2: if the LED sub-circuit is the first LED sub-circuit (i.e., the IC0 sub-circuit in fig. 2), the circuit address in the address register of the first LED sub-circuit is set to 0.

S210: adding a circuit address corresponding to the first LED sub-circuit and the field number of the first LED sub-circuit needing to receive data;

s220: encoding the addition result, and outputting the encoded addition result to an LED sub-circuit (namely an IC1 sub-circuit in FIG. 2) positioned behind the first LED sub-circuit;

s3: if the LED sub-circuit is a non-first LED sub-circuit (taking the IC1 sub-circuit in FIG. 2 as an example), the IC1 automatic coding address circuit receives the coding signal output by the IC0 automatic coding address circuit;

s310: decoding and outputting the received coded signals to an address register to serve as a circuit address corresponding to the IC1 sub-circuit;

s320: adding a circuit address corresponding to the IC1 sub-circuit and the field number of data to be received by the IC1 sub-circuit;

s4: and coding the addition result according to the bit, and outputting the coded addition result to an IC2 automatic coding address circuit.

Because the pull-up resistor is arranged in the input end PI of the LED sub-circuit, and the input end PI of the first LED sub-circuit is suspended, the PI is in a continuous high-level state, the input ends PI of other non-first LED sub-circuits are connected with the output end PO of the front LED sub-circuit, and the PI is in a low-level or data transmission state.

The S1: the step of judging whether the LED sub-circuit is a first LED sub-circuit or a non-first LED sub-circuit specifically comprises the following steps:

s110: detecting the PI state of the input end to judge whether the LED sub-circuit is a first LED sub-circuit or not;

if the continuous high level of the input end PI reaches 200-300 ms, confirming that the LED sub-circuit is a first LED sub-circuit, and periodically sending out a pulse signal SHT under the state that the PI is continuously kept at the high level;

s120: if the input end PI has low level within 200-300 ms, confirming that the LED sub-circuit is a non-first LED sub-circuit, and not periodically sending out a pulse signal SHT;

s130: if the input end PI has a low level after 200-300 ms is exceeded, the LED sub-circuit is confirmed to be changed from the state of the first LED sub-circuit to the state of the non-first LED sub-circuit, and the pulse signal SHT is not sent out periodically.

S140: if the low level of the input end PI is 250-350 mu s, a reset signal FRH is sent;

s150: when the pulse signal SHT or the reset signal FRH is detected, the coding work of the LED sub-circuit is started, and the step of storing the circuit address corresponding to the first LED sub-circuit into an address register after setting the circuit address to 0 or the step of storing the data obtained by decoding the non-first LED sub-circuit into the address register as the address is carried out.

Step S4: the step of encoding and outputting the addition result according to the bit specifically comprises the following steps:

s410: the addition result information is obtained in parallel, and a serial address signal SDO is output;

s420: providing a clock signal SCK, and encoding and outputting an address signal SDO according to the clock signal SCK; the step of encoding and outputting the address signal SDO in accordance with the clock signal SCK specifically comprises: the three clock cycles of the clock signal SCK output one bit of data, and if the address signal SDO is 0, the encoded signal of this bit outputs a 1-cycle high level plus a 2-cycle low level, and if the data address signal SDO is 1, the encoded signal of this bit outputs a 2-cycle high level plus a 1-cycle low level.

Those of ordinary skill in the art will appreciate that: the above embodiments are merely illustrative of the present invention and are not intended to limit the present invention, and any modifications, equivalent substitutions, improvements, etc. within the spirit of the present invention should be included in the scope of the present invention.

Claims

The automatic coding address circuit of LED, its characterized in that, automatic coding address circuit of LED locates in the LED sub-circuit, include: an encoding circuit;

the field register is used for storing the field number of the data which the LED circuit needs to receive;

the input end of the address register is connected with the output end of the decoding circuit and is used for storing the circuit address decoded by the decoding circuit according to the bits;

the input end of the adder is respectively connected with the field register and the address register, and the output end of the adder is connected with the input end of the coding circuit;

and the output end of the decoding circuit is connected with the input end of the address register.
2. The LED automatic coding address circuit according to claim 1, wherein the LED automatic coding address circuit comprises a plurality of LED sub-circuits, wherein a pull-up resistor is arranged in an input end PI of each LED sub-circuit, and the LED automatic coding address circuit is respectively arranged in each LED sub-circuit; the input end of the LED sub-circuit is connected with the output end of the front LED sub-circuit, and the input end of the first LED sub-circuit is suspended; the output end of the LED sub-circuit is connected with the input end of the rear LED sub-circuit.
3. The LED auto-coded address circuit of claim 2, wherein the input of the decoding circuit of each LED auto-coded address circuit is the input of its corresponding LED sub-circuit; the output end of the coding circuit of each LED automatic coding address circuit is the output end of the corresponding LED sub-circuit.
4. The LED auto-code address circuit of claim 1, wherein the decoding circuit comprises:

the input end of the bit clock circuit is connected with the input end of the LED sub-circuit, and the output end of the bit clock circuit is connected with the clock signal input end of the address register;

the first LED sub-circuit judging circuit comprises a frequency-dividing circuit and a second counter; the input end of the LED sub-circuit is respectively connected with the frequency-dividing circuit and the reset end of the second counter circuit, the clock end of the frequency-dividing circuit is connected with the standard clock signal CLK, the output end of the frequency-dividing circuit is connected with one end of the OR gate I25 and one end of the AND gate I23, the output end of the second counter is connected with the other end of the OR gate I25 and the other end of the AND gate I23, the output end of the OR gate I25 is connected with the clock end of the second counter, and the output end of the AND gate I23 is connected with the input end of the pulse circuit I113;

and the reset circuit comprises a third counter, the input end of the LED sub-circuit is connected with the reset end of the third counter after being reversed, and the output end of the third counter is connected with the pulse circuit I112.
5. The LED auto-code address circuit of claim 4, wherein the bit clock circuit comprises: a pulse circuit and a fourth counter; the input end of the pulse circuit is the input end of the bit clock circuit, and the output end of the fourth counter is the output end of the bit clock circuit; the output end of the pulse circuit is connected with the reset end of the fourth counter in an inverted mode, the standard clock signal CLK is connected with the clock end of the fourth counter after the OR gate I207 is connected, and the output end of the fourth counter is connected with the other input end of the OR gate I207.
6. The LED auto-code address circuit of claim 4, wherein the output terminal of the reset circuit and the output terminal of the first LED sub-circuit judgment circuit are connected to the input terminal of the or gate I24, respectively, and the output terminal of the or gate I24 is connected to the control terminal of the code circuit.
7. The LED auto-code address circuit of claim 1, wherein the code circuit comprises:

the data input end of the data buffer is connected with the output end of the adder;

the clock end of the first counter is connected with the output end of the coding circuit and is used for collecting and counting coding signals output by the coding circuit;

the input end of the clock circuit is connected with the output end of the latch, the input end of the latch is connected with the output end of the first counter, the output end of the clock circuit is connected with the clock ends of the trigger I406 and the trigger I404, and the input ends of the trigger I406 and the trigger I404 are connected with the output end of the data buffer.
8. The LED auto-coded address circuit of claim 7, wherein the data buffer is a 12-bit in-out shift register.
9. The automatic LED address coding method is characterized by comprising the following steps of:

judging whether the LED sub-circuit is a first LED sub-circuit or a non-first LED sub-circuit;

if the LED sub-circuit is the first LED sub-circuit, setting the corresponding circuit address of the first LED sub-circuit to be 0;

if the LED sub-circuit is a non-first LED sub-circuit, the LED sub-circuit decodes the received signal and stores the decoded signal according to the bit as a circuit address corresponding to the LED sub-circuit;

adding a circuit address corresponding to the LED sub-circuit and the field number of the LED sub-circuit needing to receive data;

and coding and outputting the addition result information according to the bits.
10. The LED address auto-coding method of claim 9, wherein there are a plurality of LED sub-circuits, the input of the first LED sub-circuit is suspended, and the inputs of the remaining LED sub-circuits are connected to the output of the preceding LED sub-circuit; the output end of the LED sub-circuit is connected with the input end of the rear LED sub-circuit.
11. The method for automatically encoding an LED address according to claim 10, wherein the step of determining whether the LED sub-circuit is a first LED sub-circuit or a non-first LED sub-circuit comprises:

if the input end of the LED sub-circuit is continuously high level, confirming that the LED sub-circuit is a first LED sub-circuit and periodically sending out a pulse signal SHT;

if the input end of the LED sub-circuit is low level, the LED sub-circuit is confirmed to be a non-first LED sub-circuit, and pulse signals SHT are not sent periodically.
12. The method of claim 11, wherein the reset signal FRH is sent if the low level at the input of the LED sub-circuit is 250-350 μs.
13. The method of automatic LED address coding according to claim 12, wherein when the pulse signal SHT or the reset signal FRH is detected, the coding operation of the LED sub-circuit is started, and the step of storing the circuit address corresponding to the first LED sub-circuit in its address register after setting 0 or the step of storing the data decoded by the non-first LED sub-circuit in its address register as the circuit address is performed.
14. The method for automatically encoding an LED address according to claim 9, wherein the step of encoding and outputting the addition result comprises:

the addition result information is obtained in parallel, and a serial address signal SDO is output;

a clock signal SCK is provided, and the address signal SDO is encoded and output in accordance with the clock signal SCK.
15. The LED address auto-coding method according to claim 14, wherein the step of coding and outputting the address signal SDO according to the clock signal SCK comprises: the three clock cycles of the clock signal SCK output one bit of data, and if the address signal SDO is 0, the encoded signal of this bit outputs a 1-cycle high level plus a 2-cycle low level, and if the data address signal SDO is 1, the encoded signal of this bit outputs a 2-cycle high level plus a 1-cycle low level.