CN109346515B

CN109346515B - A silicon carbide insulated gate bipolar transistor

Info

Publication number: CN109346515B
Application number: CN201811357021.3A
Authority: CN
Inventors: 陈万军; 谯彬; 高吴昊; 张柯楠; 夏云; 刘超
Original assignee: University of Electronic Science and Technology of China
Current assignee: University of Electronic Science and Technology of China
Priority date: 2018-11-15
Filing date: 2018-11-15
Publication date: 2021-06-08
Anticipated expiration: 2038-11-15
Also published as: CN109346515A

Abstract

The invention relates to power semiconductor technology, in particular to a silicon carbide insulating gate bipolar transistor. The present invention transforms the cathode region of the conventional silicon carbide IGBT by adding an N-IEB layer (N type-Injection Enhanced Buffer layer, N-type injection enhanced buffer layer) under the P+ field stop layer, since the N-type injection enhances the buffer layer The lower doping concentration of the layer increases the lifetime and mobility of minority carriers in this region, thereby increasing the diffusion length of minority carriers in the cathode structure, thereby increasing the cathode injection efficiency. And since a built-in electric field is generated between the N-type substrate and the N-type injection enhancement buffer layer due to the concentration difference, its direction is from the N-type substrate to the N-type injection enhancement buffer layer, preventing minority holes from being enhanced by the N-type injection buffer layer. The layer diffuses to the N-type substrate, thereby reducing the minority hole diffusion current, which in turn increases the cathode injection efficiency.

Description

Silicon carbide insulated gate bipolar transistor

Technical Field

The invention belongs to the technical field of power semiconductors, and particularly relates to a silicon carbide insulated gate bipolar transistor

Background

The insulated gate bipolar transistor is a well-developed power electronic device and is widely applied to the fields of high-power occasions such as alternating current motors, frequency converters, switching power supplies, lighting circuits, traction transmission and the like. Insulated gate bipolar transistors are also an important device for use in pulsed power technology.

An Insulated Gate Bipolar Transistor (IGBT) is a mixed power electronic device consisting of a power MOS field effect transistor and a bipolar transistor, and has the characteristic of combining MOS with MOS input and bipolar output functions, the MOSFET structure is used for providing base driving current for the bipolar junction transistor, and the bipolar junction transistor modulates the conductivity of a drift region of the MOSFET structure, so that the IGBT has the advantages of high input impedance, small control power, simple driving circuit, high switching speed and small switching loss of the MOSFET, has the advantages of large current density, low saturation voltage and strong current processing capacity of the bipolar power transistor, and is an ideal switch device in the field of power electronics. The silicon-based IGBT needs to be used in parallel in some systems with large current and high power density, and the volume and the energy consumption of the systems are increased. The blocking voltage capability, dv/dt and di/dt capability of silicon-based IGBTs have approached their theoretical limits. Compared with Si materials, the wide bandgap SiC material has higher bandgap width, saturated carrier velocity, critical breakdown electric field and thermal conductivity, so that the performance of the SiC material IGBT is greatly superior to that of the Si-based IGBT. However, due to the limitations of the current technological level and material properties, the carrier mobility and carrier lifetime of SiC materials are low, so that the cathode injection efficiency of conventional SiC IGBT devices is low, the on-resistance of the devices is high, and the improvement of the device performance is limited. For most power devices such as IGBTs, reducing conduction loss is particularly important.

Disclosure of Invention

The invention aims to provide a silicon carbide insulated gate bipolar transistor aiming at the problems of low injection efficiency of an N-type cathode and larger forward conducting resistance of the conventional silicon carbide insulated gate bipolar transistor.

The technical scheme of the invention is as follows: a silicon carbide insulated gate bipolar transistor comprises a unit cell structure, a cathode metal 1, an N + substrate layer 11, an N + substrate defect suppression buffer layer 12, a P + field stop layer 3 and a P-drift region 4 which are sequentially stacked from bottom to top; the upper layer of the P-drift region 4 is provided with an N well region 5, the upper layer of the N well region 5 is provided with a P + source region 6 and an N + ohmic contact region 7 which are arranged in parallel, wherein the N + ohmic contact region 7 is positioned at the outer side; a metal layer 9 is arranged on the upper surface of the N + ohmic contact region 7 and the upper surface of part of the P + source region 6, an oxide layer 10 is arranged on the surface of the rest part of the P + source region 6, the oxide layer 10 extends along the surface of the device to one side far away from the N + ohmic contact region 7, the surfaces of the N well region 5 and the P-drift region 4 are sequentially covered, and a gate metal 14 is arranged on the upper layer of the oxide layer 10 which is positioned on the surface of part of the P + source region 6, the N well region 5 and the P-drift region 4;

the cathode structure is characterized in that an N-injection enhanced buffer layer 13 is further arranged between the P + field stop layer 3 and the N + substrate defect suppression buffer layer 12, and the doping concentration of the N-injection enhanced buffer layer 13 is lower than that of the P + field stop layer 3 and is used for increasing the minority carrier diffusion length in the cathode structure and further increasing the cathode injection efficiency.

Furthermore, the thickness range of the N-injection enhanced buffer layer 13 is 2-20 μm, and the doping concentration range is 1e 16-1 e18cm^-3。

The characteristics of the N-type IGBT are the same as those of the P-type IGBT, and the doping types are opposite.

The cathode region of the conventional silicon carbide IGBT is improved, the N-type-Injection Enhanced Buffer layer 13 is additionally arranged below the P + field stop layer 3, and the doping concentration of the N-type-Injection Enhanced Buffer layer 13 is low, so that the service life and the mobility of minority carriers in the region are improved, the diffusion length of the minority carriers in the cathode structure is increased, and the cathode Injection efficiency is further improved. And because a built-in electric field is generated between the N-type substrate 2 and the N-type injection enhanced buffer layer 13 due to concentration difference, the direction of the built-in electric field points to the N-type injection enhanced buffer layer 13 from the N-type substrate 2, and minority carrier holes are prevented from diffusing to the N-type substrate 2 from the N-type injection enhanced buffer layer 13, so that the diffusion current of the minority carrier holes is reduced, and the injection efficiency of the cathode is further improved. The cathode injection efficiency is increased due to the two reasons, so that the current amplification factor of an NPN triode formed by the N well region, the P-type drift region structure and the N-type cathode structure is increased, the on-resistance of the device in conduction is reduced, and the power consumption of the device is reduced.

Drawings

FIG. 1 is a schematic diagram of a conventional SiC IGBT cell structure;

FIG. 2 is a schematic diagram of a first implementation of the SiC IGBT cell structure of the present invention;

FIG. 3 is a schematic diagram of an implementation scheme of an N-type structure of an SiC IGBT cellular unit of the invention;

FIG. 4 is a schematic diagram of a second implementation of the SiC IGBT cell structure of the present invention;

FIG. 5 is a schematic diagram of a third implementation of the SiC IGBT cell structure of the present invention;

FIG. 6 is a schematic diagram of a fourth implementation of the SiC IGBT cell structure of the present invention;

FIG. 7 is a simulation comparison graph of forward conduction characteristics of the SiC IGBT of the present invention and a conventional SiC IGBT;

FIG. 8 is a graph showing a comparison of transfer characteristics of the SiC IGBT of the present invention and a conventional SiC IGBT;

Detailed Description

The invention is described in detail below with reference to the attached drawing

As shown in fig. 2, the silicon carbide insulated gate bipolar transistor of the present invention is a silicon carbide insulated gate bipolar transistor, and the cell structure thereof includes an anode structure, a drift region structure, a gate structure and a cathode structure; for a P-type silicon carbide insulated gate bipolar transistor, the anode structure of the P-type silicon carbide insulated gate bipolar transistor comprises an N + ohmic contact region 7, a P + source region 6 on the right side of the N + ohmic contact region, and a metal layer 9 on the upper surfaces of the N + ohmic contact region 7 and the P + source region; the grid structure comprises an N well region 5, an oxide layer 10 above the N well and grid metal 8, wherein a P + source region 6 and an N + ohmic contact region 7 in the anode structure are positioned in the N well region 5; the drift region structure comprises a P & lt- & gt drift region 4 and a P & lt + & gt field stop layer 3 below the P & lt- & gt drift region 4; the cathode structure is mainly positioned below the P + field stop layer 3, and sequentially comprises an N-injection enhanced buffer layer (N-IEB layer) 13, an N-type substrate 2 and cathode metal 1 from top to bottom, compared with the traditional cathode structure, the cathode structure is additionally provided with the N-injection enhanced buffer layer (N-IEB layer) 13, and the cathode structure is characterized in that the N-type doped silicon carbide epitaxial layer has the thickness range of 2-20 mu m and the doping concentration range of 1e 16-1 e18cm^-3。

The N-type substrate 2 comprises an N + substrate defect suppression buffer layer 12 and an N + substrate layer 11;

specific implementations of the N-implantation enhancement buffer layer 13 include, but are not limited to, the following two, the first is to epitaxially grow the N-implantation enhancement buffer layer 13 directly on the N + substrate 2; the second is to achieve the doping concentration and thickness required for the N-implant enhancement buffer layer 13 by changing the epitaxial conditions of the N-substrate defect suppression buffer layer 12 in the N + substrate 2, as shown in fig. 3. Meanwhile, the N + substrate can be shortened by CMP (chemical mechanical polishing) or the like, and the shortened schematic view is shown in fig. 5 and 6. The characteristics of the N-type IGBT are the same as those of the P-type IGBT, and the doping types are opposite.

As shown in FIG. 1, the conventional silicon carbide IGBT is shown, and the N + substrate defect suppression buffer layer 12 is shown here asA buffer layer epitaxially grown in advance for preventing the defects on the surface of the N + substrate layer 11 from affecting the quality of the epitaxial layer, and the doping concentration of the buffer layer is generally 1 × 10¹⁸cm^-3About an order of magnitude and a thickness of about 1 to 5 μm. The invention is different from the conventional silicon carbide IGBT structure in that the cathode region is reformed, and an N-type epitaxial layer (N-type-Injection Enhanced Buffer layer) with the doping concentration lower than that of an N + substrate and a conventional N + substrate defect suppression Buffer layer is added on the conventional device cathode structure. As shown in FIG. 2, the N-IEB layer 13 can be obtained by epitaxial growth on the N + substrate defect suppression buffer layer 11, and has a thickness of 2-20 μm and a doping concentration of 1e 16-1 e18cm^-3Optimization within this range is required to achieve better results. For a conventional P-type silicon carbide IGBT, due to the fact that the doping concentration of an N substrate is large, the service life and the mobility of minority carriers are low, the cathode injection efficiency is low, and due to the fact that the N-IEB layer 13 exists, the doping concentration of the N-IEB layer is low, the service life and the mobility of the minority carriers in the region are improved, the diffusion length of the minority carriers in a cathode structure is increased, the cathode injection efficiency is further increased, the on-resistance of a device is reduced, and meanwhile the transconductance of the device is increased. The N-IEB layer of the silicon carbide IGBT adopts an epitaxial process, and the process is simple to realize.

The silicon carbide IGBT provided by the invention has the following working principle:

in the cell structure shown in fig. 2, due to the low doping concentration of the N-IEB layer 13, the minority carrier lifetime and mobility in the region are improved, so that the minority carrier diffusion length in the cathode structure is increased, and further, the cathode injection efficiency is increased. And because a built-in electric field is generated between the N + substrate 2 and the N-IEB layer 13 due to concentration difference, the direction of the built-in electric field points to the N-IEB layer 13 from the N + substrate 2, and minority carrier holes are prevented from being diffused to the N + substrate 2 from the N-IEB layer 13, so that the diffusion current of the minority carrier holes is reduced, and the injection efficiency of the cathode is further increased. The cathode injection efficiency is increased due to the two reasons, so that the current amplification factor of an NPN triode formed by the N-type gate electrode, the P-type drift region and the N-type cathode is increased, the on-resistance of the device in conduction is reduced, and the power consumption of the device is reduced.

Conventional silicon carbide IGBT with P-type drift region width of 55 μm and silicon carbide IGBT of the invention (N-IEB layer with thickness of 7 μm and doping concentration of 1e17cm^-3) For example, output characteristics and transfer characteristics are compared in simulation, and a comparison result is shown in fig. 7 and 8, which shows that compared with the conventional structure, the transconductance of the silicon carbide IGBT is larger, and the conduction voltage drop of the silicon carbide IGBT is significantly smaller than that of the conventional silicon carbide IGBT when the device is turned on.

The device structure parameters and simulation results listed in the specification are only for helping the reader to understand the principle of the present invention and to explain the advantages of the present invention, and do not represent that the optimization has been achieved, and those skilled in the art can obtain better effects by optimizing the parameters of the present invention. It should be understood by those skilled in the art that various equivalents and modifications may be made based on the present invention and that they are within the scope of the present invention as claimed.

Claims

1. A silicon carbide insulated gate bipolar transistor, the cell structure comprising a cathode metal (1), an N+ substrate layer (11), an N+ substrate defect suppression buffer layer (12), a P+ A field stop layer (3) and a P-drift region (4); the upper layer of the P-drift region (4) has an N-well region (5), and the upper layer of the N-well region (5) has a P+ source region (6) arranged in parallel and an N+ ohmic contact region (7), wherein the N+ ohmic contact region (7) is located on the outside; a metal layer (9) is provided on the upper surface of the N+ ohmic contact region (7) and part of the upper surface of the P+ source region (6), and the P+ source The surface of the remaining part of the region (6) has an oxide layer (10), and the oxide layer (10) extends along the surface of the device to the side away from the N+ ohmic contact region (7), covering the N well region (5) and the P-drift region in turn (4) surface, with gate metal (14) on the oxide layer (10) covering part of the P+ source region (6), the N well region (5) and the surface of the P-drift region (4);

It is characterized in that, there is also an N-implantation enhancement buffer layer (13) between the P+ field stop layer (3) and the N+ substrate defect suppression buffer layer (12), and the N-implantation enhancement buffer layer (13) has an N-implantation enhancement buffer layer (13). The doping concentration is lower than the doping concentration of the P+ field stop layer (3), which is used to increase the diffusion length of minority carriers, thereby increasing the cathode injection efficiency.

2 . The silicon carbide insulated gate bipolar transistor according to claim 1 , wherein the N-implantation enhancement buffer layer ( 13 ) has a thickness ranging from 2 to 20 μm, and a doping concentration ranging from 1e16 to 10 μm. 3 . 1e18cm ^-3 .