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CN109262447A - 研磨元件、研磨轮及使用研磨轮制造半导体封装的方法 - Google Patents

研磨元件、研磨轮及使用研磨轮制造半导体封装的方法 Download PDF

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Publication number
CN109262447A
CN109262447A CN201710723477.6A CN201710723477A CN109262447A CN 109262447 A CN109262447 A CN 109262447A CN 201710723477 A CN201710723477 A CN 201710723477A CN 109262447 A CN109262447 A CN 109262447A
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China
Prior art keywords
grinding
chip
abrasive
microns
particle
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Granted
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CN201710723477.6A
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CN109262447B (zh
Inventor
茅超
茅一超
张进传
林俊成
张文华
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24D—TOOLS FOR GRINDING, BUFFING OR SHARPENING
    • B24D7/00—Bonded abrasive wheels, or wheels with inserted abrasive blocks, designed for acting otherwise than only by their periphery, e.g. by the front face; Bushings or mountings therefor
    • B24D7/06—Bonded abrasive wheels, or wheels with inserted abrasive blocks, designed for acting otherwise than only by their periphery, e.g. by the front face; Bushings or mountings therefor with inserted abrasive blocks, e.g. segmental
    • B24D7/066—Grinding blocks; their mountings or supports
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24D—TOOLS FOR GRINDING, BUFFING OR SHARPENING
    • B24D7/00—Bonded abrasive wheels, or wheels with inserted abrasive blocks, designed for acting otherwise than only by their periphery, e.g. by the front face; Bushings or mountings therefor
    • B24D7/06—Bonded abrasive wheels, or wheels with inserted abrasive blocks, designed for acting otherwise than only by their periphery, e.g. by the front face; Bushings or mountings therefor with inserted abrasive blocks, e.g. segmental
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Abstract

提供一种安装在研磨轮上的研磨元件以及一种含有所述研磨元件的研磨轮用于进行研磨。所述研磨元件包括研磨齿，且所述研磨齿包含研磨材料，所述研磨材料具有框架结构以及分布在所述框架结构中的孔隙。所述框架结构包含粘合材料及由所述粘合材料粘合的磨料微粒。所述孔隙的孔径大于40微米但小于70微米。还提供一种使用所述研磨轮制造半导体封装的方法。

Description

研磨元件、研磨轮及使用研磨轮制造半导体封装的方法
背景技术
研磨是用于薄化半导体晶片的管芯并减小半导体封装的厚度的一种最常用的技术。由于许多集成电路及电子装置是自半导体晶片制造而成，因此受控良好的晶片薄化或封装薄化对装置性能及可靠性是有利的且有价值的。
发明内容
一种研磨轮的研磨元件包括研磨齿。所述研磨齿包含研磨材料。所述研磨材料具有：框架结构，包含磨料微粒及粘合所述磨料微粒的粘合材料；以及孔隙，分布在所述框架结构中。所述孔隙的孔径大于40微米且小于70微米。
附图说明
结合附图阅读以下详细说明，会最好地理解本发明的各个方面。应注意，根据本行业中的标准惯例，各种特征并非按比例绘制。事实上，为论述清晰起见，可任意增大或减小各种特征的尺寸。
图1A是说明根据本发明一些示例性实施例的研磨轮的示意性仰视图。
图1B是说明根据本发明一些示例性实施例的研磨轮的一部分的示意性三维图。
图1C是说明根据本发明一些示例性实施例的研磨轮的一部分的示意性剖视图。
图1D是说明根据本发明一些示例性实施例的研磨轮的研磨齿的一部分的示意性放大剖视图。
图2是示出在根据本发明一些示例性实施例的半导体封装的制造工艺中，待研磨的晶片之上的研磨轮的相对研磨轨迹的示意性俯视图。
图3A至图3H是在根据本发明一些示例性实施例的半导体封装的制造工艺中的各阶段的示意性剖视图。
图4A至图4B是根据本发明一些示例性实施例的研磨轮的研磨齿的大孔隙研磨材料的局部微观图。
图5A至图5B是研磨轮的研磨齿的对比研磨材料的局部微观图。
符号的说明
30：半导体封装
100：研磨轮
102：环形金属基底
102a：环形金属基底的底表面
103：外缘部分
104：内缘部分
105：孔
110：研磨齿
110a：研磨齿的下表面/接触表面
302：载体
304：缓冲层
310：芯片
310a：有源表面
312：接垫
314：金属柱
316：介电材料
320：层间穿孔
320a：层间穿孔的顶表面
350：模制化合物
350a：模制化合物的顶表面
360：重布线层
370：导电元件
380：载体膜
1100：研磨材料
1102：磨料微粒
1104：粘合材料
CA：接触区域
P：节距
PV：孔隙
W：晶片
具体实施方式
以下公开内容提供用于实作所提供主题的不同特征的许多不同的实施例或实例。以下阐述组件及排列的具体实例以简化本公开内容。当然，这些仅为实例且不旨在进行限制。例如，以下说明中将第一特征形成在第二特征“之上”或第二特征“上”可包括其中第一特征及第二特征被形成为直接接触的实施例，且也可包括其中第一特征与第二特征之间可形成有附加特征、进而使得所述第一特征与所述第二特征可能不直接接触的实施例。另外，本公开内容可能在各种实例中重复使用参考编号及/或字母。这种重复使用是出于简洁及清晰的目的，而不是自身表示所论述的各种实施例及/或配置之间的关系。
此外，为易于说明，本文中可能使用例如“之下(beneath)”、“下面(below)”、“下部的(lower)”、“上方(above)”、“上部的(upper)”等空间相对性用语来阐述图中所示的一个元件或特征与另一(其他)元件或特征的关系。所述空间相对性用语旨在除图中所绘示的取向外还囊括装置在使用或操作中的不同取向。设备可具有其他取向(旋转90度或处于其他取向)且本文中所用的空间相对性描述语可同样相应地进行解释。
图1A是说明根据本发明一些示例性实施例的研磨轮的示意性仰视图。图1B是说明根据本发明一些示例性实施例的研磨轮的一部分的示意性三维图。图1C是说明根据本发明一些示例性实施例的研磨轮的一部分的示意性剖视图。图1D是说明根据本发明一些示例性实施例的研磨轮的研磨齿的一部分的示意性放大剖视图。
参照图1A至图1C，在一些实施例中，研磨轮100包括环形金属基底102及安装在金属基底102的底表面102a上的多个研磨齿110。在一些实施例中，研磨轮100可进一步包括结构性增强元件或应力或冲击吸收层。在一些实施例中，金属基底102的材料包括铝、钢、钼、钼合金、钛、或钛合金。在一些实施例中，研磨齿充当安装在研磨轮的基底(主体)上的研磨元件，以朝待研磨的结构/层施加研磨能力。在一些实施例中，研磨齿110可排列在环形金属基底102的底表面102a上并排列在环形金属基底102的外缘部分103上。在一些实施例中，环形金属基底102可具有排列在环形金属基底102的内缘部分104处的孔105。在一些实施例中，多个研磨齿110彼此分隔开且如图1C所示彼此之间以均匀节距P并排排列。在一些实施例中，仅使用一种类型的研磨齿，且研磨齿110可以均匀节距P排列。根据一些实施例，可基于产品设计或对研磨能力的要求来修改节距P。在替代实施例中，可以不同节距来排列各种类型的研磨齿。在一些实施例中，研磨齿110被成形为砖状矩形块，且多个研磨齿110沿环形金属基底102的外缘部分103短边与短边并排排列。在图1C中，在某些实施例中，研磨齿110的下表面110a是在研磨工艺期间的接触表面，且接触表面110a将与待研磨的晶片的晶片表面直接接触。也就是说，研磨齿110在研磨工艺期间充当研磨器。图2是示出在根据本发明一些示例性实施例的半导体封装的制造工艺中，待研磨的晶片之上的研磨轮的相对研磨轨迹的示意性俯视图。如图2所示，当研磨轮100沿特定方向(标记为箭头)朝晶片W移动时，由于排列在金属基底102的底表面上的一些研磨齿110直接接触晶片表面，因此在研磨齿110的接触表面110a(图1C)与晶片表面之间界定接触区域CA，且此接触区域是研磨轮的研磨区域。应理解，研磨轮的接触区域或研磨区域沿研磨轮的不同移动轨迹变化，但晶片或中间封装结构应作为整体被研磨，从而在整体上均匀地减小高度(或厚度)。
参照图1C及图1D，在一些实施例中，研磨齿110包含研磨材料。在一些实施例中，研磨齿110是由研磨材料1100制成的块结构，或研磨齿110的块的至少最外部分包含研磨材料1100。在一些实施例中，研磨材料1100至少包含混合在粘合材料1104中且由粘合材料1104粘合的磨料微粒1102。在一些实施例中，如在图1D中所见，研磨材料1100的框架结构包括分布在由粘合磨料微粒1102(由粘合材料1104粘合)构成的支架内的大尺寸孔隙PV。在一些实施例中，研磨材料1100包括占研磨材料1100的总体积的至少55％体积比(％v/v)的孔隙(气孔)PV。在一些实施例中，孔隙PV的孔径大于约40微米但小于70微米，且可介于约40微米至约60微米的范围内。对于具有约20微米(小于40微米)的小孔隙的研磨材料来说，通过阻塞或保留在研磨齿上的铜观察到较差的研磨能力。对于具有大于70微米的孔隙的研磨材料来说，研磨齿可常常经受劣化。由于在研磨材料内的孔隙的孔径相对大，因此在本文中的示例性实施例中阐述的研磨材料可被称为“大孔隙(large-pore)”研磨材料。在某些实施例中，粘合材料包括树脂粘合剂，且树脂粘合剂含有热固性树脂。在一些实施例中，热固性树脂包含选自酚醛树脂、合成橡胶树脂、或氨基甲酸酯树脂中的一种或多种材料。在一些实施例中，磨料微粒或颗粒包括金刚石微粒、氧化铝微粒、碳化硅微粒、立方氮化硼微粒等。在一些实施例中，磨料微粒的粒径介于约1.5微米至约20微米范围内。在一个实施例中，磨料微粒是平均粒径介于约3微米至约20微米范围内的金刚石微粒(金刚石磨粒)。在一些实施例中，孔隙(总共)占研磨材料的总体积的至少55％v/v或约55％v/v至70％v/v，而由粘合材料及磨料颗粒组成的其他比例占粘合材料的总体积的约45％v/v至30％v/v。在一个实施例中，孔隙(总共)占研磨材料的总体积的至少60％v/v，而由粘合材料及磨料颗粒组成的其他比例占粘合材料的总体积的约40％v/v。在一些实施例中，对于由粘合材料及磨料微粒组成的比例来说，磨料微粒对粘合材料的重量比介于3:1至5:1范围内。在一个实施例中，对于由粘合材料及磨料微粒组成的比例来说，磨料微粒对粘合材料的重量比为4.5:1。在一些实施例中，对于研磨材料来说，至少一些磨料微粒在研磨齿110的最外表面(接触表面)处从粘合材料暴露出。应理解，磨料微粒的粒径可根据研磨工艺的所需研磨速率及待研磨的晶片或封装的表面粗糙度要求来进行调整或选择。在一些实施例中，研磨材料可通过燃烧粘合材料与磨料微粒或颗粒的混合物来形成。
图4A至图4B是在研磨含金属结构之后根据本发明一些示例性实施例的大孔隙研磨材料的局部微观图。在示例性实施例中，与图1D所示研磨材料1100类似的大孔隙研磨材料包括占研磨材料的总体积的约60％v/v的孔隙(气孔)PV，而由粘合材料及磨料颗粒组成的其他比例占粘合材料的总体积的约40％v/v。此外，在一些实施例中，对于大孔隙研磨材料来说，孔隙的孔径介于约40微米至约60微米的范围内，且磨料微粒为平均粒径介于约3微米至约5微米范围内的金刚石微粒(金刚石磨粒)。在一些实施例中，对于大孔隙研磨材料来说，在由粘合材料及磨料微粒组成的比例内，磨料微粒对粘合材料的重量比是4.5:1。如在图4A至图4B中所见，在由研磨材料中的粘合材料粘合的磨料微粒之间看到大尺寸的孔隙，且在图4A中的圈出区及图4B所示的放大图中观察到作为白点的金属残余物(例如，铜残余物)，如由标记“Cu”的箭头所指出。对于由包括具有图4A或图4B所示大孔隙研磨材料的研磨齿的研磨轮研磨的含金属结构，观察到令人满意且受控良好的研磨结果。
在示例性实施例中，对包括模制化合物材料、铜/铜合金及聚合物材料的各种材料进行了测试，并由具有由不同研磨材料制成的研磨齿的研磨轮进行研磨。在一些实施例中，对于封装结构的可应用于研磨的材料(包括模制化合物材料、铜/铜合金及聚合物材料)来说，可通过如上所述使用包括具有大孔隙研磨材料的研磨齿的研磨轮来实现等于或小于约2微米(小至0.3微米)的高品质总厚度变化(total thickness variation，TTV)。
图5A至图5B是在研磨含金属结构之后对比研磨材料的局部微观图。为了进行对比，将对比研磨材料制备成包括占研磨材料的总体积的小于35％v/v的孔隙，而由粘合材料及磨料颗粒组成的其他比例占粘合材料的总体积的约65％v/v。对于此对比研磨材料来说，孔隙的孔径是约20微米，且磨料微粒对粘合材料的比是约1:7。如在图5A至图5B中所见，在图5A中观察到作为大的白点(由标记“Cu”的箭头指出)的大量金属残余物(例如，铜残余物)，且在图5B中观察到相当多的聚合物残余物(由标记“PM”的箭头指出)。对于由包括具有图5A所示对比研磨材料的研磨齿的研磨轮研磨的含金属结构，从使用图5A所示对比研磨材料的研磨结果观察到金属的过度研磨或凹陷。从此对比研磨材料的研磨结果观察到较差的均匀性。
通过大孔隙研磨材料与对比研磨材料的对比应理解，如在本公开内容中所述的大孔隙研磨材料为在半导体晶片之上的或封装结构的各种材料的研磨提供更好的研磨均匀性及提高的研磨产率。此外，由于本公开内容的研磨材料或研磨齿上存留较少残余物，因此研磨齿更耐用以提供更好的研磨能力及延长的研磨使用寿命。
在一些实施例中，研磨轮可应用于包括半导体晶片、管芯及封装结构的任意适当的结构。为薄化晶片或中间晶片级封装结构，在研磨工艺期间，可由包括具有大孔隙研磨材料的研磨齿的研磨轮来移除或研磨硅、半导体化合物材料、金属或金属性材料、或包封或模制材料。所述研磨工艺可包括粗研磨工艺及/或细研磨工艺。
图3A至图3H是根据一些示例性实施例的半导体封装的制造方法中的各阶段的示意性剖视图。在示例性实施例中，半导体制造方法是封装工艺的一部分。在一些实施例中，示出一个或多个芯片或管芯来表示晶片的多个芯片或管芯，且示出一个或多个封装来表示通过所述半导体制造方法所获得的多个半导体封装。
参照图3A，在一些实施例中，提供其上涂布有缓冲层304的载体302，载体302可为玻璃载体或任何适合于承载用于所述半导体封装的制造方法的半导体晶片或再造晶片(reconstituted wafer)的载体。在一些实施例中，缓冲层304包括剥离层，且所述剥离层可包括例如光热转换(light-to-heat conversion，LTHC)层。参照图3A，在一些实施例中，缓冲层304包括粘合层或管芯贴合膜。在某些实施例中，缓冲层304包括介电材料层，所述介电材料层包括苯并环丁烯(benzocyclobutene，BCB)、聚苯并恶唑(polybenzoxazole，PBO)、或任何其他适当的聚合物系介电材料。
参照图3B，在一些实施例中，在载体302之上的缓冲层304上形成层间穿孔(through interlayer via，TIV)320。在一些实施例中，层间穿孔320为集成扇出型(Integrated fan-out，InFO)穿孔。在一些实施例中，形成层间穿孔320包括：在缓冲层304上形成具有开口的掩模图案(图中未示出)，接着通过电镀或沉积形成填满所述开口的金属性材料(图中未示出)，以及移除所述掩模图案以在缓冲层304上形成层间穿孔320。在一些实施例中，形成层间穿孔320包括：首先通过在载体302上的缓冲层304之上溅镀钛层与铜晶种层(图中未示出)的复合层(composite layer)来形成晶种层306(图中未示出)，后续再通过电镀金属性材料(例如，铜或铜合金)以填充掩模图案的开口来形成层间穿孔320。然而应理解，本发明的范围并不仅限于以上所公开的材料及说明。
参照图3B，在与载体302相对的被暴露出的缓冲层304上提供及设置多于一个芯片310。在示例性实施例中，芯片310可包括相同类型的芯片或不同类型的芯片或/且可为数字芯片(digital chip)、模拟芯片(analog chip)或混合信号芯片(mixed signal chip)(例如，应用专用集成电路(application-specific integrated circuit，ASIC)芯片)、传感器芯片(sensor chip)、无线及射频(radio frequency)芯片、存储芯片、逻辑芯片、或电压调节芯片(voltage regulator chip)。在一些实施例中，芯片310包括位于有源表面310a上的接垫312及位于接垫312上的金属柱(metal post)314。在示例性实施例中，接垫312为铝接触垫。在一个实施例中，金属柱314是铜柱或铜合金柱。在某些实施例中，芯片310经预模制且位于芯片310的接垫312上的金属柱314被介电材料316覆盖。在一些实施例中，缓冲层304包括管芯贴合膜，且芯片310的背面粘合到载体302上的缓冲层304，而芯片的有源表面310a面朝上。在替代实施例中，在将芯片310放置在载体302上之前，芯片310上的金属柱314未被覆盖(即，未被模制或包封的裸管芯)，且管芯贴合膜可贴合到芯片310的背面。在一些实施例中，将芯片310放置于载体302之上且排列在层间穿孔320旁边(在被层间穿孔环绕的区域内)。在一些实施例中，在放置芯片310之前形成层间穿孔320。在一些实施例中，在放置芯片310之后形成层间穿孔320。在一些实施例中，如图3B所示，虚线表示在后续切割工艺中整个封装300的切割线，且一些层间穿孔320被排列成靠近切割线但不位于所述切割线上，并且排列在芯片310的周围。
参照图3C，在一些实施例中，在载体302及位于缓冲层304上的芯片310上形成模制化合物350，且位于载体302之上及芯片310旁边的层间穿孔320被模制在模制化合物350中。在一些实施例中，模制化合物350覆盖缓冲层304并填充在芯片310与层间穿孔320之间。在某些实施例中，模制化合物350完全覆盖层间穿孔320及芯片310。在一些实施例中，模制化合物350以超出芯片310及层间穿孔320的高度/厚度的高度对芯片310及层间穿孔320进行过度模制。在一个实施例中，模制化合物350的材料包括选自环氧树脂、酚醛树脂、及含硅树脂中的至少一种类型的树脂。
参照图3D，在一些实施例中，对模制化合物350执行研磨工艺以减小模制化合物350的高度，因此暴露出芯片310的金属柱314及层间穿孔320。在某些实施例中，通过研磨，金属柱314、层间穿孔320、及模制化合物350变得平坦且实质上齐平。在替代性实施例中，在研磨之后，模制化合物350的顶表面350a可与层间穿孔320的顶表面320a及芯片310的金属柱314的顶表面314a实质上齐平。在一些实施例中，使用包括具有大孔隙研磨材料的研磨齿的研磨轮来执行研磨工艺。在某些实施例中，研磨齿是由具有框架结构的大孔隙研磨材料制成，所述框架结构包括分布在由粘合磨料微粒构成的框架之间的大尺寸孔隙，所述粘合磨料微粒由粘合材料粘合(图1D)。在一些实施例中，大孔隙研磨材料包括占研磨材料的总体积的至少55％体积比(％v/v)的孔隙(气孔)，孔隙的孔径大于约40微米但小于约70微米，磨料微粒的粒径介于约1.5微米至约20微米范围内，且磨料微粒对粘合材料的重量比介于3:1至5:1范围内。在某些实施例中，粘合材料包括树脂粘合剂，且所述树脂粘合剂含有热固性树脂。在一些实施例中，磨料微粒或颗粒包括金刚石微粒、氧化铝微粒、碳化硅微粒、立方氮化硼微粒等。在一个实施例中，磨料微粒是平均粒径介于约3微米至约20微米范围内的金刚石微粒(金刚石磨粒)。在一个实施例中，孔隙(总共)占研磨材料的总体积的至少60％v/v，而由粘合材料及磨料颗粒组成的其他比例占粘合材料的总体积的约40％v/v。在一个实施例中，对于由粘合材料及磨料微粒组成的比例来说，磨料微粒对粘合材料的重量比为4.5:1。
如图3D所示，由于金属柱314的顶表面314a、及层间穿孔320的顶表面320a从模制化合物350暴露出，因此模制化合物350不完全覆盖层间穿孔320及金属柱314。在一些实施例中，在如上所述通过研磨工艺使用包括具有大孔隙研磨材料的研磨齿的研磨轮来研磨模制化合物350之后，可实现受控良好且表面光滑度及平整度更好的模制化合物350。在一些实施例中，经研磨模制化合物350的表面粗糙度(Ra)小于2微米或甚至小至0.3微米至0.5微米。在某些实施例中，特别是对于朝模制化合物350及嵌置在模制化合物350内的层间穿孔(及/或金属柱314)执行的研磨工艺，获得小的总厚度变化值及小的表面粗糙度。通过如上所述使用包括具有大孔隙研磨材料的研磨齿的研磨轮应用所公开的研磨工艺，可实现封装结构的提高的表面光滑度及平整度。在某些实施例中，在经研磨结构(例如，层间穿孔及模制化合物)的表面上产生很少凹坑或不产生凹坑，从而产生小的表面粗糙度及更好的表面均匀度。
参照图3E，在一些实施例中，在模制化合物350上、芯片310的金属柱314之上、及层间穿孔320上形成重布线层(redistribution layer)360。在一些实施例中，重布线层360电连接到层间穿孔320及芯片310的金属柱314。在某些实施例中，形成重布线层360包括交替地依序形成一个或多个介电材料层及一个或多个金属化层，且所述金属化层可夹置在所述介电材料层之间。在一些实施例中，一个或多个金属化层的材料包括铝、钛、铜、镍、钨、银、及/或其合金。在一些实施例中，一个或多个介电材料层的材料包括聚酰亚胺、苯并环丁烯、或聚苯并恶唑。在一些实施例中，重布线层360是电连接到芯片310且电连接到层间穿孔320的前侧(front-side)重布线层。在某些实施例中，由于位于下方的模制化合物350提供更好的平面化及均匀度，因此随后形成的重布线层360(特别是具有细小的线宽度或紧密的间隔的金属化层)可以均匀的线宽度及/或提高的线/配线(line/wiring)可靠性形成。
参照图3F，在一些实施例中，在重布线层360上设置导电元件370且导电元件370电连接到重布线层360。在一些实施例中，在设置导电元件370之前，可应用溶剂(flux)用于进行更好的贴合。在一些实施例中，导电元件370是例如放置在重布线层360上的焊料球(solder ball)或球栅阵列(ball grid array，BGA)球。在一些实施例中，一些导电元件370经由重布线层360电连接到芯片310，且一些导电元件370电连接到层间穿孔320。
参照图3G，在一些实施例中，将整个封装上下翻转并设置在载体膜(carrierfilm)380上。在一些实施例中，将整个封装300从载体302剥离，以将芯片310从载体302分离。在一些实施例中，在从载体302剥离之后，缓冲层304被暴露出并保留在模制化合物350及芯片310上。在一些实施例中，在从载体302剥离之后，通过蚀刻工艺或清洗工艺移除缓冲层304。
参照图3H，在某些实施例中，执行分割工艺以沿着切割线(虚线)将整个封装结构(至少切穿模制化合物350及重布线层360)切割成各个分离的半导体封装30。在一个实施例中，分割工艺为包括机械刀片锯切(mechanical blade sawing)或激光切割(lasercutting)的晶片分割工艺(wafer dicing process)。
根据一些实施例，一种研磨轮的研磨元件包括研磨齿。所述研磨齿包含研磨材料。所述研磨材料具有：框架结构，包含磨料微粒及粘合所述磨料微粒的粘合材料；以及孔隙，分布在所述框架结构中。所述孔隙的孔径大于40微米且小于70微米。
在上述的研磨元件中，所述孔隙占所述研磨材料的总体积的约55％体积比(％v/v)至约70％v/v。
在上述的研磨元件中，所述孔隙占所述研磨材料的所述总体积的约60％v/v。
在上述的研磨元件中，所述磨料微粒的粒径介于约1.5微米至约20微米范围内，且所述磨料微粒对所述粘合材料的重量比介于3:1至5:1范围内。
在上述的研磨元件中，所述磨料微粒的所述粒径介于约3微米至约20微米范围内，且所述磨料微粒对所述粘合材料的所述重量比为4.5:1。
在上述的研磨元件中，所述粘合材料包括热固性树脂粘合剂。
在上述的研磨元件中，所述磨料微粒包括金刚石微粒、氧化铝微粒、碳化硅微粒或立方氮化硼微粒。
在上述的研磨元件中，所述孔隙的所述孔径介于约40微米至约60微米范围内，所述磨料微粒是平均粒径介于约3微米至约20微米范围内的金刚石微粒，且所述磨料微粒对所述粘合材料的重量比为4.5:1。
根据一些实施例，一种研磨轮包括：环形金属基底；以及多个研磨齿，安装在所述金属基底的表面上。所述多个研磨齿彼此隔开一距离且沿所述金属基底的外缘部分排列。所述多个研磨齿中的每一个均包含研磨材料，所述研磨材料具有：框架结构，包含磨料微粒及粘合所述磨料微粒的粘合材料；以及孔隙，分布在所述框架结构中。所述孔隙占所述研磨材料的总体积的约55％体积比(％v/v)至约70％v/v。
在上述的研磨轮中，所述多个研磨齿中的每一个均是由所述研磨材料制成的块结构。
在上述的研磨轮中，所述多个研磨齿中的每一个均是矩形块，且所述块的至少最外部分包含所述研磨材料。
在上述的研磨轮中，所述孔隙的孔径大于40微米且小于70微米。
在上述的研磨轮中，所述孔隙占所述研磨材料的所述总体积的约60％v/v。
在上述的研磨轮中，所述磨料微粒的粒径介于约1.5微米至约20微米范围内，且所述磨料微粒对所述粘合材料的重量比介于3:1至5:1范围内。
在上述的研磨轮中，所述磨料微粒的所述粒径介于约3微米至约20微米范围内，且所述磨料微粒对所述粘合材料的所述重量比为约4.5:1。
在上述的研磨轮中，所述粘合材料包括热固性树脂粘合剂，且所述磨料微粒包括金刚石微粒、氧化铝微粒、碳化硅微粒或立方氮化硼微粒。
在上述的研磨轮中，所述孔隙的孔径介于约40微米至约60微米范围内，所述磨料微粒是平均粒径介于约3微米至约20微米范围内的金刚石微粒，且所述磨料微粒对所述粘合材料的重量比为约4.5:1。
根据一些实施例，阐述一种制造半导体封装的方法。提供载体。形成穿孔且将芯片设置在所述载体上。形成模制化合物以包封所述芯片及所述穿孔。使用研磨轮研磨所述模制化合物以暴露出所述穿孔，所述研磨轮具有研磨齿，所述研磨齿包含研磨材料。所述研磨材料包括：框架结构，包含磨料微粒及粘合所述磨料微粒的粘合材料；以及孔隙，分布在所述框架结构中，且所述孔隙的孔径大于40微米且小于70微米。在所述模制化合物及所述芯片上形成重布线层。所述重布线层电连接到所述穿孔及所述芯片。将导电元件安装在所述重布线层上。所述导电元件电连接到所述芯片及所述穿孔。
在上述的制造半导体封装的方法中，所述研磨所述模制化合物包括将所述模制化合物研磨至暴露出所述芯片的金属柱。
在上述的制造半导体封装的方法中，所述孔隙占所述研磨材料的总体积的约55％体积比(％v/v)至约70％v/v，所述孔隙的孔径介于约40微米至约60微米范围内，所述磨料微粒是平均粒径介于约3微米至约20微米范围内的金刚石微粒，且所述磨料微粒对所述粘合材料的重量比介于3:1至5:1范围内。
以上概述了若干实施例的特征，以使所属领域中的技术人员可更好地理解本发明的各个方面。所属领域中的技术人员应知，其可容易地使用本发明作为设计或修改其他工艺及结构的基础来施行与本文中所介绍的实施例相同的目的及/或实现与本文中所介绍的实施例相同的优点。所属领域中的技术人员还应认识到，这些等效构造并不背离本发明的精神及范围，而且他们可在不背离本发明的精神及范围的条件下对其作出各种改变、代替、及变更。

Claims (1)

1.一种研磨轮的研磨元件，其特征在于，包括：
研磨齿，包含研磨材料，所述研磨材料具有
框架结构，包含磨料微粒及粘合所述磨料微粒的粘合材料，以及
孔隙，分布在所述框架结构中，
其中所述孔隙的孔径大于40微米且小于70微米。
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