CN109240976B - Two-out-of-two voting processing method and device and electronic equipment - Google Patents
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Abstract
The invention provides a two-out-of-two voting processing method and device and electronic equipment, and relates to the technical field of computer data processing. The method comprises the following steps: the first processor or the second processor performs data synchronization on first data received by the first processor from the signal source and second data received by the second processor from the signal source; the first processor and the second processor carry out interactive voting on the first data and the second data respectively according to a preset voting rule; and after the first processor passes the first data table and receives the second data table passing of the second processor, the first processor outputs a data packet obtained by the first data or the second data according to a preset packaging rule. According to the scheme, the first processor and the second processor are matched with each other, two voting is achieved, the hardware structure of the electronic equipment is simplified, and the equipment cost is reduced.
Description
Technical Field
The invention relates to the technical field of computer data processing, in particular to a two-out-of-two voting processing method and device and electronic equipment.
Background
In a two-by-two system, one basic technique to implement two-by-two is voting. That is, when two basic units that perform the same predetermined function are consistent, the predetermined non-limiting function can be executed, otherwise, a safety state is guided to avoid that the equipment continues to execute the function when the two basic units are inconsistent, so as to increase the risk that the equipment may generate, and the process of judging that the two basic units are consistent is called two-out-of-two voting.
In the prior art, two-out-of-two voting is usually implemented by setting a voter independently of two base units. The voter only compares or assembles the outputs of the two basic units, does not perform logic processing, and does not generate new output contents. For example, in the design of two-way communication output, two processors execute logic operation to generate output data, and then a third-party device is set: for example, the FPGA is used for respectively taking a part of the output data packets of the two processors, and splicing the part of the output data packets into one output data packet as an output of two-out-of-two, and the method has a complicated hardware structure, is not beneficial to miniaturization of equipment, and increases the cost of products due to more software and hardware.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a two-out-of-two voting processing method, a two-out-of-two voting processing device and electronic equipment.
In order to achieve the above object, the technical solutions provided by the embodiments of the present invention are as follows:
the embodiment of the invention provides a two-out-of-two voting processing method which is applied to electronic equipment, wherein the electronic equipment comprises a first processor and a second processor connected with the first processor; the method comprises the following steps:
the first processor or the second processor performs data synchronization on first data received by the first processor from a signal source and second data received by the second processor from the signal source;
the first processor and the second processor carry out interactive voting on the first data and the second data respectively according to a preset voting rule;
and after the first processor passes the first data voting and the first processor receives the second data voting by the second processor, the first processor outputs a data packet obtained by the first data or the second data according to a preset encapsulation rule.
Optionally, the performing, by the first processor and the second processor, interactive voting on the first data and the second data according to a preset voting rule respectively includes:
the first processor votes the first data according to a first preset voting rule to obtain a first voting result, and packages the first data to obtain a first data packet after the first voting result represents that a vote passes;
the second processor votes the second data according to the first preset voting rule to obtain a second voting result, and packages the second data to obtain a second data packet after the second voting result represents that a vote passes;
the first processor receives the second voting result sent by the second processor and second dynamic lock data which correspond to the second data and are used for marking the second voting result;
the first processor sends the first data packet to the second processor and receives the second data packet sent by the second processor;
the second processor receives the first voting result sent by the first processor and first dynamic lock data which correspond to the first data and are used for marking the first voting result;
the second processor sends the second data packet to the first processor and receives the first data packet sent by the first processor;
the first processor checks and votes the first data packet and the second data packet to obtain a third voting result, and sends the third voting result to the second processor;
and the second processor checks and votes the first data packet and the second data packet, obtains a fourth voting result and sends the fourth voting result to the first processor.
Optionally, the voting, by the first processor, the first data according to a first preset voting rule to obtain a first voting result includes:
the first processor determines whether a first fixed code corresponding to the first data is a first preset fixed code, where a first voting result indicating that a table fails to pass is obtained when the first fixed code corresponding to the first data is not the first preset fixed code, or a first voting result indicating that a table passes is obtained when the first fixed code corresponding to the first data is the first preset fixed code.
Optionally, the voting, by the second processor, on the second data according to the first preset voting rule to obtain a second voting result includes:
the second processor determines whether a second fixed code corresponding to the second data is a second preset fixed code, where a second voting result indicating that the table fails to pass is obtained when the second fixed code corresponding to the second data is not the second preset fixed code, or a second voting result indicating that the table passes is obtained when the second fixed code corresponding to the second data is the second preset fixed code.
Optionally, the outputting, by the first processor, a data packet obtained according to a preset encapsulation rule for the first data or the second data by the first processor includes:
and when the third voting result and the fourth voting result both represent that a vote passes, the first processor receives key data sent by the second processor and outputs the key data and the first data packet or the second data packet.
Optionally, after the first processor outputs a data packet obtained by encapsulating the first data or the second data according to a preset encapsulation rule, the method further includes:
and verifying the data packet according to a preset verification rule, and deleting the data packet when the data packet is not verified.
In a second aspect, an embodiment of the present invention provides a two-out-of-two voting processing apparatus, which is applied to an electronic device, where the electronic device includes a first processor and a second processor connected to the first processor; the device comprises:
the data synchronization unit is used for carrying out data synchronization on first data received by the first processor from a signal source and second data received by the second processor from the signal source;
the voting unit is used for carrying out interactive voting on the first data and the second data respectively according to a preset voting rule;
an output unit, configured to, after the first processor passes the first data vote and the first processor receives the second data vote from the second processor, output, by the first processor, a data packet obtained according to a preset encapsulation rule for the first data or the second data.
Optionally, the voting unit is further configured to:
voting the first data according to a first preset voting rule to obtain a first voting result, and packaging the first data to obtain a first data packet after the first voting result represents that a vote passes;
voting the second data according to the first preset voting rule to obtain a second voting result, and packaging the second data to obtain a second data packet after the second voting result represents that a vote passes;
receiving the second voting result sent by the second processor and second dynamic lock data corresponding to the second data and used for marking the second voting result;
sending the first data packet to the second processor, and receiving the second data packet sent by the second processor;
receiving the first voting result sent by the first processor and first dynamic lock data corresponding to the first data and used for marking the first voting result;
sending the second data packet to the first processor, and receiving the first data packet sent by the first processor;
checking and voting the first data packet and the second data packet to obtain a third voting result, and sending the third voting result to the second processor;
and checking and voting the first data packet and the second data packet, obtaining a fourth voting result, and sending the fourth voting result to the first processor.
In a third aspect, an embodiment of the present invention provides an electronic device, including a first processor and a second processor connected to the first processor, where:
the first processor or the second processor is configured to perform data synchronization on first data received by the first processor from a signal source and second data received by the second processor from the signal source;
the first processor and the second processor are further used for carrying out interactive voting on the first data and the second data respectively according to a preset voting rule;
and after the first processor passes the first data voting and the first processor receives the second data voting by the second processor, the first processor outputs a data packet obtained by the first data or the second data according to a preset encapsulation rule.
In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program runs on a computer, the computer is caused to execute the two-out-of-two voting processing method described above.
Compared with the prior art, the two-out-of-two voting processing method, the two-out-of-two voting processing device and the electronic equipment provided by the invention have the following beneficial effects: the method comprises the following steps: the first processor or the second processor performs data synchronization on first data received by the first processor from the signal source and second data received by the second processor from the signal source; the first processor and the second processor carry out interactive voting on the first data and the second data respectively according to a preset voting rule; and after the first processor passes the first data table and receives the second data table passing of the second processor, the first processor outputs a data packet obtained by the first data or the second data according to a preset packaging rule. According to the scheme, the first processor and the second processor are matched with each other, two voting is achieved, the hardware structure of the electronic equipment is simplified, and the equipment cost is reduced.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments will be briefly described below. It is appreciated that the following drawings depict only some embodiments of the invention and are therefore not to be considered limiting of its scope, for those skilled in the art will be able to derive additional related drawings therefrom without the benefit of the inventive faculty.
Fig. 1 is a block diagram of an electronic device according to an embodiment of the present invention.
Fig. 2 is a schematic flow chart of a two-out-of-two voting processing method according to an embodiment of the present invention.
Fig. 3 is a schematic diagram illustrating an interaction of voting between a first processor and a second processor according to an embodiment of the present invention.
Fig. 4 is a block diagram illustrating a two-out-of-two voting apparatus according to an embodiment of the present invention.
Icon: 10-an electronic device; 11-a first processor; 12-a second processor; 13-a storage unit; 14-a communication bus; 100-two-out-of-two voting processing device; 110-a data synchronization unit; 120-a voting unit; 130-output unit.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely a few embodiments of the invention, and not all embodiments. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
Some embodiments of the invention are described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
Fig. 1 is a block diagram of an electronic device 10 according to an embodiment of the present invention. The electronic device 10 provided by the embodiment of the invention can be used for executing the steps of the two-out-of-two voting processing method, the electronic device 10 has a simple structure, can realize two-out-of-two voting processing, and contributes to the hardware cost of the device and the miniaturization and manufacturing of the device.
Understandably, in the railway field, the data output by the signal source can be ensured to be correct and error-free data through two-out-of-two voting, so that the reliability and the safety of corresponding operation based on the data are improved, and the risk of increasing the operation due to the wrong data is avoided. The signal source can be a collecting module, for example, the signal source is a speed sensor for collecting the running speed of the train.
In this embodiment, the electronic device 10 may include a first processor 11, a second processor 12, a storage unit 13, and a two-out-of-two voting processing device 100, and respective elements of the first processor 11, the second processor 12, the storage unit 13, and the two-out-of-two voting processing device 100 are electrically connected directly or indirectly to implement data transmission or interaction. For example, the components may be electrically connected to each other via one or more communication buses or signal lines.
In this embodiment, the first processor 11 and the second processor 12 may be the same type of processor. The processor may be an integrated circuit chip having signal processing capabilities. For example, the Processor may be a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Network Processor (NP), or the like; but may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed.
The storage unit 13 may be, but is not limited to, a random access memory, a read only memory, a programmable read only memory, an erasable programmable read only memory, an electrically erasable programmable read only memory, or the like. In this embodiment, the storage unit 13 may be configured to store the first data and the second data sent by the signal source. Of course, the storage unit 13 may also be used to store a program, and the first processor 11 and the second processor 12 execute the program after receiving the execution instruction.
Further, the two-out-of-two voting processing device 100 includes at least one software function module, which may be stored in the storage unit 13 in the form of software or firmware (firmware) or solidified in an Operating System (OS) of the electronic device 10. The first processor 11 and the second processor 12 are used to execute executable modules stored in the storage unit 13, such as software functional modules and computer programs included in the two-out-of-two voting processing device 100.
It is understood that the configuration shown in fig. 1 is only a schematic configuration of the electronic device 10, and that the electronic device 10 may further include more components than those shown in fig. 1. The components shown in fig. 1 may be implemented in hardware, software, or a combination thereof.
Referring to fig. 2 and fig. 3 in combination, fig. 2 is a schematic flow chart of a two-out-of-two voting processing method according to an embodiment of the present invention, and fig. 3 is an interaction schematic diagram of voting by the first processor 11(M-CPU) and the second processor 12(C-CPU) according to the embodiment of the present invention. The two-out-of-two voting processing method provided by the embodiment of the present invention can be applied to the electronic device 10, and the electronic device 10 executes each step of the two-out-of-two voting processing method. The method can simplify the hardware structure of the electronic device 10, and can vote on the data output by the signal source to ensure the correctness and reliability of the data output by the signal source.
As will be described in detail below with respect to the steps of the two-out-of-two voting processing method shown in fig. 2, in this embodiment, the two-out-of-two voting processing method may include the following steps:
in step S210, the first processor 11 or the second processor 12 performs data synchronization on the first data received by the first processor 11 from the signal source and the second data received by the second processor 12 from the signal source.
In this embodiment, the first processor 11 and the second processor 12 may receive corresponding data from the same signal source, where the data received by the first processor 11 from the signal source is the first data, and the data received by the second processor 12 from the signal source is the second data. The first processor 11 or the second processor 12 may synchronize through the data so as to vote on the synchronized data.
In step S220, the first processor 11 and the second processor 12 perform interactive voting on the first data and the second data according to a preset voting rule.
In this embodiment, the preset voting rule may be set according to an actual situation, so as to implement two-out-of-two voting. Where interactive voting can be understood as: the first processor 11 is configured to vote on the first data, and the first processor 11 is further configured to vote on a second data packet corresponding to the second data sent by the second processor 12. The second processor 12 is configured to vote on the second data, and the second processor 12 is further configured to vote on a first data packet corresponding to the first data sent by the first processor 11, so that the data is not voted by a single processor, and it is ensured that an effective output is a result of two-out-of-two, rather than a result generated by a single channel, and a random error possibly generated in an operation process is avoided, thereby improving reliability and security of the data.
Optionally, step S220 may include:
the first processor 11 votes the first data according to a first preset voting rule to obtain a first voting result, and packages the first data to obtain a first data packet after the first voting result indicates that the vote passes;
the second processor 12 votes the second data according to the first preset voting rule to obtain a second voting result, and encapsulates the second data to obtain a second data packet after the second voting result indicates that the vote passes;
the first processor 11 receives the second voting result sent by the second processor 12 and second dynamic lock data corresponding to the second data and used for marking the second voting result; the first processor 11 sends the first data packet to the second processor 12 and receives the second data packet sent by the second processor 12; wherein, the second dynamic lock data can be understood as: data generated by the second processor 12 via a random number generator, the second dynamic lock data being appendable to the second voting result to identify the second voting result; the second dynamic lock can be attached to the data to be output (the first data or the second data), and is used for being output together with the key data determined after final voting, so that a receiving party (other processors or other equipment) performs secondary check, and the integrity of the data to be output is determined according to the second dynamic lock.
The second processor 12 receives the first voting result sent by the first processor 11 and first dynamic lock data corresponding to the first data and used for marking the first voting result; the first dynamic lock data may be generated by the first processor 11 by means of a random number generator, functioning similarly to the second dynamic lock data;
the second processor 12 sends the second data packet to the first processor 11 and receives the first data packet sent by the first processor 11;
the first processor 11 checks and votes the first data packet and the second data packet, obtains a third voting result, and sends the third voting result to the second processor 12;
the second processor 12 checks and votes the first data packet and the second data packet, obtains a fourth voting result, and sends the fourth voting result to the first processor 11.
In this embodiment, when voting is performed on the data to be output, the flag code indicating that the vote passes may be a fixed code (for example, a specific number of 32 bits). When voting is performed on the subsequently encapsulated data packets (the first data packet and the second data packet), the flag code passing the voting can be dynamic lock data.
In this embodiment, the voting, by the first processor 11, on the first data according to the first preset voting rule to obtain the first voting result may include: the first processor 11 determines whether the first fixed code corresponding to the first data is a first preset fixed code, where when the first fixed code corresponding to the first data is not the first preset fixed code, a first voting result indicating that the table never passes is obtained, or when the first fixed code corresponding to the first data is the first preset fixed code, a first voting result indicating that the table passes is obtained.
Understandably, the first processor 11 may determine to obtain the first fixed code corresponding to the first data based on the first data. The first predetermined fixed code may be a specific number, for example, a 32-bit specific number, and the number may be set according to actual situations, which is not limited specifically herein.
In this embodiment, the voting, by the second processor 12, on the second data according to the first preset voting rule to obtain the second voting result may include: the second processor 12 determines whether the second fixed code corresponding to the second data is a second preset fixed code, where a second voting result indicating that the table fails to pass is obtained when the second fixed code corresponding to the second data is not the second preset fixed code, or a second voting result indicating that the table passes is obtained when the second fixed code corresponding to the second data is the second preset fixed code.
Understandably, the second processor 12 may determine to obtain a second fixed code corresponding to the second data based on the second data. The second predetermined fixed code may be a specific number, for example, a 32-bit specific number, and the number may be set according to actual conditions, and may be the same as or different from the first predetermined fixed code, and is not limited herein.
In step S230, after the first processor 11 makes a vote on the first data and the first processor 11 receives a vote on the second data from the second processor 12, the first processor 11 outputs a data packet obtained by encapsulating the first data or the second data according to a preset encapsulation rule.
Understandably, the first processor 11 may obtain the CRC Check code by performing Cyclic Redundancy Check (CRC) on the first data, and then attach the CRC Check code to the first data and encapsulate it into the first data packet. Similarly, the second data may also be processed by the second processor 12 similarly to obtain the second data packet, which is not described herein again. For example, the first processor 11 outputs the packet to the receiving side through the communication bus 14. The recipient may be another processor in the electronic device 10 or may be another device.
Optionally, step S230 includes: when the third voting result and the fourth voting result both indicate that the vote passes, the first processor 11 receives the key data sent by the second processor 12 and outputs the key data and the first data packet or the second data packet.
In this embodiment, the key data may be randomly generated by the second processor 12 through a random number generator. Wherein the key data may be used to verify the second data packet. Such as processing key data (a random number) with a CRC to generate dynamic lock data. The dynamic lock data is used as a secondary voting mark code, and is added to the data to be output, and then the data to be output and the dynamic lock data are packaged integrally (the data to be output and the dynamic lock data are used as the whole to calculate the check data to form a data packet, then the key data are added, the receiver needs to check the check of the data packet, calculates the lock data by using the key data, and after the data are correct, the receiver uses the data to be output.
Optionally, after step S230, the method further comprises: and verifying the data packet according to a preset verification rule, and deleting the data packet when the data packet is not verified.
For example, a module receiving a data packet (which may be another processor) may check the data packet twice. For example, the dynamic lock data is verified by the key data described above, and the data (including valid output data and lock data) in the data packet is verified by using the packet data check code. At the beginning of verification, correct key data can be matched with dynamic lock data, and correct packet data check codes can be matched with lock data in the packet. In addition, if any check fails, the data packet is discarded or deleted. Therefore, the reliability of the output data can be improved, and the increase of safety risks caused by outputting data which does not meet the verification is avoided.
It should be noted that if any step does not pass through the voting process, the process is aborted and the communication bus 14 is shut down, e.g., the communication power can be cut off. For example, when the first processor 11 disregards the voting failure information of the second processor 12 and continues outputting alone, the second processor 12 may disconnect the communication bus 14 by control to prevent the output of the untrimmed data. In addition, in the above method, the functional roles of the first processor 11 and the second processor 12 may be interchanged.
Fig. 4 is a block diagram of a two-out-of-two voting apparatus 100 according to an embodiment of the present invention. The two-out-of-two voting processing device 100 provided by the embodiment of the present invention can be applied to the electronic device 10, and is used for executing each step of the two-out-of-two voting processing method, so as to simplify the hardware structure of the electronic device 10, and vote on data output by a signal source, so as to ensure the correctness and reliability of the data output by the signal source. The two-out-of-two voting processing device 100 may include a data synchronization unit 110, a voting unit 120, and an output unit 130.
The data synchronization unit 110 is configured to perform data synchronization on the first data received by the first processor 11 from the signal source and the second data received by the second processor 12 from the signal source.
And the voting unit 120 is configured to perform interactive voting on the first data and the second data according to a preset voting rule.
Optionally, the voting unit 120 is further configured to: voting the first data according to a first preset voting rule to obtain a first voting result, and packaging the first data to obtain a first data packet after the first voting result represents that the vote passes; voting the second data according to a first preset voting rule to obtain a second voting result, and packaging the second data to obtain a second data packet after the second voting result represents that the vote passes; receiving a second voting result sent by the second processor 12 and second dynamic lock data corresponding to the second data and used for marking the second voting result; sending the first data packet to the second processor 12, and receiving a second data packet sent by the second processor 12; receiving a first voting result sent by a first processor 11 and first dynamic lock data corresponding to the first data and used for marking the first voting result; sending the second data packet to the first processor 11, and receiving the first data packet sent by the first processor 11; checking and voting the first data packet and the second data packet to obtain a third table result, and sending the third table result to the second processor 12; and checking and voting the first data packet and the second data packet to obtain a fourth voting result, and sending the fourth voting result to the first processor 11.
Optionally, the voting unit 120 is further configured to: and judging whether the first fixed code corresponding to the first data is a first preset fixed code, wherein when the first fixed code corresponding to the first data is not the first preset fixed code, a first voting result indicating that the table fails is obtained, or when the first fixed code corresponding to the first data is the first preset fixed code, a first voting result indicating that the table fails is obtained.
Optionally, the voting unit 120 is further configured to: the second processor 12 determines whether the second fixed code corresponding to the second data is a second preset fixed code, where a second voting result indicating that the table fails to pass is obtained when the second fixed code corresponding to the second data is not the second preset fixed code, or a second voting result indicating that the table passes is obtained when the second fixed code corresponding to the second data is the second preset fixed code.
The output unit 130 is configured to, after the first processor 11 makes a vote on the first data and the first processor 11 receives a vote on the second data from the second processor 12, output a data packet obtained by encapsulating the first data or the second data according to a preset encapsulation rule by the first processor 11.
Optionally, the output unit 130 is further configured to: and when the third voting result and the fourth voting result both indicate that the vote passes, receiving the key data sent by the second processor 12, and outputting the key data and the first data packet or the second data packet.
Optionally, the two-out-of-two voting processing device 100 may further include a verification unit, after the output unit 130 outputs a data packet obtained by performing a preset encapsulation rule on the first data or the second data, the verification unit is configured to verify the data packet according to a preset verification rule, and delete the data packet when the verification fails.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working process of the two-out-of-two voting processing device described above may refer to the processing process corresponding to each step in the foregoing method, and will not be described in detail herein.
The embodiment of the invention also provides a computer readable storage medium. The readable storage medium has stored therein a computer program that, when run on a computer, causes the computer to execute the two-out-of-two voting processing method described in the above embodiments.
From the above description of the embodiments, it is clear to those skilled in the art that the present invention can be implemented by hardware, or by software plus a necessary general hardware platform, and based on such understanding, the technical solution of the present invention can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a usb disk, a removable hard disk, etc.), and includes several instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the method described in the embodiments of the present invention.
In summary, the present invention provides a two-out-of-two voting method, an apparatus and an electronic device. The method comprises the following steps: the first processor or the second processor performs data synchronization on first data received by the first processor from the signal source and second data received by the second processor from the signal source; the first processor and the second processor carry out interactive voting on the first data and the second data respectively according to a preset voting rule; and after the first processor passes the first data table and receives the second data table passing of the second processor, the first processor outputs a data packet obtained by the first data or the second data according to a preset packaging rule. According to the scheme, the first processor and the second processor are matched with each other, two voting is achieved, the hardware structure of the electronic equipment is simplified, and the equipment cost is reduced.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus, system, and method may be implemented in other ways. The apparatus, system, and method embodiments described above are illustrative only, as the flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions. In addition, the functional modules in the embodiments of the present invention may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
Alternatively, all or part of the implementation may be in software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. A two-out-of-two voting processing method is applied to electronic equipment, and the electronic equipment comprises a first processor and a second processor connected with the first processor; the method comprises the following steps:
the first processor or the second processor performs data synchronization on first data received by the first processor from a signal source and second data received by the second processor from the signal source;
the first processor and the second processor carry out interactive voting on the first data and the second data respectively according to a preset voting rule;
after the first processor passes the first data voting and the first processor receives the second data voting passed by the second processor, the first processor outputs a data packet obtained according to a preset encapsulation rule for the first data or the second data, wherein the first processor and the second processor perform interactive voting on the first data and the second data respectively according to a preset voting rule, and the method comprises the following steps:
the first processor votes the first data according to a first preset voting rule to obtain a first voting result, and packages the first data to obtain a first data packet after the first voting result represents that a vote passes;
the second processor votes the second data according to the first preset voting rule to obtain a second voting result, and packages the second data to obtain a second data packet after the second voting result represents that a vote passes;
the first processor receives the second voting result sent by the second processor and second dynamic lock data which correspond to the second data and are used for marking the second voting result;
the first processor sends the first data packet to the second processor and receives the second data packet sent by the second processor;
the second processor receives the first voting result sent by the first processor and first dynamic lock data which correspond to the first data and are used for marking the first voting result;
the second processor sends the second data packet to the first processor and receives the first data packet sent by the first processor;
the first processor checks and votes the first data packet and the second data packet to obtain a third voting result, and sends the third voting result to the second processor;
the second processor checks and votes the first data packet and the second data packet, obtains a fourth voting result and sends the fourth voting result to the first processor;
the first processor outputs a data packet obtained by the first data or the second data according to a preset encapsulation rule, and the method comprises the following steps:
when the third voting result and the fourth voting result both indicate that a vote passes, the first processor receives key data sent by the second processor, and outputs the key data and the first data packet or the second data packet, where the first data packet includes the first data, the first dynamic lock data, and a CRC check code obtained based on the first data, and the second data packet includes the second data, the second dynamic lock data, and a CRC check code obtained based on the second data.
2. The method of claim 1, wherein the first processor votes on the first data according to a first predetermined voting rule to obtain a first voting result, comprising:
the first processor determines whether a first fixed code corresponding to the first data is a first preset fixed code, where a first voting result indicating that a table fails to pass is obtained when the first fixed code corresponding to the first data is not the first preset fixed code, or a first voting result indicating that a table passes is obtained when the first fixed code corresponding to the first data is the first preset fixed code.
3. The method of claim 1, wherein the second processor votes the second data according to the first predetermined voting rule to obtain a second voting result, comprising:
the second processor determines whether a second fixed code corresponding to the second data is a second preset fixed code, where a second voting result indicating that the table fails to pass is obtained when the second fixed code corresponding to the second data is not the second preset fixed code, or a second voting result indicating that the table passes is obtained when the second fixed code corresponding to the second data is the second preset fixed code.
4. The method of claim 3, wherein after the first processor outputs a packet obtained according to a predetermined encapsulation rule for the first data or the second data, the method further comprises:
and verifying the data packet according to a preset verification rule, and deleting the data packet when the data packet is not verified.
5. A two-out-of-two voting processing device is applied to electronic equipment, and the electronic equipment comprises a first processor and a second processor connected with the first processor; the device comprises:
the data synchronization unit is used for carrying out data synchronization on first data received by the first processor from a signal source and second data received by the second processor from the signal source;
the voting unit is used for carrying out interactive voting on the first data and the second data respectively according to a preset voting rule;
an output unit, configured to, after the first processor passes the first data vote and the first processor receives the second data vote passed by the second processor, output, by the first processor, a data packet obtained according to a preset encapsulation rule for the first data or the second data;
wherein the voting unit is further configured to:
voting the first data according to a first preset voting rule to obtain a first voting result, and packaging the first data to obtain a first data packet after the first voting result represents that a vote passes;
voting the second data according to the first preset voting rule to obtain a second voting result, and packaging the second data to obtain a second data packet after the second voting result represents that a vote passes;
receiving the second voting result sent by the second processor and second dynamic lock data corresponding to the second data and used for marking the second voting result;
sending the first data packet to the second processor, and receiving the second data packet sent by the second processor;
receiving the first voting result sent by the first processor and first dynamic lock data corresponding to the first data and used for marking the first voting result;
sending the second data packet to the first processor, and receiving the first data packet sent by the first processor;
checking and voting the first data packet and the second data packet to obtain a third voting result, and sending the third voting result to the second processor;
checking and voting the first data packet and the second data packet, obtaining a fourth voting result, and sending the fourth voting result to the first processor;
the output unit is further configured to receive, by the first processor, key data sent by the second processor and output the key data and the first data packet or the second data packet when both the third voting result and the fourth voting result indicate that a vote passes, where the first data packet includes the first data, the first dynamic lock data, and a CRC check code obtained based on the first data, and the second data packet includes the second data, the second dynamic lock data, and a CRC check code obtained based on the second data.
6. An electronic device comprising a first processor and a second processor coupled to the first processor, wherein:
the first processor or the second processor is configured to perform data synchronization on first data received by the first processor from a signal source and second data received by the second processor from the signal source;
the first processor and the second processor are further used for carrying out interactive voting on the first data and the second data respectively according to a preset voting rule;
after the first processor passes the first data voting and the first processor receives the second data voting by the second processor, the first processor outputs a data packet obtained by the first data or the second data according to a preset encapsulation rule;
the first processor is further configured to vote the first data according to a first preset voting rule to obtain a first voting result, and encapsulate the first data to obtain a first data packet after the first voting result indicates that a vote passes;
the second processor is further configured to vote the second data according to the first preset voting rule to obtain a second voting result, and encapsulate the second data to obtain a second data packet after the second voting result indicates that the vote passes;
the first processor is further configured to receive the second voting result sent by the second processor and second dynamic lock data corresponding to the second data and used for marking the second voting result;
the first processor is further configured to send the first data packet to the second processor, and receive the second data packet sent by the second processor;
the second processor is further configured to receive the first voting result sent by the first processor and first dynamic lock data corresponding to the first data and used for marking the first voting result;
the second processor is further configured to send the second data packet to the first processor, and receive the first data packet sent by the first processor;
the first processor is further configured to check and vote for the first data packet and the second data packet, obtain a third voting result, and send the third voting result to the second processor;
the second processor is further configured to check and vote the first data packet and the second data packet, obtain a fourth voting result, and send the fourth voting result to the first processor;
when the third voting result and the fourth voting result both indicate that a vote passes, the first processor is further configured to receive key data sent by the second processor, and output the key data and the first data packet or the second data packet, where the first data packet includes the first data, the first dynamic lock data, and a CRC check code obtained based on the first data, and the second data packet includes the second data, the second dynamic lock data, and a CRC check code obtained based on the second data.
7. A computer-readable storage medium, in which a computer program is stored, which, when run on a computer, causes the computer to execute a two-out-of-two voting processing method according to any one of claims 1 to 4.
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| CN113612574B (en) * | 2021-06-28 | 2025-01-03 | 通号城市轨道交通技术有限公司 | Data transmission method and device |
| CN115577225B (en) * | 2022-12-07 | 2023-05-12 | 通号万全信号设备有限公司 | Two-out-of-two voting processing method, device and storage medium |
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