CN109148616B - Silicon heterojunction solar cell and preparation method thereof - Google Patents
Silicon heterojunction solar cell and preparation method thereof Download PDFInfo
- Publication number
- CN109148616B CN109148616B CN201710461478.8A CN201710461478A CN109148616B CN 109148616 B CN109148616 B CN 109148616B CN 201710461478 A CN201710461478 A CN 201710461478A CN 109148616 B CN109148616 B CN 109148616B
- Authority
- CN
- China
- Prior art keywords
- layer
- amorphous silicon
- hydrogenated amorphous
- alloy
- solar cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F10/00—Individual photovoltaic cells, e.g. solar cells
- H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
- H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
- H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Photovoltaic Devices (AREA)
Abstract
The invention discloses a silicon heterojunction solar cell and a preparation method thereof. Wherein, this solar cell includes: an n-type crystalline silicon substrate layer; lightly doped n-type hydrogenated amorphous silicon buffer layers formed on upper and lower side surfaces of the substrate layer; a heavily doped p-type hydrogenated amorphous silicon emitter layer formed on a surface of the one side lightly doped n-type hydrogenated amorphous silicon buffer layer; the heavily doped n-type hydrogenated amorphous silicon back surface field layer is formed on the surface of the hydrogenated amorphous silicon buffer layer at the other side; transparent conductive oxide layers formed on surfaces of the hydrogenated amorphous silicon emitter layer and the hydrogenated amorphous silicon back surface field layer, respectively; an alloy gate line electrode layer formed on a surface of at least one of the transparent conductive oxide layer, the hydrogenated amorphous silicon back surface field layer, and the hydrogenated amorphous silicon emitter layer; and an electrode protection layer formed on a surface of the alloy gate line electrode layer.
Description
Technical Field
The invention relates to the field of solar cells, in particular to a silicon heterojunction solar cell containing an alloy electrode protection layer and a preparation method thereof.
Background
The electrodes of the photovoltaic cells are typically located on the front or rear surface of the cell, in intimate physical or chemical contact with the cell surface, and act as conductors for collecting the photo-generated current generated by the cell. The electrodes, also called grid lines, are distributed on the surface of the photovoltaic cell in a certain arrangement pattern, so as to provide a low-resistance conductive path and reduce the shielding of the electrodes on light rays as much as possible so as to reduce the loss of incident light.
The metal electrode on the surface of the solar cell not only affects the series resistance of the cell and thus the efficiency of the final cell, but also affects the cost of the cell to a certain extent, so that the cost-effective metallization is a very important direction in the research of the efficient cell. The electrode preparation method which is the most mature and widely used in industry at present is screen printing Ag paste, and the method can realize large-scale automatic continuous production, so that the method is favored by enterprises. However, this method requires high temperature (> 700 ℃) sintering of the printed Ag paste to form good ohmic contact between Ag and the substrate Si, and is not suitable for a cell requiring all processes to be completed at low temperature for silicon heterojunction. Moreover, the electrode formed by the method has the characteristics of expensive material, wider line width, limited line height and higher minority carrier recombination rate at the contact interface of metal and silicon, and limits the application of thinner silicon wafers, thereby becoming one of limiting factors for further reducing the cost of the battery and improving the efficiency.
In view of the above problems, there are other proposals in the design of electrodes for solar cells, both in terms of materials, structures and methods of fabrication. For example, cu, which is a promising electrode material, is a material that uses Cu, which is a non-noble metal, instead of Ag, since Cu has a conductivity close to that of Ag and costs about one percent of Ag. However, cu atoms are highly likely to diffuse into silicon, resulting in degradation of cell performance, and therefore a high quality barrier layer is required to be formed between Cu and Si to block Cu diffusion. On the basis, the electrode structure which can be adopted is a stacked metal layer formed by a Ni/Cu system, and the metal Ni can be used as a barrier layer to block the diffusion of Cu into silicon. The electrode has a thin grid line and low contact resistance, however, cu is easy to oxidize and corrode in a humid environment, so that the resistance is greatly increased, and the strength is reduced.
Thus, the existing solar cell needs to be improved.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems existing in the prior art. Therefore, an object of the present invention is to provide a silicon heterojunction solar cell having an alloy gate electrode layer, which is improved in resistance to environmental influences and solderability by adding an electrode protection layer to the alloy gate electrode layer, so that the alloy gate electrode layer has good oxidation resistance, corrosion resistance, and solderability.
According to one aspect of the invention, a silicon heterojunction solar cell is provided. According to an embodiment of the present invention, the solar cell includes:
An n-type crystalline silicon substrate layer;
Lightly doped n-type hydrogenated amorphous silicon buffer layers formed on upper and lower side surfaces of the substrate layer;
A heavily doped p-type hydrogenated amorphous silicon emitter layer formed on a surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at one side;
the heavily doped n-type hydrogenated amorphous silicon back surface field layer is formed on the surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at the other side;
A transparent conductive oxide layer formed on at least a portion of a surface of the heavily doped p-type hydrogenated amorphous silicon emitter layer or the heavily doped n-type hydrogenated amorphous silicon back surface field layer;
an alloy gate line electrode layer formed on a surface of at least one of the transparent conductive oxide layer, the hydrogenated amorphous silicon back surface field layer, and the heavily doped p-type hydrogenated amorphous silicon emitter layer; and
And an electrode protection layer formed on a surface of the alloy gate line electrode layer.
According to the solar cell provided by the embodiment of the invention, the electrode protection layer is added to the alloy grid line electrode layer of the solar cell, so that the environment influence resistance and the weldability of the alloy electrode are improved, the problem that the alloy grid line electrode, especially the copper alloy grid line electrode, is easy to corrode and oxidize in a humid environment is solved, and the alloy grid line electrode layer has good oxidation resistance, corrosion resistance and weldability.
In addition, the silicon heterojunction solar cell according to the above embodiment of the present invention may further have the following additional technical features:
According to an embodiment of the present invention, an alloy gate line electrode layer contains an alloy transition layer and a copper-containing conductive alloy layer.
According to an embodiment of the present invention, the alloy transition layer contains at least two metals selected from Cu, mo, W, ti, ni, cr, al, mg, ta, sn, zn and Ag, preferably, the alloy transition layer contains a Ni-Cu-Sn alloy, a Ni-Cu-In alloy, or a Ni-Al alloy.
According to an embodiment of the present invention, the copper-containing conductive alloy layer contains Cu and at least one metal selected from Mo, W, ti, ni, cr, al, mg, ta, sn, zn and Ag.
According to an embodiment of the present invention, the electrode protection layer is formed of tin or a tin alloy.
According to an embodiment of the present invention, the tin alloy contains Sn and at least one element selected from Cu, ag, zn, bi and In.
According to an embodiment of the present invention, the electrode protection layer may further contain an element selected from B, P, ga and Al.
According to an embodiment of the present invention, the electrode protection layer contains not less than 50 mass% tin.
According to the embodiment of the invention, the doping concentration of the lightly doped n-type hydrogenated amorphous silicon layer is 10 8-1017/cm3.
According to the embodiment of the invention, the thickness of the n-type crystalline silicon substrate is 50-200 mu m.
According to the embodiment of the invention, the thickness of the passivation layer of the lightly doped n-type hydrogenated amorphous silicon buffer layer is 1-15nm.
According to the embodiment of the invention, the thickness of the heavily doped p-type hydrogenated amorphous silicon emitter layer is 5-25nm.
According to the embodiment of the invention, the thickness of the heavily doped n-type hydrogenated amorphous silicon back surface field layer is 5-25nm.
According to an embodiment of the present invention, the transparent conductive oxide layer has a thickness of 50-300nm.
According to an embodiment of the invention, the thickness of the alloy transition layer is 5-300nm.
According to an embodiment of the invention, the thickness of the copper-containing conductive alloy layer is 1-100 μm.
According to an embodiment of the invention, the thickness of the electrode protection layer is 0.3-25 μm.
According to another aspect of the present invention, there is provided a method of preparing the aforementioned silicon heterojunction solar cell. According to an embodiment of the invention, the method comprises:
Providing an n-type crystalline silicon substrate layer;
forming lightly doped n-type hydrogenated amorphous silicon buffer layers on the upper side surface and the lower side surface of the substrate layer;
forming a heavily doped p-type hydrogenated amorphous silicon emitter layer on the surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at one side;
Forming a heavily doped n-type hydrogenated amorphous silicon back surface field layer on the surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at the other side;
Forming a transparent conductive oxide layer on the surfaces of the heavily doped p-type hydrogenated amorphous silicon emitter layer and the heavily doped n-type hydrogenated amorphous silicon back surface field layer;
Forming an alloy gate line electrode layer on the surface of at least one of the transparent conductive oxide layer, the heavily doped n-type hydrogenated amorphous silicon back surface field layer and the heavily doped p-type hydrogenated amorphous silicon emitter layer; and
And forming an electrode protection layer on the surface of the alloy grid line electrode layer.
According to the method for preparing the solar cell, the electrode protection layer is formed on the surface of the alloy grid line electrode layer of the silicon heterojunction solar cell, so that the environment influence resistance and the weldability of the alloy electrode are improved, the problem that the alloy grid line electrode, particularly the copper alloy grid line electrode, is easy to corrode and oxidize in a humid environment is solved, and the alloy grid line electrode layer has good oxidation resistance, corrosion resistance and weldability.
In addition, the method for manufacturing a solar cell according to the above-described embodiment of the present invention may further have the following additional technical features:
According to an embodiment of the present invention, an alloy gate line electrode layer contains an alloy transition layer and a copper-containing conductive alloy layer.
According to an embodiment of the present invention, the alloy transition layer is formed by a physical vapor deposition method, preferably, an evaporation deposition method and a sputtering deposition method.
According to an embodiment of the present invention, the copper-containing conductive alloy layer is formed by an electroplating method.
According to an embodiment of the present invention, the electrode protection layer contains Sn and at least one element selected from Cu, ag, zn, bi and In, and the content of tin is not less than 50 mass%.
According to an embodiment of the present invention, the electrode protection layer is formed by coating the surface of the electrode with molten tin.
According to an embodiment of the present invention, the electrode protection layer is formed using a screen printing method or a spray printing method.
According to an embodiment of the present invention, the electrode protection layer is formed using a physical vapor deposition method, preferably, an evaporation deposition method and a sputtering deposition method.
According to an embodiment of the present invention, the electrode protection layer is formed using electroless chemical deposition.
According to an embodiment of the present invention, the electrode protection layer is formed using an electroplating method.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
Fig. 1 shows a schematic structure of a solar cell according to an embodiment of the present invention;
fig. 2 shows a schematic structure of a solar cell according to still another embodiment of the present invention;
FIG. 3 shows a schematic flow chart of a method of fabricating a solar cell according to one embodiment of the invention;
FIG. 4 shows a schematic flow chart of a method of fabricating a solar cell according to one embodiment of the invention;
fig. 5 shows a flow diagram of a method of manufacturing a solar cell according to an embodiment of the invention;
FIG. 6 shows a schematic structural diagram of an alloy gate line electrode layer according to one embodiment of the present invention;
fig. 7 shows a flow diagram of a method of manufacturing a solar cell according to an embodiment of the invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
In the description of the present invention, the terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", etc. refer to the orientation or positional relationship based on that shown in the drawings, merely for convenience of description of the present invention and do not require that the present invention must be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.
It should be noted that the terms "first," "second," and "second" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implying a number of technical features being indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. Further, in the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more.
According to one aspect of the invention, a solar cell is provided. Referring to fig. 1, the solar cell according to an embodiment of the present invention will be explained, the solar cell including: an n-type crystalline silicon substrate layer 100, a lightly doped n-type hydrogenated amorphous silicon buffer layer 200, a heavily doped p-type hydrogenated amorphous silicon emitter layer 300, a heavily doped n-type hydrogenated amorphous silicon back surface field layer 400, a transparent conductive oxide layer 500, an alloy gate line electrode layer 600 and an electrode protection layer 700. According to the solar cell provided by the embodiment of the invention, the electrode protection layer is added to the alloy grid line electrode layer of the solar cell, so that the environment influence resistance and the weldability of the alloy electrode are improved, the problem that the alloy grid line electrode, especially the copper alloy grid line electrode, is easy to corrode and oxidize in a humid environment is solved, and the alloy grid line electrode layer has good oxidation resistance, corrosion resistance and weldability.
The solar cell according to the embodiment of the present invention is explained below with reference to fig. 1 and 2, specifically as follows:
n-type crystalline silicon substrate layer 100: the substrate layer 100 provides an attached carrier for other structures of the solar cell according to embodiments of the present invention.
According to an embodiment of the invention, the thickness of the substrate layer 100 is 50-200 μm.
Lightly doped n-type hydrogenated amorphous silicon buffer layer 200: according to an embodiment of the present invention, the lightly doped n-type hydrogenated amorphous silicon buffer layer 200 is formed on both upper and lower side surfaces of the substrate layer 100. Therefore, the hydrogenated amorphous silicon buffer layer can repair dangling bonds in the deposited silicon film by introducing hydrogen atoms, so that defects in crystal lattices are reduced, and on the premise that good interface passivation effect can be ensured by using the hydrogenated amorphous silicon layer to replace intrinsic amorphous silicon as a passivation layer, the allowable thickness range of the hydrogenated amorphous silicon layer is increased, so that a preparation process window is widened, the manufacturing difficulty of a battery is reduced, the series resistance is remarkably improved, and the performance of the battery is improved.
According to an embodiment of the invention, the doping concentration of the lightly doped n-type hydrogenated amorphous silicon layer is 10 8-1017/cm3.
According to an embodiment of the present invention, the thickness of the lightly doped n-type hydrogenated amorphous silicon buffer layer 200 is 1-15nm. Since the hydrogenated amorphous silicon buffer layer can integrate the passivation effect and reduce the potential barrier, the thickness of the hydrogenated amorphous silicon buffer layer can be allowed to be appropriately increased, so that the process window can be widened.
Heavily doped p-type hydrogenated amorphous silicon emitter layer 300: according to an embodiment of the present invention, the heavily doped p-type hydrogenated amorphous silicon emitter layer 300 is formed on the surface of the one-side lightly doped n-type hydrogenated amorphous silicon buffer layer 200, that is, the heavily doped p-type hydrogenated amorphous silicon emitter layer 300 is formed on one of the two outer surfaces of the lightly doped n-type hydrogenated amorphous silicon buffer layer 200.
According to an embodiment of the present invention, the hydrogenated amorphous silicon emitter layer 300 has a thickness of 5-25nm. The heavily doped p-type hydrogenated amorphous silicon emitter layer can be used to form a p-n junction built-in electric field with the n-type crystalline silicon substrate layer. As the emitter, the p layer with high carrier concentration has strong absorption to the short wave light, and the p-type B doping has more internal defects, so that the hole pairs formed by absorbed photons are easy to recombine at the defects, and the short wave light is lost, therefore, the amorphous silicon in the heavily doped p-type hydrogenated amorphous silicon emitter layer needs to have high enough doping concentration and small thickness as possible. On the other hand, if the thickness of the heavily doped p-type hydrogenated amorphous silicon emitter layer is too small, carriers in a large part of the region of the heavily doped p-type hydrogenated amorphous silicon emitter layer may be depleted due to being located near the p-n junction, influencing the output of current, and by disposing the first lightly doped n-type hydrogenated amorphous silicon layer between the heavily doped p-type hydrogenated amorphous silicon emitter layer and the n-type crystalline silicon substrate, the influence of depletion of carriers may be effectively reduced, thereby further improving the performance of the battery.
Heavily doped n-type hydrogenated amorphous silicon back surface field layer 400: the heavily doped n-type hydrogenated amorphous silicon back surface field layer 400 is formed on the surface of the other side lightly doped n-type hydrogenated amorphous silicon buffer layer 200 according to an embodiment of the present invention. That is, the heavily doped n-type hydrogenated amorphous silicon back surface layer 400 is formed on the other of the two outer surfaces of the lightly doped n-type hydrogenated amorphous silicon buffer layer.
Therefore, an electric field formed between the heavily doped n-type hydrogenated amorphous silicon back surface field layer and the n-type crystalline silicon substrate layer can help carriers to be effectively transferred to the conductive layer, and a lightly doped n-type hydrogenated amorphous silicon buffer layer arranged between the heavily doped n-type hydrogenated amorphous silicon back surface field layer and the n-type crystalline silicon substrate layer can reduce carrier recombination, so that the performance of the battery is improved.
According to an embodiment of the present invention, the heavily doped n-type hydrogenated amorphous silicon back surface field layer 300 has a thickness of 5-25nm. Thus, the recombination of carriers on the cell surface is significantly reduced, and the efficiency of the solar cell is higher.
Transparent conductive oxide layer 500: the transparent conductive oxide layer 500 is formed on the surfaces of the heavily doped p-type hydrogenated amorphous silicon emitter layer 300 and the heavily doped n-type hydrogenated amorphous silicon back surface field layer 400 according to an embodiment of the present invention.
Alloy gate line electrode layer 600: according to an embodiment of the present invention, the alloy gate line electrode layer 600 is formed on the surface of at least one of the transparent conductive oxide layer 500, the heavily doped n-type hydrogenated amorphous silicon back surface field layer 400, and the heavily doped p-type hydrogenated amorphous silicon emitter layer 300. Therefore, the grid line electrode layer adopts alloy materials to improve the adhesive force of the surface of the battery, improve the matching degree of the thermal expansion coefficient between the battery material and the electrode material and the like, and can also have the function of local doping on the contact position of the battery and the electrode through doping elements to reduce the series resistance of an emitter and the grid line, thereby realizing the function of improving the filling factor and the efficiency of the battery.
Note that, the electrode protection layer 700 may be formed on the entire surface of the alloy gate line electrode layer 600 or on a part of the surface. For example, the alloy grid electrode layer 600 includes lateral, thinner, denser secondary grids, the primary function being current conduction in the cell, and longitudinal, thicker primary grids, the primary function being collection of the conducted current and connection to other cells by welding in subsequent assembly fabrication. Because the auxiliary grid lines are more and thinner, the requirement on forming the electrode protection layer is higher, if the protection layer can be only manufactured on the main grid line, the precision requirement can be reduced, and the process window is further widened.
According to an embodiment of the present invention, the alloy gate line electrode layer 600 includes: an alloy transition layer 610 and a copper-containing conductive alloy layer 620, wherein the alloy transition layer 610 is formed on a surface of at least one of the transparent conductive oxide layer 500, the hydrogenated amorphous silicon back surface field layer 400 and the heavily doped p-type hydrogenated amorphous silicon emitter layer 300, and the copper-containing conductive alloy layer 620 is formed on a surface of the alloy transition layer 610. The alloy transition layer 610 of the solar cell may be formed on the transparent conductive oxide layer 500, the hydrogenated amorphous silicon back surface field layer 400, or the heavily doped p-type hydrogenated amorphous silicon emitter layer 300, or may be formed on any two or three layers thereof, respectively. Therefore, the alloy grid line electrode layer taking copper as a main component can keep lower resistivity, greatly reduce the use of noble metals such as Ag and the like, effectively improve the oxidation resistance, corrosion resistance and the like of single metal by alloying to a certain extent, and enhance the environmental stability of the electrode. Meanwhile, the alloy transition layer can also increase the adhesive force of the electrode on the surface of the battery, improve the matching degree of the thermal expansion coefficient between the battery material and the electrode material and the like, and can locally dope the contact position of the battery and the electrode through doping elements, so that the series resistance of the emitter and the grid line is reduced, and the effects of improving the battery filling factor and the battery efficiency are realized.
According to an embodiment of the present invention, the transparent conductive oxide layer 500 has a thickness of 50-200nm.
According to an embodiment of the present invention, the alloy transition layer 610 contains at least two metals selected from Cu, mo, W, ti, ni, cr, al, mg, ta, sn, zn and Ag. According to a preferred embodiment of the present invention, the alloy transition layer 610 contains a Ni-Cu-Sn alloy, a Ni-Cu-In alloy, or a Ni-Al alloy, wherein Ni In the alloy can provide good adhesion to silicon, cu In the Ni-Cu-Sn or Ni-Cu-In alloy can reduce the resistivity of the alloy electrode and provide a base layer for subsequent electroplating, sn In the Ni-Cu-Sn alloy can form ohmic contact with tin-doped indium oxide, and group iii element Al In the Ni-Al alloy can form good contact with the p-type hydrogenated amorphous silicon emitter layer after annealing diffusion, reducing the resistivity. Further, according to an embodiment of the present invention, the Ni-Cu-Sn alloy contains 30 to 50 mass% of Ni,35 to 55 mass% of Cu and 15 to 25 mass% of Sn, the Ni-Cu-In alloy contains 30 to 50 mass% of Ni,35 to 55 mass% of Cu and 15 to 25 mass% of In, and the Ni-Al alloy contains 3 to 6 mass% of Al and 94 to 97 mass% of Ni. Therefore, the alloy has a lower melting point, and is favorable for forming an alloy electrode with good performance in subsequent low-temperature heat treatment.
According to an embodiment of the present invention, the thickness of the alloy transition layer 610 is 5-300nm.
According to an embodiment of the present invention, the copper-containing conductive alloy layer 620 contains Cu and at least one metal selected from Mo, W, ti, ni, cr, al, mg, ta, sn, zn and Ag. Thus, by selecting an appropriate metal to alloy with Cu, the weather resistance of the electrode is significantly improved while not substantially affecting the electrical conductivity.
The copper-containing conductive alloy layer 620 has a thickness of 1-100 μm in accordance with an embodiment of the present invention.
Electrode protection layer 700: the electrode protection layer 700 is formed on the surface of the alloy gate line electrode layer 600 according to an embodiment of the present invention. Therefore, the electrode protection layer can improve the environmental impact resistance and the weldability of the alloy electrode, solves the problem that the alloy grid line electrode, especially the copper alloy grid line electrode is easy to corrode and oxidize in a humid environment, and ensures that the alloy grid line electrode layer has good oxidation resistance, corrosion resistance and weldability.
According to an embodiment of the present invention, the electrode protection layer 700 is formed of tin or a tin alloy. Therefore, the electrode protection layer can obviously improve the environmental impact resistance and the weldability of the alloy electrode, so that the alloy grid line electrode layer has good oxidation resistance, corrosion resistance and weldability. According to a preferred embodiment of the present invention, the electrode protection layer 700 is formed of a tin alloy. Compared with a welding layer of a single tin element, the bonding force between the alloying protective layer and the conductive layer of the alloy electrode is obviously enhanced.
According to an embodiment of the present invention, the tin alloy contains Sn and at least one element selected from Cu, ag, zn, bi and In. Therefore, the bonding force between the tin alloyed protective layer and the conductive layer of the alloy electrode is enhanced, the alloy of the protective layer does not contain Pb, the environment is protected, and the harm to human bodies is greatly reduced.
According to an embodiment of the present invention, the electrode protection layer 700 contains not less than 50 mass% tin. Therefore, by increasing the tin content in the alloy, the weather resistance and weldability of the protective layer are enhanced and the melting point of the alloy is reduced under the condition that the good adhesion between the electrode protective layer and the alloy electrode is ensured.
According to another aspect of the present invention, there is provided a method of preparing the aforementioned solar cell. According to an embodiment of the present invention, the method of manufacturing the aforementioned solar cell is explained, the method including:
S100 provides n-type crystalline silicon substrate layer
According to an embodiment of the present invention, an n-type crystalline silicon substrate layer is provided. Specifically, the substrate layer is cleaned, and suede structures are manufactured on the upper surface and the lower surface of the substrate layer.
According to an embodiment of the invention, the substrate layer is an n-type crystalline silicon substrate layer. Further, according to the embodiment of the present invention, the type of the crystalline silicon in the n-type crystalline silicon substrate layer is not particularly limited, and a person skilled in the art may select according to actual needs, and according to the embodiment of the present invention, the n-type crystalline silicon substrate layer is an n-type monocrystalline silicon substrate or an n-type polycrystalline silicon substrate.
S200 forming a lightly doped n-type hydrogenated amorphous silicon buffer layer
According to an embodiment of the present invention, lightly doped n-type hydrogenated amorphous silicon buffer layers are formed on upper and lower side surfaces of a substrate layer. Specifically, according to an embodiment of the present invention, the hydrogenated amorphous silicon buffer layer is formed using a chemical deposition method. The hydrogenated amorphous silicon buffer passivation layer may reduce defects in the crystal lattice by introducing hydrogen atoms to repair dangling bonds in the deposited silicon film.
S300 forming a heavily doped p-type hydrogenated amorphous silicon emitter layer
According to an embodiment of the present invention, a heavily doped p-type hydrogenated amorphous silicon emitter layer is formed on a surface of a one-side lightly doped n-type hydrogenated amorphous silicon buffer layer.
S400 forming a heavily doped n-type hydrogenated amorphous silicon back surface field layer
According to an embodiment of the present invention, a heavily doped n-type hydrogenated amorphous silicon back surface field layer is formed on the surface of the other side lightly doped n-type hydrogenated amorphous silicon layer.
S500 formation of transparent conductive oxide layer
According to an embodiment of the present invention, a transparent conductive oxide layer is formed on the surfaces of the heavily doped p-type hydrogenated amorphous silicon emitter layer and the heavily doped n-type hydrogenated amorphous silicon back surface field layer. According to an embodiment of the present invention, the kinds of the two transparent conductive oxide layers on the surfaces of the heavily doped p-type hydrogenated amorphous silicon emitter layer and the heavily doped n-type hydrogenated amorphous silicon back surface field layer may be the same or different.
According to an embodiment of the present invention, the lightly doped n-type hydrogenated amorphous silicon buffer layer, the heavily doped p-type hydrogenated amorphous silicon emitter layer, and the heavily doped n-type hydrogenated amorphous silicon back surface field layer are formed by at least one of ion-enhanced chemical vapor deposition, hot filament chemical vapor deposition, microwave plasma chemical vapor deposition, or electron cyclotron resonance chemical vapor deposition.
S600 forming alloy grid line electrode layer
According to an embodiment of the present invention, an alloy gate line electrode layer is formed on a surface of at least one of a transparent conductive oxide layer, a heavily doped n-type hydrogenated amorphous silicon back surface field layer, and a heavily doped p-type hydrogenated amorphous silicon emitter layer. Therefore, the grid line electrode layer adopts alloy materials to improve the adhesive force of the surface of the battery, improve the matching degree of the thermal expansion coefficient between the battery material and the electrode material and the like, and can also have the function of local doping on the contact position of the battery and the electrode through doping elements to reduce the series resistance of an emitter and the grid line, thereby realizing the function of improving the filling factor and the efficiency of the battery.
According to an embodiment of the present invention, an alloy gate line electrode layer contains an alloy transition layer and a copper-containing conductive alloy layer.
According to an embodiment of the invention, the alloy transition layer is formed by physical vapor deposition. According to a preferred embodiment of the present invention, the alloy transition layer is formed by physical vapor deposition, both evaporation and sputtering.
According to an embodiment of the present invention, the copper-containing conductive alloy layer is formed by electroplating.
S700 electrode protection layer formation
According to an embodiment of the present invention, an electrode protection layer is formed on the surface of an alloy gate line electrode layer. Therefore, by forming the electrode protection layer on the surface of the alloy grid line electrode layer of the solar cell, the environment influence resistance and the weldability of the alloy electrode are improved, the problem that the alloy grid line electrode, especially the copper alloy grid line electrode, is easy to corrode and oxidize in a wet environment is solved, and the alloy grid line electrode layer has good oxidation resistance, corrosion resistance and weldability.
According to the embodiment of the present invention, the method of forming the electrode protective layer is not particularly limited, and one skilled in the art may select according to actual production conditions. According to some embodiments of the invention, the electrode protective layer is formed by coating the electrode surface with molten tin.
According to some embodiments of the invention, the electrode protective layer is formed using a screen printing method or a jet printing method. According to some embodiments of the invention, the electrode protection layer is formed by physical vapor deposition. According to a preferred embodiment of the present invention, the physical vapor deposition method is an evaporation deposition method and a sputtering deposition method. According to some embodiments of the invention, the electrode protection layer is formed using electroless chemical deposition. According to some embodiments of the invention, the electrode protection layer is formed by electroplating. Therefore, the method for forming the electrode protection layer is simple, the formed electrode protection layer is uniformly coated on the surface of the alloy grid line electrode layer, a good protection effect is achieved on the alloy electrode layer, and the completion of a subsequent welding process is facilitated.
The invention will now be described with reference to specific examples, which are intended to be illustrative only and are not to be construed as limiting the invention.
Example 1
The bulk layer of a silicon heterojunction solar cell was prepared as follows:
(1) An n-type crystalline silicon substrate 100 is provided, the n-type crystalline silicon substrate 100 is cleaned, and a textured structure is formed on the upper surface and the lower surface.
(2) And (5) placing the n-type crystalline silicon substrate in a hydrogen atmosphere for hydrogenation pretreatment.
(3) A lightly doped n-type hydrogenated amorphous silicon (a-Si: H) buffer layer using phosphorus element (P) as a doping element with a doping concentration of 10 14/cm3 and a thickness of 6nm was deposited on the upper and lower surfaces of the n-type crystalline silicon substrate 100.
(4) A heavily doped p-type a-Si: H emitter layer 300 using boron element (B) as a doping element, having a doping concentration of 10 18/cm3 and a thickness of 15nm, was deposited on the surface of the lightly doped n-type hydrogenated amorphous silicon (a-Si: H) buffer layer located on the upper surface.
(5) A heavily doped n-type a-Si: H back surface field layer is deposited on the surface of the lightly doped n-type hydrogenated amorphous silicon (a-Si: H) buffer layer located on the lower surface, and the heavily doped n-type a-Si: H back surface field layer 400 uses phosphorus (P) as a doping element, with a doping concentration in the range of 10 17/cm3 and a thickness of 10nm.
The first lightly doped n-type a-Si H layer, the second lightly doped n-type a-Si H layer, the heavily doped p-type a-Si H emitter layer and the heavily doped n-type a-Si H back surface field layer are prepared by PECVD, and the deposited plasma power density is 1-200 mW/cm 2.
(6) Transparent conductive oxide layers 500, which are tin-doped indium oxide (ITO) and have a thickness of 200nm, are respectively deposited on the upper surface of the heavily doped p-type a-Si: H emitter layer 300 and the lower surface of the heavily doped n-type a-Si: H back surface field layer 400, thereby obtaining a body layer of the solar cell.
Example 2
Referring to fig. 3, the method for manufacturing a silicon heterojunction solar cell using the method for manufacturing a solar cell of the embodiment of the present invention comprises the following steps:
(1) A ti—al alloy transition layer 610 having a thickness of 20nm was formed on the surface of the transparent conductive oxide of the host layer prepared in example 1 by a magnetron sputtering method.
(2) A photoresist film 630 is formed on the ti—al alloy transition layer 610 by spin coating, and dried by heating to form a dry film.
(3) And forming a position hole of a pattern of a predetermined electrode on the dry film by using a mask plate with an electrode pattern and a photolithography method.
(4) A Cu metal layer 620 having a thickness of 30 μm is formed at the openings of the dry film by electroplating, and is electrically insulated from the dry film, so that the portions outside the openings are not plated with Cu.
(5) The dry film is removed with a solvent while exposing the transition layer metal under the dry film. The removal of the transition metal film with acid, it is noted that during the removal of the transition metal layer 610, a certain corrosion effect on the formed copper-containing conductive alloy layer 620 is unavoidable. Since the copper conductive metal layer 620 is much thicker than the transition metal layer 610, the corrosion is relatively slight and does not adversely affect the performance of the subsequent electrode.
(6) A flux was applied to the open site by screen printing, and then a2 μm thick low temperature paste containing Sn-30Bi-5In was applied.
(7) The electrode is heated to 220 c in a vacuum or inert gas atmosphere and held for 45 minutes to sinter and solidify the tin paste, and the alloy transition layer 610 and Cu metal layer 620 form an alloy gate line electrode layer 600. After this step, an electrode protection layer 700 is formed on the alloy electrode of the lightly doped silicon heterojunction.
Example 3
Referring to fig. 4, the method for manufacturing a silicon heterojunction solar cell using the method for manufacturing a solar cell of the embodiment of the present invention comprises the following steps:
(1) A ti—al alloy transition layer 610 having a thickness of 20nm was formed on the surface of the transparent conductive oxide of the host layer prepared in example 1 by a magnetron sputtering method.
(2) A photoresist film 630 is formed on the ti—al alloy transition layer 610 by spin coating, and dried by heating to form a dry film.
(3) And forming a position hole of a pattern of a predetermined electrode on the dry film by using a mask plate with an electrode pattern and a photolithography method.
(4) A Cu metal layer 620 having a thickness of 30 μm is formed at the openings of the dry film by electroplating, and is electrically insulated from the dry film, so that the portions outside the openings are not plated with Cu.
(5) A second electroplating is performed using a tin electroplating method to form a layer of metallic Sn on the Cu metal layer 620.
(6) The dry film and the transition metal layer under the dry film are removed by a solvent. The method is described in detail in "step (5)" of example 2.
(7) The electrode is heated to 220 ℃ in a vacuum or inert gas protection environment and kept for 45 minutes, the alloy transition layer 610 and the Cu metal layer 620 form an alloy grid line electrode layer 600, and tin paste is sintered and solidified to form a protective layer 700 on the alloy electrode of the lightly doped silicon heterojunction.
Example 4
Referring to fig. 5, the method for manufacturing a silicon heterojunction solar cell using the method for manufacturing a solar cell of the embodiment of the present invention comprises the following steps:
(1) A portion of the transparent conductive oxide layer 500 is removed to form a predetermined pattern of the transparent conductive oxide layer 500, wherein the transparent conductive oxide layer 500 is the transparent conductive oxide layer 500 of the near heavily doped p-type hydrogenated amorphous silicon emitter layer 300.
(2) And (3) forming a Ti-Al alloy transition layer 610 with the thickness of 20nm on the surface obtained in the step (1) by adopting a magnetron sputtering method.
(3) A photoresist film 630 is formed on the ti—al alloy transition layer 610 by spin coating, and dried by heating to form a dry film.
(4) And forming a position hole of a pattern of a predetermined electrode on the dry film by using a mask plate with an electrode pattern and a photolithography method.
(5) A Cu metal layer 620 having a thickness of 30 μm is formed at the openings of the dry film by electroplating, and is electrically insulated from the dry film, so that the portions outside the openings are not plated with Cu.
(6) The battery with the alloy transition layer 610 and the copper-containing conductive alloy layer 620 formed thereon is immersed in a plating solution, and the reaction time is 5-60min at 30-90 ℃ to form the Sn-Zn-containing alloy thin film 700. The alloy film forms an alloy protective layer through the subsequent steps, the plating solution formula is shown in the table below, and the plating solution contains Sn 2+ compound, zn 2+ compound, reducer, complexing agent thiourea, surfactant citric acid and the like. The temperature of the plating solution is 30-90 ℃ and the reaction time is 5-60min.
(7) And removing the dry film by adopting a chemical reagent, and simultaneously, peeling off the Sn-Zn alloy protective layer coating film except for the open position of the dry film together with the dry film. The transition metal layer under the dry film is removed with acid.
(8) The electrode is heated to 220 c in a vacuum or inert gas atmosphere and held for 45 minutes to sinter and solidify the tin paste, and the alloy transition layer 610 and Cu metal layer 620 form an alloy gate line electrode layer 600. After this step, an electrode protection layer 700 is formed on the alloy electrode of the lightly doped silicon heterojunction.
Example 5
The method for preparing a solar cell according to the embodiment of the present invention prepares a silicon heterojunction solar cell, as shown in fig. 6, wherein a gate electrode layer of the solar cell is composed of a main gate line and a sub-gate line, and the steps are as follows with reference to fig. 7:
(1) On the surface of the transparent conductive oxide layer 500 of the host layer prepared in example 1, a transition metal layer 610 is deposited using a PVD method, and the transition metal layer 610 is formed of a Ni-Cu-Sn alloy having a composition of 30-50% wt of Ni, 35-55% wt of Cu, 15-25% wt of Sn, and a thickness of 50-80nm.
(2) A photoresist film is prepared on the surface of the transition metal layer 610 as a mask layer 630, and openings are formed at electrode positions on the layer 630, and the method for forming the openings is described in detail in steps (2) and (3) of example 2.
(3) A copper conductive metal layer 620 is deposited on the surface of the transition metal layer using an electroplating technique, thereby forming a main gate line and a sub-gate line, wherein a thicker electrode represents the main gate line and a thinner electrode represents the sub-gate line.
(4) Removing the mask layer 630 and the transition metal layer 610 in the non-electrode region, wherein the method of removing is copper step (5) of example 2
(5) The method of screen printing was used to print tin solder on top of the electrode to form the protective layer 700, and then annealing treatment was performed in vacuum or in a protective atmosphere, the main difference being that the screen pattern was different, the corresponding sub-gate lines of the screen were not opened, and thus the tin solder was printed only on top of the main gate lines, wherein the composition of the lead-free tin solder was sn—ag—cu alloy, wherein the Sn content was 96.5 wt%, the Ag content was 3.0 wt%, and the Cu content was 0.5 wt%, thereby obtaining a silicon heterojunction solar cell.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the invention, the scope of which is defined by the claims and their equivalents.
Claims (25)
1. A silicon heterojunction solar cell, comprising:
An n-type crystalline silicon substrate layer;
the lightly doped n-type hydrogenated amorphous silicon buffer layer is formed on the upper side surface and the lower side surface of the n-type crystalline silicon substrate layer;
A heavily doped p-type hydrogenated amorphous silicon emitter layer formed on a surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at one side;
the heavily doped n-type hydrogenated amorphous silicon back surface field layer is formed on the surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at the other side;
A transparent conductive oxide layer formed on at least a portion of a surface of the heavily doped p-type hydrogenated amorphous silicon emitter layer or the heavily doped n-type hydrogenated amorphous silicon back surface field layer;
An alloy gate line electrode layer formed on a surface of at least one of the transparent conductive oxide layer, the heavily doped n-type hydrogenated amorphous silicon back surface field layer, and the heavily doped p-type hydrogenated amorphous silicon emitter layer; and
An electrode protection layer formed on a surface of the alloy gate line electrode layer, the electrode protection layer being formed of a tin alloy; the tin alloy contains Sn and at least one element selected from Cu, ag, zn, bi and In, the electrode protection layer contains not less than 50 mass% of Sn, and the electrode protection layer further contains at least one element selected from B, P, ga and Al.
2. The silicon heterojunction solar cell of claim 1, wherein the doping concentration of the lightly doped n-type hydrogenated amorphous silicon layer is 10 8-1017/cm3.
3. The silicon heterojunction solar cell of claim 1, wherein the alloy gate line electrode layer comprises:
An alloy transition layer formed on a surface of at least one of the transparent conductive oxide layer, the heavily doped n-type hydrogenated amorphous silicon back surface field layer, and the heavily doped p-type hydrogenated amorphous silicon emitter layer; and
And a copper-containing conductive alloy layer formed on a surface of the alloy transition layer.
4. The silicon heterojunction solar cell of claim 1, wherein the alloy transition layer comprises at least two metals selected from Cu, mo, W, ti, ni, cr, al, mg, ta, sn, zn and Ag.
5. A silicon heterojunction solar cell as claimed in claim 3, wherein the copper-containing conductive alloy layer contains Cu and at least one metal selected from Mo, W, ti, ni, cr, al, mg, ta, sn, zn and Ag.
6. The silicon heterojunction solar cell of claim 1, wherein the thickness of the substrate layer is 50-200 μιη.
7. The silicon heterojunction solar cell of claim 1, wherein the hydrogenated amorphous silicon buffer layer has a thickness of 1-15nm.
8. The silicon heterojunction solar cell of claim 1, wherein the hydrogenated amorphous silicon emitter layer has a thickness of 5-25nm.
9. The silicon heterojunction solar cell of claim 1, wherein the hydrogenated amorphous silicon back surface field layer has a thickness of 5-25nm.
10. The silicon heterojunction solar cell of claim 1, wherein the thickness of the transparent conductive oxide layer is 50-300nm.
11. The silicon heterojunction solar cell of claim 1, wherein the thickness of the alloy transition layer is 5-300nm.
12. A silicon heterojunction solar cell as claimed in claim 3, wherein the copper-containing conductive alloy layer has a thickness of 1-100 μm.
13. The silicon heterojunction solar cell of claim 1, wherein the thickness of the electrode protection layer is 0.3-25 μm.
14. A method of making the silicon heterojunction solar cell of any one of claims 1-13, comprising:
Providing an n-type crystalline silicon substrate layer;
Forming lightly doped n-type hydrogenated amorphous silicon buffer layers on the upper side surface and the lower side surface of the n-type crystalline silicon substrate layer;
forming a heavily doped p-type hydrogenated amorphous silicon emitter layer on the surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at one side;
Forming a heavily doped n-type hydrogenated amorphous silicon back surface field layer on the surface of the lightly doped n-type hydrogenated amorphous silicon buffer layer at the other side;
Forming a transparent conductive oxide layer on the surfaces of the heavily doped p-type hydrogenated amorphous silicon emitter layer and the heavily doped n-type hydrogenated amorphous silicon back surface field layer;
Forming an alloy gate line electrode layer on the surface of at least one of the transparent conductive oxide layer, the heavily doped n-type hydrogenated amorphous silicon back surface field layer and the heavily doped p-type hydrogenated amorphous silicon emitter layer; and
And forming an electrode protection layer on the surface of the alloy grid line electrode layer.
15. The method of claim 14, wherein the alloy gate line electrode layer comprises an alloy transition layer and a copper-containing conductive alloy layer.
16. The method of claim 14, wherein the alloy transition layer is formed using physical vapor deposition.
17. The method of claim 15, wherein the copper-containing conductive alloy layer is formed using an electroplating process.
18. The method of claim 16, wherein the physical vapor deposition method is an evaporation deposition method and a sputtering deposition method.
19. The method according to claim 14, wherein the electrode protective layer contains Sn and at least one element selected from Cu, ag, zn, bi and In, and wherein the content of tin is not less than 50 mass%.
20. The method of claim 14, wherein the electrode protective layer is formed by coating the electrode surface with molten tin.
21. The method of claim 14, wherein the electrode protective layer is formed using a screen printing method or a jet printing method.
22. The method of claim 14, wherein the electrode protection layer is formed using physical vapor deposition.
23. The method of claim 14, wherein the electrode protection layer is formed using electroless chemical deposition.
24. The method of claim 14, wherein the electrode protection layer is formed using an electroplating process.
25. The method of claim 22, wherein the physical vapor deposition method is an evaporation deposition method and a sputtering deposition method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710461478.8A CN109148616B (en) | 2017-06-16 | 2017-06-16 | Silicon heterojunction solar cell and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710461478.8A CN109148616B (en) | 2017-06-16 | 2017-06-16 | Silicon heterojunction solar cell and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109148616A CN109148616A (en) | 2019-01-04 |
| CN109148616B true CN109148616B (en) | 2024-09-13 |
Family
ID=64803894
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710461478.8A Active CN109148616B (en) | 2017-06-16 | 2017-06-16 | Silicon heterojunction solar cell and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109148616B (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110212060B (en) * | 2019-05-21 | 2021-12-10 | 苏州联诺太阳能科技有限公司 | Battery preparation method, battery assembly and solar power supply station |
| CN111640802A (en) * | 2020-04-20 | 2020-09-08 | 常州比太黑硅科技有限公司 | HIT battery without back silver electrode and manufacturing method thereof |
| CN114447125A (en) * | 2020-11-02 | 2022-05-06 | 苏州阿特斯阳光电力科技有限公司 | Heterojunction solar cell and manufacturing method thereof |
| CN112687755B (en) | 2020-12-28 | 2023-03-28 | 正泰新能科技有限公司 | Back metal electrode of N-type TopCOn solar cell, preparation method and cell |
| CN114420796B (en) * | 2022-02-11 | 2024-10-29 | 安徽华晟新能源科技股份有限公司 | A method for preparing an electrode and a method for preparing a solar cell |
| CN114420795B (en) * | 2022-02-11 | 2024-08-09 | 安徽华晟新能源科技股份有限公司 | A method for preparing an electrode and a method for preparing a solar cell |
| CN114551610B (en) * | 2022-03-11 | 2024-05-31 | 广东爱旭科技有限公司 | A solar cell, electrode structure, battery assembly, power generation system and preparation method |
| CN114335257B (en) | 2022-03-11 | 2022-08-19 | 浙江爱旭太阳能科技有限公司 | Preparation method of solar cell, solar cell module and power generation system |
| CN115394864A (en) * | 2022-03-11 | 2022-11-25 | 浙江爱旭太阳能科技有限公司 | Conductive contact structure and assembly of solar cell and power generation system |
| CN114823935B (en) * | 2022-05-16 | 2024-05-03 | 东方日升新能源股份有限公司 | Heterojunction battery and preparation method thereof |
| CN120857633A (en) * | 2024-01-19 | 2025-10-28 | 长三角太阳能光伏技术创新中心 | Solar cells, photovoltaic modules and photovoltaic systems |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103730532A (en) * | 2014-01-10 | 2014-04-16 | 常州天合光能有限公司 | Hydrogen-doped crystallized silicon passivated heterojunction solar cell |
| CN105006316A (en) * | 2015-06-03 | 2015-10-28 | 常熟市林芝电子有限责任公司 | Vacuum sputtering electrode of ceramic thermistor and manufacturing method thereof |
| CN205231076U (en) * | 2015-11-02 | 2016-05-11 | 钧石(中国)能源有限公司 | Heterojunction solar cell |
| US9496429B1 (en) * | 2015-12-30 | 2016-11-15 | Solarcity Corporation | System and method for tin plating metal electrodes |
| CN207398154U (en) * | 2017-06-16 | 2018-05-22 | 国家电投集团科学技术研究院有限公司 | Silicon heterojunction solar battery |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110277825A1 (en) * | 2010-05-14 | 2011-11-17 | Sierra Solar Power, Inc. | Solar cell with metal grid fabricated by electroplating |
| KR20120122003A (en) * | 2011-04-28 | 2012-11-07 | 현대중공업 주식회사 | Hetero-Junction Solar Cell |
| KR20120127910A (en) * | 2011-05-16 | 2012-11-26 | 현대중공업 주식회사 | Heterojunction solar cell and manufacturing method therefor |
| CN103227246A (en) * | 2013-04-11 | 2013-07-31 | 浙江正泰太阳能科技有限公司 | Preparation method of heterojunction cell |
| CN103413838B (en) * | 2013-07-23 | 2016-12-07 | 新奥光伏能源有限公司 | A kind of crystal-silicon solar cell and preparation method thereof |
| CN106252466B (en) * | 2016-09-20 | 2018-03-20 | 深圳市科纳能薄膜科技有限公司 | A kind of back contacts hetero-junctions monocrystaline silicon solar cell and preparation method thereof |
-
2017
- 2017-06-16 CN CN201710461478.8A patent/CN109148616B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103730532A (en) * | 2014-01-10 | 2014-04-16 | 常州天合光能有限公司 | Hydrogen-doped crystallized silicon passivated heterojunction solar cell |
| CN105006316A (en) * | 2015-06-03 | 2015-10-28 | 常熟市林芝电子有限责任公司 | Vacuum sputtering electrode of ceramic thermistor and manufacturing method thereof |
| CN205231076U (en) * | 2015-11-02 | 2016-05-11 | 钧石(中国)能源有限公司 | Heterojunction solar cell |
| US9496429B1 (en) * | 2015-12-30 | 2016-11-15 | Solarcity Corporation | System and method for tin plating metal electrodes |
| CN207398154U (en) * | 2017-06-16 | 2018-05-22 | 国家电投集团科学技术研究院有限公司 | Silicon heterojunction solar battery |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109148616A (en) | 2019-01-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109148616B (en) | Silicon heterojunction solar cell and preparation method thereof | |
| US9634176B2 (en) | Method for manufacturing crystalline silicon-based solar cell and method for manufacturing crystalline silicon-based solar cell module | |
| US9812594B2 (en) | Solar cell and method of manufacture thereof, and solar cell module | |
| EP2993700B1 (en) | Production method for a solar cell | |
| CN112310233B (en) | Solar cell, production method and cell module | |
| JP5449849B2 (en) | Solar cell and method for manufacturing the same | |
| CN108987488B (en) | Silicon heterojunction solar cell and preparation method thereof | |
| US9496429B1 (en) | System and method for tin plating metal electrodes | |
| US9153730B2 (en) | Solar cell front contact doping | |
| CN101632180A (en) | Hybrid silicon solar cell and method for manufacturing same | |
| JP2023133150A (en) | Solar cell manufacturing method, solar cell module, and power generation system | |
| CN101764179A (en) | Manufacture method of selective front surface field N-type solar cell | |
| WO2011045287A1 (en) | Device comprising electrical contacts and its production process | |
| CN109148614B (en) | Silicon heterojunction solar cell and preparation method thereof | |
| JP3619681B2 (en) | Solar cell and manufacturing method thereof | |
| CN207398154U (en) | Silicon heterojunction solar battery | |
| CN116072738A (en) | Solar cell and its preparation method | |
| CN103201854A (en) | Solar cell device and manufacturing method thereof | |
| CN101764180A (en) | Method for manufacturing local front-surface field N-type solar cell | |
| CN108428492A (en) | Front electrode of solar battery slurry | |
| CN103988316B (en) | Solar device and manufacturing method thereof | |
| CN207398153U (en) | Silicon heterojunction solar battery | |
| JP2015153831A (en) | SOLAR CELL, MANUFACTURING METHOD THEREOF, AND SOLAR CELL MODULE | |
| RU172396U1 (en) | SUN ELEMENT | |
| EP4589664A1 (en) | Photovoltaic device and its method of manufacture |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20220413 Address after: 330096 Building 1, Photoelectric Industrial Park, Yaohu West Avenue, high tech Industrial Development Zone, Nanchang, Jiangxi Province Applicant after: State Power Investment Group New Energy Technology Co.,Ltd. Address before: 102209 Beijing Changping Future Science and Technology City Applicant before: STATE POWER INVESTMENT CORPORATION Research Institute |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: 330096 Jiangxi Province, Nanchang City, Nanchang High-tech Industrial Development Zone, No. 18 Gaoxin Second Road, Chuangye Building, Room 302, Chuan Ye Yuan Patentee after: Guodian Investment New Energy Technology Co.,Ltd. Country or region after: China Address before: 330096 Building 1, Photoelectric Industrial Park, Yaohu West Avenue, high tech Industrial Development Zone, Nanchang, Jiangxi Province Patentee before: State Power Investment Group New Energy Technology Co.,Ltd. Country or region before: China |
|
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: 330000 Jiangxi Province Nanchang City Nanchang High-tech Industrial Development Zone No. 18, Gaoxin Second Road Room 302, Entrepreneurship Building, Entrepreneurship Park Patentee after: Jiangxi Electric Power Investment New Energy Technology Co.,Ltd. Country or region after: China Address before: 330096 Jiangxi Province, Nanchang City, Nanchang High-tech Industrial Development Zone, No. 18 Gaoxin Second Road, Chuangye Building, Room 302, Chuan Ye Yuan Patentee before: Guodian Investment New Energy Technology Co.,Ltd. Country or region before: China |