CN109089351B - LED driving power supply chip - Google Patents
LED driving power supply chip Download PDFInfo
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- CN109089351B CN109089351B CN201811216151.5A CN201811216151A CN109089351B CN 109089351 B CN109089351 B CN 109089351B CN 201811216151 A CN201811216151 A CN 201811216151A CN 109089351 B CN109089351 B CN 109089351B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
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Abstract
The invention relates to an LED driving power supply chip, wherein the high-voltage power supply module comprises: a first field effect transistor; the source electrode of the second field effect transistor outputs a power supply voltage to the internal circuit; the drain electrode of the second switching tube is connected with the source electrode of the first field effect tube; the drain electrode of the fifth switching tube is connected with the source electrode of the first field effect tube, the grid electrode of the fifth switching tube is connected with the source electrode of the second switching tube, and the source electrode of the fifth switching tube outputs a driving voltage to the driving module; one end of the first resistor is connected with the source electrode of the first field effect tube, and the other end of the first resistor is connected with the grid electrode of the second switching tube; a first clamp circuit connected between the gate and the source of the second switching tube; and the second clamping circuit is connected between the grid electrode and the source electrode of the fifth switching tube. The invention can ensure the normal operation of the LED driving chip on the premise of saving the pin vcc and the voltage stabilizing capacitor at the periphery of the pin vcc, thereby reducing the cost of the chip and the system.
Description
Technical Field
The present disclosure relates to integrated circuits, and particularly to an LED driving power chip.
Background
Through several generations of LED lighting technologies, the cost of the existing LED driving technology is greatly reduced compared with that of the traditional LED lighting scheme, and this direction is one of the advantages of the accelerated development of the LED lighting industry, and is still deep, and is a problem to be solved by those skilled in the art.
Fig. 1 shows a prior art BUCK type LED driving circuit, comprising: the rectifier bridge composed of diodes D1-D4, an input capacitor Cin, a freewheeling diode D5, an output capacitor Cout, an output dummy load R1, an LED load, an inductance L, a power MOS transistor Q1, a sampling resistor Rcs, a voltage stabilizing capacitor Cvcc and a driver chip 10 (i.e., a controller), wherein the driver chip 10 has 5 pins: pins gate, hv, cs, gnd and vcc.
As shown in fig. 2, the driving chip 10 specifically includes: the high-voltage power supply module 101, the cs peak detection comparator CMP, the demagnetization detection module 102, the logic module 103 and the driving module 104, wherein the high-voltage power supply module 101 is used for reducing the high voltage HV of hundreds of volts of input line voltage to the power supply voltage VCC which can be directly processed by an internal device of a chip. The supply voltage VCC generally obtained is in each case two cases: 1. the power supply voltage VCC is usually higher and cannot be directly used for an internal low-voltage device, and the working voltage vdd a which can be directly used by the internal low-voltage device is obtained after secondary voltage reduction treatment and then the low-voltage device is supplied with power; however, when the power MOS transistor is packaged with the IC, the threshold voltage of the power MOS transistor is generally higher than the threshold voltage of the tube in the IC, and the withstand voltage value is also higher than the withstand voltage value of the tube in the IC, and on the premise that the gate voltage of the power MOS transistor is ensured to be smaller than the withstand voltage value of the gate, increasing the gate voltage of the power MOS transistor as much as possible is beneficial to reducing the on-resistance of the power transistor, thereby improving the power efficiency, so that the driving voltage of the power MOS transistor is still the supply voltage VCC; 2. the power supply voltage VCC is lower, can be directly used for supplying power to a low-voltage device, and is also used as a power supply of the power MOS tube.
However, in either case, a voltage stabilizing capacitor Cvcc is externally connected to ensure the stability of the power supply of the chip, that is, to avoid the abnormality of the analog circuit in the chip and the logic error of the digital circuit, and to ensure the sufficient driving capability. The pin vcc itself and the external voltage stabilizing capacitor Cvcc both increase the system cost, and the area of the PCB occupied by the external voltage stabilizing capacitor Cvcc also increases the system cost.
Disclosure of Invention
In order to solve the problems in the prior art, the invention aims to provide an LED driving power supply chip, which ensures the normal operation of the LED driving chip on the premise of saving the voltage stabilizing capacitors on the periphery of a pin vcc and the pin vcc, thereby reducing the cost of the chip and a system.
The invention relates to an LED driving power supply chip, which is provided with a pin hv and comprises: the high-voltage power supply module comprises an internal circuit, a high-voltage power supply module and a driving module, wherein the high-voltage power supply module comprises:
The drain electrode of the first field effect tube is connected to the pin hv, and the grid electrode of the first field effect tube is grounded;
The drain electrode of the second field effect tube is connected with the drain electrode of the first field effect tube, the grid electrode of the second field effect tube is grounded, and the source electrode of the second field effect tube outputs a power supply voltage to the internal circuit;
the drain electrode of the second switching tube is connected with the source electrode of the first field effect tube;
The drain electrode of the fifth switching tube is connected with the source electrode of the first field effect tube, the grid electrode of the fifth switching tube is connected with the source electrode of the second switching tube, and the source electrode of the fifth switching tube outputs a driving voltage to the driving module;
One end of the first resistor is connected with the source electrode of the first field effect tube, and the other end of the first resistor is connected with the grid electrode of the second switching tube;
a first clamp circuit connected between the gate and the source of the second switching tube;
a second clamp circuit connected between the gate and the source of the fifth switching tube; and
And the third clamping circuit is connected between the connection ends of the first resistor and the second switching tube and the ground.
In the above LED driving power supply chip, the first clamping circuit includes: and the grid electrode and the drain electrode of the fourth switching tube are connected to the source electrode of the second switching tube.
Optionally, in the above LED driving power supply chip, the first clamping circuit includes: and the negative electrode of the inverting zener diode is connected with the grid electrode of the second switching tube, and the positive electrode of the inverting zener diode is connected with the source electrode of the second switching tube.
In the above LED driving power supply chip, the second clamp circuit includes: the switching device comprises a fourth resistor, a fifth resistor and a sixth switching tube, wherein the fourth resistor and the fifth resistor are sequentially connected in series between a grid electrode and a source electrode of the fifth switching tube, the source electrode of the sixth switching tube is connected with the grid electrode of the fifth switching tube, a drain electrode of the sixth switching tube is connected with the source electrode of the fifth switching tube, and the grid electrode of the sixth switching tube is connected between the fourth resistor and the fifth resistor.
In the above LED driving power supply chip, the third clamping circuit includes: the first switch tube is connected with the second resistor and the third resistor which are connected between the connecting end of the first resistor and the second switch tube and the ground in series, wherein the drain electrode of the first switch tube is connected to the connecting end of the first resistor and the second switch tube, the source electrode of the first switch tube is grounded, and the grid electrode of the first switch tube is connected between the second resistor and the third resistor.
By adopting the technical scheme, the high-voltage power supply module is improved, namely, two paths of independent field effect transistors are adopted, one path is used as a driving power supply of the driving module in the chip, and the other path is used as a power supply of other internal circuits in the chip, so that the power supply of the internal circuits is not influenced by the fluctuation of the starting moment of the power MOS transistor, the pins vcc are reduced on the basis of the existing LED driving scheme, and meanwhile, the peripheral voltage stabilizing capacitor can be omitted, thereby achieving the purpose of reducing the cost of the chip and the printed circuit board.
Drawings
FIG. 1 is a schematic diagram of a BUCK-type LED driving circuit in the prior art;
FIG. 2 is a schematic diagram of the internal structure of the controller of FIG. 1;
FIG. 3 is a schematic diagram of a BUCK-type LED driving circuit implemented by an LED driving power chip of the present invention;
FIG. 4 is an internal circuit diagram of a high voltage power module in an LED driver power chip according to the present invention;
fig. 5 is a schematic waveform diagram of a driving voltage VCC and a power supply voltage VCC1 in an LED driving power supply chip according to the present invention at the moment when an external power MOS transistor is turned on.
Detailed Description
Preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 3 shows a schematic diagram of a BUCK-type LED driving circuit implemented using an LED driving power chip according to the present invention, wherein the peripheral circuit structure of the LED driving power chip is substantially the same as that of a BUCK-type LED driving circuit according to the prior art shown in fig. 1, except that the circuit in fig. 3 omits a voltage stabilizing capacitor Cvcc connected between pins vcc and gnd of the LED driving power chip as compared with fig. 1. Specifically, an LED driving power chip of the present invention omits pin vcc and has only pins hv, gate, cs and gnd, and wherein pin hv directly receives the input voltage Vin of the LED driving circuit; as with the existing LED driving chip, as shown in fig. 2, the inside of the chip includes: the functions of the high-voltage power supply module 101, the demagnetizing detection module 102, the logic module 103, the driving module 104 and the cs peak detection comparator CMP are the same as the function principle in the existing LED driving chip shown in fig. 1 and 2, so that the description is omitted here; however, unlike the existing LED driving chip, wherein:
As shown in fig. 4, the high-voltage power supply module 101 specifically includes:
A first field effect transistor Jfet, the drain of which is connected to the pin HV to receive the high voltage HV inputted from the outside, the gate of which is grounded, and the source of which outputs the intermediate voltage VS;
A second field effect transistor Jfet, the drain of which is connected to pin HV with the drain of the first field effect transistor Jfet1 to receive the high voltage HV input from the outside, the gate of which is grounded, and the source of which outputs the supply voltage VCC1; in this embodiment, the source of the second fet Jfet may be connected to a conventional LDO step-down circuit in all circuits (e.g., the demagnetization detection module 102, the logic module 103) inside the chip except for the high-voltage power supply module 101 and the driving module 104, so as to further process the power supply voltage VCC1, thereby obtaining an operating voltage vdd a that can be directly used by low-voltage devices inside these circuits;
the drain electrode of the second switching tube M2 is connected with the source electrode of the first field effect tube Jfet;
A fifth switching tube M5, the drain of which is connected to the source of the first fet Jfet, the gate of which is connected to the source of the second switching tube M2, and the source of which outputs a driving voltage VCC to supply power to the driving module 104;
One end of the first resistor R1 is connected with the source electrode of the first field effect tube Jfet, and the other end of the first resistor R1 is connected with the grid electrode of the second switching tube M2;
a first clamping circuit connected between the gate and the source of the second switching tube M2 to clamp the gate-source voltage of the second switching tube M2; in this embodiment, the first clamp circuit includes: the source electrode of the third switching tube M3 is connected with the grid electrode of the second switching tube M2, the grid electrode and the drain electrode of the third switching tube M3 are connected to the source electrode of the fourth switching tube M4, and the grid electrode and the drain electrode of the fourth switching tube M4 are connected to the source electrode of the second switching tube M2; in another embodiment, the first clamping circuit may also include a reverse zener diode, the negative electrode of which is connected to the gate of the second switching tube M2, and the positive electrode of which is connected to the source of the second switching tube M2;
A second clamping circuit connected between the gate and the source of the fifth switching transistor M5 to clamp the gate-source voltage of the fifth switching transistor M5; in this embodiment, the second clamp circuit includes: a fourth resistor R4 and a fifth resistor R5 connected in series between the gate and the source of the fifth switching tube M5, and a sixth switching tube M6, wherein the source of the sixth switching tube M6 is connected to the gate of the fifth switching tube M5, the drain thereof is connected to the source of the fifth switching tube M5, and the gate thereof is connected between the fourth resistor R4 and the fifth resistor R5; of course, the second clamping circuit can also be realized by adopting other circuit structures with clamping functions;
The third clamping circuit is connected between the connection ends of the first resistor R1 and the second switching tube M2 and the ground; in this embodiment, the third clamp circuit includes: the second resistor R2 and the third resistor R3 are connected in series between the connecting end of the first resistor R1 and the second switch tube M2 and the ground, and the first switch tube M1, wherein the drain electrode of the first switch tube M1 is connected to the connecting end of the first resistor R1 and the second switch tube M2, the source electrode thereof is grounded, and the grid electrode thereof is connected between the second resistor R2 and the third resistor R3; of course, the third clamping circuit may be implemented by other circuit structures having clamping functions.
The working principle of the invention is as follows:
The invention processes the line voltage HV into the intermediate voltage VS and the power supply voltage VCC1 through two paths Jfet, namely a first field effect transistor Jfet1 and a second field effect transistor Jfet, wherein the power supply voltage VCC1 can be directly used as the power supply of all circuits (hereinafter referred to as internal circuits) except for the inside of a chip, and the internal circuits can process the power supply voltage VCC1 in a traditional LDO (low dropout) mode, so as to obtain stable working voltage which can be directly used by low-voltage devices in the internal circuits; the driving voltage VCC obtained after the intermediate voltage VS is further processed may be used as a driving power source for supplying power to the driving module 104 for driving the gate of the power MOS transistor Q1.
Compared with the traditional power supply circuit structure, the external voltage stabilizing capacitor Cvcc is removed, and the driving voltage VCC has large ripple at the moment when the power MOS tube Q1 is started, so that the power supply circuit is not suitable for supplying power to an internal circuit. Therefore, the invention adopts an independent branch, namely the second field effect transistor Jfet to supply power to the internal circuit, the power supply voltage VCC1 is not greatly influenced by the ripple wave of the driving voltage VCC, and the power supply voltage VCC1 can be kept stable even without the voltage stabilization of the capacitor. Specifically, the ripple of the supply voltage VCC1 is very small, because the internal circuit of the chip will not have a momentary large current, and even if the internal digital circuit is turned over, the source of the second fet Jfet2 can provide enough current for the internal digital logic to turn over as long as there is a slight fraction of a volt, and the second fet Jfet2 can provide enough current for the internal digital logic to turn over, and the ripple of the supply voltage VCC1 is very small because the internal circuit has low and uniform power consumption. As shown in the waveform of the supply voltage VCC1 in fig. 5, on one hand, the supply voltage VCC1 does not have a ripple as large as the drive voltage VCC, so that the voltage redundancy of the internal circuit is insufficient, and on the other hand, the ripple of the supply voltage VCC1 is small, so that the ripple of the voltage of the key node in the internal circuit along with the ripple of the supply voltage VCC1 is smaller.
The present invention employs a separate other branch to generate the drive voltage VCC that powers the drive module 104. When the driving module 104 does not drive the power MOS transistor, that is, the driving power VCC does not have a load current, the second switching transistor M2 and the fifth switching transistor M5 are turned off, at this time, the current output by the first fet Jfet is small and flows only through the first resistor R1 and the third clamp circuit, and since the power supply capability of the first fet Jfet1 itself is strong, the intermediate voltage VS must be relatively high and close to the turn-off voltage of the first fet Jfet 1. In this embodiment, the third clamping circuit makes the voltage VG at the connection end of the first resistor R1 and the second switching tube M2 be VGs1 x (r2+r3)/R3, where VGs1 represents the gate-source voltage of the first switching tube M1; at this time, the current flowing through the first resistor R1 is (VS-VG)/R1, and the first resistor R1 can be used to prevent the current flowing through the third clamp circuit from being excessively large. Although both the second switching tube M2 and the fifth switching tube M5 are turned off at this time, in practice, there may be a quiescent current (several nA) of the driving module 104 after the driving is completed, and the quiescent current may be determined by the third and fourth switching tubes M3, M4, the fourth and fifth resistors R4, R5 and the equivalent resistor Rdriver of the driving module 104 after the driving is completed to be VG/(1/gm3+1/gm4+r4+r5+rdriver), and the quiescent current is very small because the driving module 104 is equivalent to a large resistor after the driving is completed. In this case, the driving voltage VCC is vg=rdriver/(1/gm3+1/gm4+r4+r5+rdriver), and because Rdriver is large, the driving voltage VCC is substantially equal to the voltage VG.
When the driving module 104 drives the power MOS transistor Q1, at the moment of starting the driving module 104, a large driving current Idriver is pulled from the driving power VCC to the gate capacitor of the power MOS transistor Q1, so that the gate capacitor is charged up to the driving voltage VCC by the driving current Idriver. In this process, since the external voltage stabilizing capacitor Cvcc is omitted, the driving voltage VCC suddenly decreases (as shown in fig. 5), and the gate-source voltages VGS2 and VGS5 of the second and fifth switching transistors M2 and M5 become larger as the driving voltage VCC decreases, so that the driving current Idriver flows from the first fet Jfet1 to the fifth switching transistor M5 and then to the driving module 104, and the second switching transistor M2 serves as the driving transistor for the gate of the fifth switching transistor M5; Since the first fet Jfet1 is to supply the driving current Idriver, the gate-source voltage of the first fet Jfet1 increases, and since the gate of the first fet Jfet1 is grounded, the intermediate voltage VS decreases. Thereby, the current flowing through the first resistor R1 is also reduced, and the current flowing through the second and third resistors R2 and R3 is reduced, and the first switching transistor M1 is turned off. At this time, the voltage VG at the connection terminal of the first resistor R1 and the second switching tube M2 is a divided voltage of the intermediate voltage VS: vg= (r2+r3) ×vs/(r1+r2+r3), the driving current Idriver =u×cox×w (VOffth-VS) 2/2L provided by the first fet Jfet1, where u is carrier mobility, cox is gate oxide unit area capacitance, w is channel width, L is channel length, VOffth is the off threshold of the first fet Jfet1, When VOffth-VS is less than or equal to 0, the first fet Jfet1 is turned off, the driving voltage vcc=vg-VGs 2-VGs 5= (r2+r3) ×vs/(r1+r2+r3) -VGs2-VGs5, and the voltages VCC, VG, and VS can be roughly calculated by the above three constraint equations. The moment when the actual power MOS transistor Q1 is turned on is a dynamic process, in which the driving current Idriver increases and decreases, so that the voltages VCC, VG, and VS vary with the driving current Idriver, but the constraint equation is always satisfied, and the equation considers that the gate-source voltages VGs2, VGs5 of the second and fifth switching transistors M2, M5 are unchanged, and the actual driving current Idriver mostly passes through the fifth switching transistor M5, and the gate-source voltage VGs5 of the fifth switching transistor M5 varies in proportion to the square relation of the driving current Idriver as the driving current Idriver varies, and also considers that the third switching transistor M, the fourth switching transistors M3, M4 are not turned on. By adjusting the size of the components, the minimum value of the driving voltage VCC can still ensure the working voltage redundancy and the driving current of the driving module 104 at the moment when the power MOS transistor Q1 is driven, so as to ensure that the driving module works in a saturation region during the period, and the driving current can quickly fill the gate-source capacitance and the miller capacitance of the power MOS transistor Q1. The third and fourth switching tubes M3 and M4 are used as clamping circuits for the gate-source voltage of the second switching tube M2, so that the second switching tube M2 is not required to reach breakdown voltage due to overlarge gate-source voltage caused by overlarge instant driving current, and in the same way, the fourth and fifth resistors R4 and R5 and the sixth switching tube M6 are used as clamping circuits for the gate-source voltage of the fifth switching tube M5, so that the fifth switching tube M5 is prevented from reaching breakdown voltage due to overlarge gate-source voltage caused by overlarge instant driving current, and thus the reliability of circuit operation is ensured, and the third, fourth and sixth switching tubes M3, M4, M6, fourth and fifth resistors R4, r5 is not started when the power MOS tube Q1 works normally.
In summary, the invention combines the innovation of the peripheral topological structure and the high-voltage power supply module on the basis of the traditional LED driving, achieves the purpose of omitting the pin vcc and the external voltage stabilizing capacitor Cvcc, simplifies the peripheral application, and reduces the cost of chips and systems.
The foregoing description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and various modifications can be made to the above-described embodiment of the present invention. All simple, equivalent changes and modifications made in accordance with the claims and the specification of the present application fall within the scope of the patent claims. The present invention is not described in detail in the conventional art.
Claims (5)
1. An LED driving power chip having a pin hv, and comprising: the high-voltage power supply module comprises an internal circuit, a high-voltage power supply module and a driving module, and is characterized in that the high-voltage power supply module comprises:
The drain electrode of the first field effect tube is connected to the pin hv, and the grid electrode of the first field effect tube is grounded;
The drain electrode of the second field effect tube is connected with the drain electrode of the first field effect tube, the grid electrode of the second field effect tube is grounded, and the source electrode of the second field effect tube outputs a power supply voltage to the internal circuit;
the drain electrode of the second switching tube is connected with the source electrode of the first field effect tube;
The drain electrode of the fifth switching tube is connected with the source electrode of the first field effect tube, the grid electrode of the fifth switching tube is connected with the source electrode of the second switching tube, and the source electrode of the fifth switching tube outputs a driving voltage to the driving module;
One end of the first resistor is connected with the source electrode of the first field effect tube, and the other end of the first resistor is connected with the grid electrode of the second switching tube;
a first clamp circuit connected between the gate and the source of the second switching tube;
a second clamp circuit connected between the gate and the source of the fifth switching tube; and
And the third clamping circuit is connected between the connection ends of the first resistor and the second switching tube and the ground.
2. The LED driving power chip of claim 1, wherein the first clamping circuit comprises: and the grid electrode and the drain electrode of the fourth switching tube are connected to the source electrode of the second switching tube.
3. The LED driving power chip of claim 1, wherein the first clamping circuit comprises: and the negative electrode of the inverting zener diode is connected with the grid electrode of the second switching tube, and the positive electrode of the inverting zener diode is connected with the source electrode of the second switching tube.
4. The LED driving power chip of claim 1, wherein the second clamping circuit comprises: the switching device comprises a fourth resistor, a fifth resistor and a sixth switching tube, wherein the fourth resistor and the fifth resistor are sequentially connected in series between a grid electrode and a source electrode of the fifth switching tube, the source electrode of the sixth switching tube is connected with the grid electrode of the fifth switching tube, a drain electrode of the sixth switching tube is connected with the source electrode of the fifth switching tube, and the grid electrode of the sixth switching tube is connected between the fourth resistor and the fifth resistor.
5. The LED driving power chip of claim 1, wherein the third clamping circuit comprises: the first switch tube is connected with the second resistor and the third resistor which are connected between the connecting end of the first resistor and the second switch tube and the ground in series, wherein the drain electrode of the first switch tube is connected to the connecting end of the first resistor and the second switch tube, the source electrode of the first switch tube is grounded, and the grid electrode of the first switch tube is connected between the second resistor and the third resistor.
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| CN104837245B (en) * | 2015-05-05 | 2016-03-30 | 深圳市稳先微电子有限公司 | A kind of LED drive chip and BUCK type LED drive circuit |
| CN105099567B (en) * | 2015-08-20 | 2017-11-17 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | A kind of emitter of the visible light communication system based on white light LEDs |
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