CN109064973B - Display method and display device - Google Patents
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- CN109064973B CN109064973B CN201811062608.1A CN201811062608A CN109064973B CN 109064973 B CN109064973 B CN 109064973B CN 201811062608 A CN201811062608 A CN 201811062608A CN 109064973 B CN109064973 B CN 109064973B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The invention provides a display method and a display device, belongs to the technical field of display, and can at least partially solve the problem of display image jitter of the conventional display panel in a low scanning frequency mode. The display method of the invention is applied to a sub-pixel in a display panel, wherein the sub-pixel comprises a light-emitting element and a storage element, and the storage element is used for storing a data voltage for controlling the light-emitting brightness of the light-emitting element; the display method comprises the following steps: controlling the light emitting elements to alternately be in a light emitting sub-phase and a non-light emitting sub-phase in a holding phase in a display period of the sub-pixel; the duration of at least two photon emitting phases in each of said holding phases is different.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to a display method and a display device.
Background
In the conventional display panel, an OLED (organic light emitting diode) display panel is taken as an example, wherein a plurality of sub-pixels are often arranged in an array manner. The sub-pixel includes a light emitting element (OLED) and a storage element (e.g., a storage capacitor). The data voltage stored in the memory element determines the intensity of light emitted by the light-emitting element.
When the sub-pixel is driven, one display period usually includes a writing phase and a holding phase. The data voltage is written to the memory element in a write phase, and then the data voltage controls the light emission luminance of the light emitting element in a hold phase.
Since mura defects (various luminance unevenness defects such as stripes) of the display panel are relatively obvious when the luminance of the actual light emission of the light emitting elements is low, the light emission luminance is usually higher than a certain luminance value, but the luminance value does not necessarily accord with the luminance required to be displayed by the sub-pixels, so that the light emitting elements are controlled to be alternately turned on and off in the holding stage, and the luminance is reduced in the sense of users, and the reduced luminance accords with the luminance required to be displayed. The specific time when the light emitting element is turned on and turned off is controlled by a light emitting control signal terminal EM (also referred to as an emitting out terminal in engineering). In the hold phase, the existing lighting control signal terminal EM is usually applied with a square wave, each period of which is the same. As shown in fig. 1, the signal of the emission control signal terminal EM divides one holding phase into four emission sub-phases a, b, c, d and four non-emission sub-phases immediately following the four emission sub-phases a, b, c, d.
Since the memory element inevitably has leakage current, that is, the data voltage stored in the memory element is significantly attenuated, so that the luminance of the light emitted by the light emitting element in each light emitting sub-phase is significantly reduced (or may be significantly increased, depending on the specific form of the sub-pixel circuit) with time, which causes the luminance of the light emitted by the light emitting element as a whole to be unstable, and the jitter value (flicker value) of the display screen of the display panel is not good.
Especially in the application scenario of low scanning frequency (for example, in AOD mode, also called always on display mode), since one display period of the sub-pixel is longer, and the holding period is correspondingly longer, the brightness variation of the light emitted by the light emitting element is larger in one holding period, which results in larger jitter value of the display screen of the display panel.
Disclosure of Invention
The invention at least partially solves the problem that the display picture of the existing display device is jittered in a low-brightness low-scanning-frequency mode, and provides a display method and a display device.
According to a first aspect of the present invention, there is provided a display method applied to a sub-pixel in a display panel, the sub-pixel including a light emitting element and a storage element for storing a data voltage for controlling a light emission luminance of the light emitting element; the display method comprises the following steps: controlling the light emitting elements to alternately be in a light emitting sub-phase and a non-light emitting sub-phase in a holding phase in a display period of the sub-pixel; the duration of at least two photon emitting phases in each of said holding phases is different.
Optionally, the sub-pixel further comprises a switch element for controlling on/off between the light emitting element and a power supply;
the controlling the light emitting element alternately in a light emitting sub-phase and a non-light emitting sub-phase comprises: alternately supplying an active voltage and an inactive voltage to the switching element to cause the switching element to control the light emitting element to alternately connect and disconnect with the power supply.
Optionally, in any two light emitting sub-phases in each of the holding phases, a duration of a preceding light emitting sub-phase is less than or equal to a duration of a succeeding light emitting sub-phase.
Optionally, in each of the holding periods, except for the last light-emitting sub-period, the durations of all the remaining light-emitting sub-periods are equal and less than the duration of the last light-emitting sub-period.
Optionally, in each of the holding periods, the duration of each of the photon emitting periods increases in turn.
Optionally, in any two light emitting sub-phases in each of the holding phases, a duration of a preceding light emitting sub-phase is greater than or equal to a duration of a succeeding light emitting sub-phase.
Optionally, the sum of the time lengths of each light-emitting sub-phase and the immediately following non-light-emitting sub-phase is equal.
Optionally, the sub-pixel further comprises a writing element, and a writing phase before the holding phase is further included in the display period of the sub-pixel; the display method further comprises the following steps: an effective voltage is provided to the write element during the write phase to write a data voltage to the storage element.
Optionally, the light emitting element comprises a light emitting diode.
According to a second aspect of the present invention, there is provided a display device comprising a display panel and a driving circuit driving the display panel, the display panel comprising a sub-pixel including a light emitting element and a storage element for storing a data voltage for controlling a light emission luminance of the light emitting element, the driving circuit for controlling the light emitting element to alternately be in a light emitting sub-phase and a non-light emitting sub-phase in a holding phase in a display period of the sub-pixel; the duration of at least two photon emitting phases in each of said holding phases is different.
Optionally, the sub-pixel further comprises a switch element for controlling on/off between the light emitting element and a power supply; the driving circuit comprises a square wave generating circuit, the effective voltage output by the square wave generating circuit is used for controlling the switching element to enable the light-emitting element and the power supply to be conducted to enter a light-emitting sub-stage, and the invalid voltage output by the square wave generating circuit is used for controlling the switching element to enable the light-emitting element and the power supply to be disconnected to enter a non-light-emitting sub-stage.
Drawings
Fig. 1 is a waveform diagram of an emission control signal terminal EM in a conventional display method;
FIG. 2 is a circuit diagram of a sub-pixel in a display panel according to an embodiment of the present invention;
FIG. 3 is a waveform diagram of the emission control signal terminal EM in the embodiment of the present invention;
FIG. 4 is a control timing diagram of an embodiment of the present invention during a display period corresponding to the waveform diagram of FIG. 3;
wherein the reference numerals are: 1. a light emitting element; 2. a storage element; 3. a write element; 4. a switching element; 5. a reset element; 6. a drive transistor; VDD, a first power supply terminal; VSS, a second power supply terminal; gate, Gate control signal terminal; init, initial voltage end; reset, Reset signal terminal; EM, a light emitting control signal terminal; vref, reference voltage terminal; t1, a first transistor; t2, a second transistor; t3, a third transistor; t4, a fourth transistor; t5, a fifth transistor; D. a light emitting diode; C. a storage capacitor; vdata and a data signal terminal.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
In the following description, various transistors are referred to as PMOS transistors, and the effective voltage is low. In the case where the sub-pixel is formed by an NMOS transistor, the effective voltage applied to the transistor is a high voltage.
Example 1:
the present embodiment provides a display method applied to sub-pixels in a display panel (of course, a plurality of sub-pixels in one display panel can be driven by this method), the sub-pixels including a light emitting element 1 and a memory element 2, the memory element 2 storing a data voltage for controlling the light emission luminance of the light emitting element 1; the display method comprises the following steps: controlling the light emitting element 1 to alternately be in a light emitting sub-phase and a non-light emitting sub-phase in a holding phase in a display period of the sub-pixel; the duration of at least two photon emitting phases in each holding phase is unequal.
As shown in fig. 2, the sub-pixel comprises a light emitting element 1, which is preferably an actively emitting light emitting element 1, for example a light emitting diode D. Specifically, the light emitting diode D may be an Organic Light Emitting Diode (OLED), an inorganic micro light emitting diode, or the like.
The storage element 2 is, for example, a storage capacitor C for storing a data voltage for controlling the light emission luminance of the light emitting element 1. Specifically, as shown in fig. 2, the data voltage stored in the storage capacitor C determines the gate voltage of the driving transistor 6, i.e., determines the degree of conduction of the driving transistor 6, and since the light emitting diode D is connected in series with the driving transistor 6 between the first power source terminal VDD and the second power source terminal VSS, that is, the data voltage stored in the storage capacitor C determines the current flowing through the light emitting diode D, thus determining the brightness of the light emitting diode D.
The display method provided by the invention comprises the following steps: the light-emitting element 1 is controlled to alternately be in the light-emitting sub-phase and the non-light-emitting sub-phase in the hold phase in the display period of the sub-pixel, and the duration of at least two light-emitting sub-phases in each hold phase is different. I.e. in the hold phase, the light emission sub-phases are not of exactly equal length. With such a display method, a person skilled in the art can appropriately increase the duration of the light-emitting sub-phase with relatively low luminance of the light-emitting element 1, and certainly, also appropriately decrease the duration of the light-emitting sub-phase with relatively high luminance of the light-emitting element 1, so that a user does not feel a significant change in the light emitted by the light-emitting element 1, and thus the jitter value (flicker value) of the display panel is reduced.
Also included in the sub-pixel is a write element 3 for writing data voltages into the memory element 2.
Specifically, as shown in fig. 2, the write element 3 includes a second transistor T2 and a fourth transistor T4. If the voltage of the Gate control signal terminal Gate is an effective voltage, the second transistor T2 and the fourth transistor T4 are turned on, and the data voltage provided from the data signal terminal is written into one terminal of the storage capacitor C (the other terminal of the storage capacitor C is floating). Note that in this embodiment, the data voltage of the data signal terminal is written to the end of the storage capacitor C connected to the gate of the driving transistor 6 while being superimposed with the threshold voltage of one second transistor T2. Of course, the data voltage may be compensated corresponding to the driving circuit of the display panel and then directly written into one end of the storage capacitor C without compensating the data voltage in the sub-pixel circuit.
The sub-pixel further comprises a switching element 4, the switching element 4 being adapted to control the switching between the light emitting element 1 and the power supply. That is, the switching element 4 controls the light emitting element 1 to be connected to the power supply so that the current flows through the light emitting element 1 to emit light, and the switching element 4 controls the light emitting element 1 to be disconnected from the power supply so that the current does not flow through the light emitting element 1 and the light is not emitted.
Specifically, as shown in fig. 2, the switching element 4 includes a third transistor T3. When the light emission control signal terminal EM supplies an effective voltage to the switching element 4, the third transistor T3 therein is turned on, so that a loop from the first power source terminal VDD to the second power source terminal VSS through the driving transistor 6, the third transistor T3 and the light emitting diode D is turned on and the light emitting diode D is lit. When the light emission control signal terminal EM supplies the inactive voltage to the switching element 4, the third transistor T3 is turned off, the above-mentioned circuit is turned off, and the light emitting diode D is turned off.
In most sub-pixel circuits, the leakage of the charge stored in the storage element 2 (i.e., leakage current) causes the luminance of the light emitting element 1 to gradually decrease in each emission sub-phase of a holding phase. Of course, in other sub-pixel circuits, the leakage of the charge stored in the storage element 2 may cause the luminance of the light emitting element 1 to gradually increase in each light emitting sub-phase of a holding phase. The following detailed description addresses the former case and those skilled in the art can make reverse designs to accommodate the latter case.
Optionally, in any two light emitting sub-phases in each holding phase, the duration of the preceding light emitting sub-phase is less than or equal to the duration of the following light emitting sub-phase.
That is, in each hold phase, the duration of the subsequent light emission sub-phase tends to increase. This is because the data voltage stored in the memory element 2 is lost more in the later light emission sub-phase, and the light emission luminance is reduced with the loss of the data voltage. This is done in order to increase the duration of the darker glow sub-phase in a hold phase even more.
On the basis of the same principle, the person skilled in the art can also set: in each holding stage, except the last light-emitting sub-stage, the duration of all the other light-emitting sub-stages is equal to and less than the duration of the last light-emitting sub-stage; alternatively, the duration of the light emission sub-phases may be increased in sequence in each holding phase.
Alternatively, for a case where the luminance of the light emitting element 1 gradually increases with the loss of the data voltage in a holding period (for example, for a normally white mode liquid crystal display panel, the storage element 2 is a storage capacitor C formed by each pixel electrode and a common electrode in the liquid crystal display panel, and the light emitting element 1 is a liquid crystal molecule between the storage capacitor C and two poles of the storage capacitor C), the display method may include: in any two emission sub-phases in each hold phase, the duration of the preceding emission sub-phase is less than or equal to the duration of the following emission sub-phase. This also reduces the jitter value of the picture.
Optionally, the sum of the time lengths of each light-emitting sub-phase and the immediately following non-light-emitting sub-phase is equal.
I.e. each light-emitting sub-phase and the following non-light-emitting sub-phase constitute a small period, the duration of which is equal. This is so that corresponding hardware circuits for generating such control signals are easier to design.
Optionally, the sub-pixel further comprises a writing element 3, further comprising a writing phase preceding the holding phase in the display period of the sub-pixel; the display method further comprises the following steps: the write element 3 is supplied with an effective voltage during the write phase to write the data voltage into the storage element 2. I.e. the data voltage held by the storage element 2 in the holding phase is written in the preceding writing phase.
Optionally, the sub-pixel may further comprise a reset element 5 for resetting the voltage stored by the storage element 2 prior to the hold phase of the display period of the sub-pixel. For example, as shown in fig. 2, the reset element 5 includes a fifth transistor T5 and a first transistor T1.
Referring to fig. 4, in a specific timing, the display period of the sub-pixel includes a reset phase, a write phase, and a hold phase.
In the Reset phase, only the voltage of the Reset signal terminal Reset is valid among the Gate control signal terminal Gate, the Reset signal terminal Reset and the emission control signal terminal EM, and the voltages of the two terminals of the storage capacitor C are respectively initialized to the voltage of the initial voltage terminal Init and the voltage of the reference voltage terminal Vref.
Subsequently, in the writing phase, of the Gate control signal terminal Gate, the Reset signal terminal Reset and the emission control signal terminal EM, only the Gate control signal terminal Gate is active, and the data voltage provided by the data signal terminal Vdata is written into the storage capacitor C.
And then, entering a holding stage, wherein only the light-emitting control signal end EM is alternately effective and ineffective in the Gate control signal end Gate, the Reset signal end Reset and the light-emitting control signal end EM. The waveform of the emission control signal terminal EM in this stage is as described above.
Example 2:
the embodiment provides a display device, which comprises a display panel and a driving circuit for driving the display panel, wherein the display panel comprises a sub-pixel, the sub-pixel comprises a light-emitting element and a storage element, the light-emitting element is an active light-emitting element, the storage element is used for storing a data voltage for controlling the light-emitting brightness of the light-emitting element, and the driving circuit is used for controlling the light-emitting element to be alternately in a light-emitting sub-phase and a non-light-emitting sub-phase in a holding phase in a display period of the sub-pixel; the duration of at least two photon emitting phases in each holding phase is unequal.
That is, the driving circuit drives the sub-pixels in the display panel by using the display method provided in embodiment 1, so as to reduce the jitter value displayed by the display panel without significantly increasing the luminance of the display panel.
Optionally, the sub-pixel further comprises a switching element for controlling on/off between the light emitting element and the power supply; the driving circuit comprises a square wave generating circuit, wherein the effective voltage output by the square wave generating circuit is used for controlling the switching element to enable the light-emitting element to be conducted with the power supply to enter a light-emitting sub-stage, and the invalid voltage output by the square wave generating circuit is used for controlling the switching element to enable the light-emitting element to be disconnected with the power supply to enter a non-light-emitting sub-stage.
That is, the signal supplied to the light emission control signal terminal of the switching element in embodiment 1 is supplied from the square wave generating circuit.
Specifically, the driving circuit may be integrated in a driving chip, and provide four adjustable parameters a ', b', c 'and d' for a designer based on a standard equal-period square wave waveform (taking the waveform shown in fig. 1 as an example, four equal parameters a, b, c and d represent the time lengths of four effective voltages, respectively) of a signal at a light-emitting control signal end. a ', b', c 'and d' are, for example, parameters representing time (which may be positive or negative). Meanwhile, the design of anti-overflow is made for a + a ', b + b', c + c 'and d + d', namely, the added values should not exceed the range of values allowed by the data bit number. In the embodiment shown in fig. 3, the duration of the first display sub-phase is not adjusted, so the corresponding parameter is still a.
Specifically, the display device can be any product or component with a display function, such as an Organic Light Emitting Diode (OLED) display module, a micro-led display module, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
The driving circuit is preferably used to perform the above operations in an aod (always on display) mode, that is, for example, in a scene such as a mobile phone that keeps displaying (for example, displaying time) after turning off the screen but has little change in display content.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (9)
1. A display method is applied to a sub-pixel in a display panel, the sub-pixel includes a light emitting element and a storage element for storing a data voltage for controlling light emission luminance of the light emitting element;
the display method comprises the following steps: controlling the light emitting elements to alternately be in a light emitting sub-phase and a non-light emitting sub-phase in a holding phase in a display period of the sub-pixel;
the method is characterized in that the duration of partial light-emitting sub-stages in each holding stage is different, and the duration of partial light-emitting sub-stages is equal; reducing the jitter value displayed by the display panel on the premise of not obviously improving the brightness of the display panel;
the sub-pixel further comprises a write element, further comprising a write phase preceding the hold phase in a display period of the sub-pixel;
the display method further comprises the following steps: an effective voltage is provided to the write element during the write phase to write a data voltage to the storage element.
2. The display method according to claim 1, wherein the sub-pixel further comprises a switching element for controlling on/off between the light emitting element and a power supply;
the controlling the light emitting element alternately in a light emitting sub-phase and a non-light emitting sub-phase comprises: alternately supplying an active voltage and an inactive voltage to the switching element to cause the switching element to control the light emitting element to alternately connect and disconnect with the power supply.
3. The display method according to claim 1, wherein in any two light emission sub-phases in each of the holding phases, a time length of a preceding light emission sub-phase is less than or equal to a time length of a succeeding light emission sub-phase.
4. A display method according to claim 3, wherein in each of the hold phases, all but the last light-emitting sub-phase have the same duration and are less than the duration of the last light-emitting sub-phase.
5. The display method according to claim 1, wherein in any two light emission sub-phases in each of the holding phases, a time length of a preceding light emission sub-phase is greater than or equal to a time length of a succeeding light emission sub-phase.
6. The display method according to claim 1, wherein the sum of the time lengths of each light-emitting sub-phase and the immediately following non-light-emitting sub-phase is equal.
7. The display method according to claim 1, wherein the light-emitting element comprises a light-emitting diode.
8. A display device comprises a display panel and a drive circuit for driving the display panel, wherein the display panel comprises a sub-pixel, the sub-pixel comprises a luminous element and a storage element, the storage element is used for storing a data voltage for controlling the luminous brightness of the luminous element, and the drive circuit is used for controlling the luminous element to be alternately in a luminous sub-phase and a non-luminous sub-phase in a holding phase in a display period of the sub-pixel;
the method is characterized in that the duration of partial light-emitting sub-stages in each holding stage is different, and the duration of partial light-emitting sub-stages is equal; reducing the jitter value displayed by the display panel on the premise of not obviously improving the brightness of the display panel;
the sub-pixel further comprises a write element, further comprising a write phase preceding the hold phase in a display period of the sub-pixel;
an effective voltage is provided to the write element during the write phase to write a data voltage to the storage element.
9. The display device according to claim 8,
the sub-pixel also comprises a switch element which is used for controlling the on-off between the light-emitting element and a power supply;
the driving circuit comprises a square wave generating circuit, the effective voltage output by the square wave generating circuit is used for controlling the switching element to enable the light-emitting element and the power supply to be conducted to enter a light-emitting sub-stage, and the invalid voltage output by the square wave generating circuit is used for controlling the switching element to enable the light-emitting element and the power supply to be disconnected to enter a non-light-emitting sub-stage.
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| CN110767173B (en) * | 2019-11-08 | 2021-03-23 | 京东方科技集团股份有限公司 | Display driving method, display driver and display device |
| CN111798801B (en) * | 2020-05-29 | 2022-06-24 | 厦门天马微电子有限公司 | Display panel, driving method thereof and driving circuit thereof |
| CN113066442B (en) * | 2021-03-12 | 2022-06-21 | 芯颖科技有限公司 | A control system for AMOLED display |
| CN113140180A (en) | 2021-04-16 | 2021-07-20 | 武汉华星光电半导体显示技术有限公司 | Pixel circuit, display panel and control method |
| WO2023070530A1 (en) * | 2021-10-29 | 2023-05-04 | 京东方科技集团股份有限公司 | Pixel driving circuit and driving method therefor, display panel, and display device |
| CN116524866A (en) * | 2023-04-28 | 2023-08-01 | 武汉天马微电子有限公司 | Display panel and display device |
| CN116543703A (en) * | 2023-05-11 | 2023-08-04 | 武汉天马微电子有限公司 | A display panel, a display panel drive acquisition method, and a display device |
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| CN107256691A (en) * | 2017-08-10 | 2017-10-17 | 深圳市华星光电半导体显示技术有限公司 | The numerical digit driving method and system of OLED display |
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