CN108962839A - Packaging structure - Google Patents

Abstract

The invention provides a packaging structure, which comprises a metal substrate, a core structure layer and a packaging element. The core structure layer is configured on the metal substrate and is provided with an opening and a patterned conductive layer. The packaging element is configured on the metal substrate and is positioned in the opening of the core structure layer. The packaging element comprises a plurality of outer pins, and the outer pins are electrically connected with the patterned conductive layer of the core structure layer. The outer surface of each outer pin is cut to be flush with the upper surface of the patterned conductive layer.

Description

Package structure

technical field

The invention relates to a package structure, in particular to a package structure capable of embedding package components.

Background technique

When considering the overall thickness of the electronic device or package structure, it is necessary to discuss the construction method of the embedded components. Through the embedding of components, the volume of the package can be greatly reduced, and more high-functional components can be placed to increase the layout area of the substrate surface, so as to achieve the purpose of thinning electronic products. Generally speaking, in the existing packaging technology using embedded components, it is necessary to first form an accommodating groove on the substrate, so as to arrange the components in the accommodating groove of the substrate. Afterwards, the step of filling insulating colloid is carried out, so that the components are embedded in the substrate. However, the embedded components often face the problem of poor heat dissipation, which further affects the overall heat dissipation performance of the electronic device or package structure.

Contents of the invention

The invention provides a package structure, which can embed package components, and has the effect of reducing package height.

A packaging structure of the present invention includes a metal substrate, a core structure layer and packaging components. The core structure layer is configured on the metal substrate and has an opening and a patterned conductive layer. The packaging element is configured on the metal substrate and located in the opening of the core structure layer. The packaging component includes a plurality of external leads, and the external leads are electrically connected to the patterned conductive layer of the core structure layer, and the outer surface of each external lead is aligned with the upper surface of the patterned conductive layer.

In an embodiment of the present invention, the above-mentioned metal substrate has a disposing surface and a groove, the core structure layer is disposed on the disposing surface, and the packaging element is disposed in the groove, and there is a height difference between the disposing surface and the bottom surface of the groove.

In an embodiment of the present invention, the bottom surface of the above-mentioned groove is a rough surface.

In an embodiment of the present invention, the above-mentioned metal substrate has a configuration surface, and the core structure layer and the package components are configured on the configuration surface.

In an embodiment of the present invention, the above-mentioned core structure layer includes a dielectric layer, and the dielectric layer is located between the patterned conductive layer and the metal substrate.

In an embodiment of the present invention, the above-mentioned packaging component further includes a chip and a packaging compound. The chip has a plurality of pads. The encapsulant covers the chip and exposes the surface of each pad, wherein the external pins are disposed on the encapsulant and respectively connected to the surface of each pad.

In an embodiment of the present invention, the above-mentioned packaging component further includes a chip holder, a chip, a packaging compound, and a plurality of wires. The chip is configured on the chip seat. The encapsulation colloid covers the chip and the chip seat, wherein the external leads are arranged on the encapsulation colloid, and the wires are electrically connected between the chip and the external leads.

In an embodiment of the present invention, the above-mentioned external pins are electrically connected to the patterned conductive layer of the core structure layer through a plurality of wires.

In an embodiment of the present invention, the above-mentioned external leads are structurally and electrically connected to the patterned conductive layer of the core structure layer.

In an embodiment of the present invention, the above package structure further includes an insulating layer filled between the package element and the opening of the core structure layer.

In an embodiment of the present invention, the above package structure further includes an adhesive layer disposed between the core structure layer and the metal substrate.

In an embodiment of the present invention, the above package structure further includes a thermally conductive adhesive layer disposed between the package component and the metal substrate.

In an embodiment of the present invention, the above package structure further includes a surface treatment layer disposed on the upper surface of the patterned conductive layer and the outer surface of each outer lead.

In an embodiment of the present invention, the above-mentioned package structure further includes a solder resist layer disposed on the core structure layer and covering at least the patterned conductive layer and the outer leads of the package component.

In an embodiment of the present invention, the above package structure further includes electronic components and a plurality of conductive vias. The electronic components are arranged on the solder resist layer. The conductive vias penetrate the solder resist layer and expose part of the patterned conductive layer, wherein the electronic components are electrically connected to the patterned conductive layer through the plurality of conductive vias.

In an embodiment of the present invention, the above package structure further includes a solder mask layer and a surface treatment layer. The solder resist layer is configured on the core structure layer and covers the patterned conductive layer, wherein the solder resist layer exposes part of the upper surface of the patterned conductive layer. The surface treatment layer is configured on the upper surface of the patterned conductive layer exposed by the solder resist layer and the outer surface of each outer lead.

Based on the above, in the configuration of the packaging structure of the present invention, the packaging element is disposed on the metal substrate and located in the opening of the core structure layer. In this way, the packaging component is embedded in the core structure layer, and the outer leads of the package component and the patterned conductive layer of the core structure layer are coplanar, thereby reducing the overall package height of the package structure. In addition, the packaging components are configured on the metal substrate, and the heat dissipation efficiency of the packaging components can be improved through the thermal conductivity of the metal substrate.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail with reference to the accompanying drawings.

Description of drawings

FIG. 1 shows a schematic cross-sectional view of a packaging structure according to an embodiment of the present invention;

FIG. 2 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

FIG. 3 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

FIG. 4 is a schematic cross-sectional view of a package structure according to another embodiment of the present invention;

FIG. 5 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

FIG. 6 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

FIG. 7 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention;

FIG. 8 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention.

Explanation of reference signs:

100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H: package structure

110, 110c, 110d: metal substrate

112: Configuration surface

114c, 114d: grooves

115c, 115d: bottom surface

120: Core structure layer

122: opening

124: Patterned conductive layer

126: Dielectric layer

130, 230: package components

231: chip seat

132, 232: external pins

134, 234: chips

1342: pad

136, 236: encapsulation colloid

238: wire

140: insulating layer

150: Adhesive layer

160: thermally conductive adhesive layer

170, 170': surface treatment layer

180, 180': solder mask

190: Electronic components

190A: Conductive Via

W: wire

H: height difference

S1, S1': outer surface

S2: upper surface

S3: Surface

G: air gap

Detailed ways

FIG. 1 is a schematic cross-sectional view of a packaging structure according to an embodiment of the present invention. Please refer to FIG. 1 , the package structure 100A of this embodiment includes a metal substrate 110 , a core structure layer 120 and a package component 130 . The core structure layer 120 is disposed on the metal substrate 110 and has an opening 122 and a patterned conductive layer 124 . The packaging component 130 is disposed on the metal substrate 110 and located in the opening 122 of the core structure layer 110 . The package component 130 includes a plurality of external leads 132 , and each external lead 132 is electrically connected to the patterned conductive layer 124 of the core structure layer 120 . In particular, the outer surface S1 of each outer lead 132 is aligned with the upper surface S2 of the patterned conductive layer 124 .

In detail, the metal substrate 110 of this embodiment has a disposition surface 112 , and the core structure layer 120 and the package component 130 are respectively disposed on the disposition surface 112 . There is an air gap G between the package component 130 and the core structure layer 120 , which means that the package component 130 does not contact the inner wall of the opening 122 of the core structure layer 120 . The core structure layer 120 further includes a dielectric layer 126 , wherein the dielectric layer 126 is located between the patterned conductive layer 124 and the metal substrate 110 . The packaging component 130 further includes a chip 134 and an encapsulant 136 , wherein the chip 134 has a plurality of pads 1342 , and the encapsulant 136 covers the chip 134 and exposes a surface S3 of each pad 1342 . Each external lead 132 is disposed on the encapsulant 136, and is respectively structurally and electrically connected to the surface S3 of each pad 1342, so that the chip 134 can be electrically connected to the core structure layer 120 through the external lead 132. The patterned conductive layer 124. As shown in FIG. 1 , the package component 130 of this embodiment is embodied as a flip-chip package component, and the outer leads 132 of the package component 130 are structurally and electrically connected to the patterned conductive layer of the core structure layer 120 124.

Please refer to FIG. 1 again, in order to further fix the position of the package component 130, the package structure 100A of this embodiment may include an insulating layer 140, wherein the insulating layer 140 fills the air gap between the package component 130 and the opening 122 of the core structure layer 120 G, so that the packaging component 130 is positioned in the opening 122 . Moreover, the package structure 100A of this embodiment may further include an adhesive layer 150, wherein the adhesive layer 150 is disposed between the core structure layer 120 and the metal substrate 110, and the core structure layer 120 is adhered and fixed to the metal substrate through the adhesive layer 150 110 on. In addition, in order to increase the heat dissipation effect of the package component 130, the package structure 100A of this embodiment also includes a thermally conductive adhesive layer 160, wherein the thermally conductive adhesive layer 160 is disposed between the package component 130 and the metal substrate 110, and the package component 130 can conduct heat. The adhesive layer 160 is adhered and fixed on the metal substrate 110 , and the packaging element 130 can pass the heat generated by the thermally conductive adhesive layer 160 and the metal substrate 110 to the outside quickly.

In short, in the configuration of the package structure 100A of this embodiment, the package component 130 is disposed on the metal substrate 110 and located in the opening 122 of the core structure layer 120 . In this way, the package component 130 is embedded in the core structure layer 120, and the external leads 132 of the package component 130 are coplanar with the patterned conductive layer 124 of the core structure layer 120, thereby reducing the overall size of the package structure 100A. package height. In addition, the package component 130 is disposed on the metal substrate 110 , and the heat dissipation efficiency of the package component 130 can be improved through the thermal conductivity of the metal substrate 110 .

It must be noted here that the following embodiments use the component numbers and part of the content of the previous embodiments, wherein the same numbers are used to denote the same or similar components, and descriptions of the same technical content are omitted. For the description of omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.

FIG. 2 is a schematic cross-sectional view of a package structure according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 2 at the same time. The package structure 100B of this embodiment is similar to the package structure 100A of FIG. 1 . The difference between them is that the package component 230 of this embodiment is embodied as a wire-bonded package component. In detail, the packaging component 230 of this embodiment includes a chip holder 231 , external pins 232 , a chip 234 , a packaging compound 236 and a plurality of wires 238 . The chip 234 is disposed on the chip holder 231, and the wire 238 is electrically connected between the chip 234 and the outer pin 232, and the encapsulant 236 covers the chip 234, the chip holder 231 and the wire 238 and fills between the outer lead 232 . The outer leads 232 are disposed on the encapsulant 236, and the outer surface S1' of each outer lead 232 is aligned with the upper surface S2 of the patterned conductive layer 124.

FIG. 3 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 3 at the same time. The package structure 100C of this embodiment is similar to the package structure 100A of FIG. In the groove 114c, there is a height difference H between the configuration surface 112 and the bottom surface 115c of the groove 114c. In detail, the groove 114c of the metal substrate 110c can be used to accommodate the package component 130 with a large thickness, so that the package component 130 can be embedded in the opening 122 of the core structure layer 120, and reach the outer surface S1 of the outer lead 132 The cutting is aligned with the upper surface S2 of the patterned conductive layer 124 to reduce the height of the overall package.

FIG. 4 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention. Please refer to FIG. 3 and FIG. 4 at the same time. The package structure 100D of this embodiment is similar to the package structure 100C of FIG. 3 , the difference between the two is that the bottom surface 115d of the groove 114d of the metal substrate 110d of this embodiment is embodied as a rough surface , wherein the rough surface shape is, for example, a rectangular zigzag structure, but the present invention is not limited thereto. The bottom surface 115d of the groove 114d of the metal substrate 110d in this embodiment can increase the contact area between the insulating layer 140 and the thermally conductive adhesive layer 160 and the metal substrate 110d, so as to increase the bonding force with the metal substrate 110d, thereby improving insulation. The bonding strength between the layer 140, the thermally conductive adhesive layer 160 and the metal substrate 110d.

FIG. 5 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 5 at the same time. The package structure 100E of this embodiment is similar to the package structure 100A of FIG. On the upper surface S2 of the layer 124 and on the outer surface S1 of the outer pin 132, wherein the surface treatment layer 170 is, for example, a nickel layer, a gold layer, a silver layer, a nickel-palladium-gold layer or other suitable metals or alloys, in order to prevent pattern The conductive layer 124 and the outer pin 132 are oxidized due to the attack of water and oxygen.

FIG. 6 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 6 at the same time. The package structure 100F of this embodiment is similar to the package structure 100A of FIG. 120 and at least cover the patterned conductive layer 124 and the external leads 132 of the package component 130 . In detail, in this embodiment, the solder resist layer 180 covers the patterned conductive layer 124 , the dielectric layer 126 exposed by the patterned conductive layer 124 , and the outer pins 132 of the package component 130 and those located between the outer pins 132 . Partial encapsulant 136 between them. The solder resist layer 180 can be used to prevent the abnormal electrical contact of the patterned conductive layer 124 or the external pins 132 from causing electrical interference or short circuit.

FIG. 7 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 7 at the same time. The package structure 100G of this embodiment is similar to the package structure 100A of FIG. '. The solder resist layer 180' is disposed on the core structure layer 120 and covers the patterned conductive layer 124, wherein the solder resist layer 180' exposes part of the upper surface S2 of the patterned conductive layer 124. The surface treatment layer 170' is disposed on the upper surface S2 of the patterned conductive layer 124 exposed by the solder resist layer 180' and on the outer surface S1 of each outer pin 132, so as to prevent the patterned conductive layer 124 from contacting the external leads. The feet 132 are oxidized due to the attack of water and oxygen. Each external lead 132 of the package component 130 is electrically connected to the patterned conductive layer 124 of the core structure layer 120 through a wire W. Further, the two ends of the wire W are respectively electrically connected to the surface treatment layer 170' disposed on the patterned conductive layer 124 and the pin 132. In other words, the packaging component 130 of this embodiment is electrically connected to the patterned conductive layer 124 of the core structure layer 120 through the wire W.

FIG. 8 is a schematic cross-sectional view of a packaging structure according to another embodiment of the present invention. Please refer to FIG. 6 and FIG. 8 at the same time. The package structure 100H of this embodiment is similar to the package structure 100F of FIG. . The electronic component 190 is disposed on the solder resist layer 180 . The conductive via 190A penetrates the solder resist layer 180 and exposes part of the patterned conductive layer 124 , wherein the electronic component 190 is electrically connected to the patterned conductive layer 124 through the conductive via 190A. Here, the electronic component 190 is, for example, a sensor, a transmitter, a receiver or other suitable components, which are not limited here.

To sum up, in the configuration of the packaging structure of the present invention, the packaging element is configured on the metal substrate and located in the opening of the core structure layer. In this way, the packaging component is embedded in the core structure layer, and the outer leads of the package component and the patterned conductive layer of the core structure layer are coplanar, thereby reducing the overall package height of the package structure. In addition, the packaging components are configured on the metal substrate, and the heat dissipation efficiency of the packaging components can be improved through the thermal conductivity of the metal substrate.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection should be defined by the scope of the appended patent application.

Claims (16)

1. A packaging structure, characterized in that, comprising: metal substrate; a core structure layer configured on the metal substrate and having openings and a patterned conductive layer; and A package component is configured on the metal substrate and located in the opening of the core structure layer, wherein the package component includes a plurality of external leads, and the plurality of external leads are connected to the core structure layer The patterned conductive layer is electrically connected, and the outer surface of each of the outer pins is aligned with the upper surface of the patterned conductive layer. 2. The packaging structure according to claim 1, wherein the metal substrate has a configuration surface and a groove, the core structure layer is configured on the configuration surface, and the package component is configured in the groove In the groove, and there is a height difference between the configuration surface and the bottom surface of the groove. 3. The package structure according to claim 2, wherein the bottom surface of the groove is a rough surface. 4 . The package structure according to claim 1 , wherein the metal substrate has a disposition surface, and the core structure layer and the package component are disposed on the disposition surface. 5. The package structure according to claim 1, wherein the core structure layer comprises a dielectric layer, and the dielectric layer is located between the patterned conductive layer and the metal substrate. 6. The package structure according to claim 1, wherein the package component further comprises: a chip having a plurality of pads; and The encapsulant covers the chip and exposes the surface of each of the pads, wherein the plurality of external pins are arranged on the encapsulant and respectively connected to the surface of each of the pads. 7. The package structure according to claim 1, wherein the package component further comprises: Chip holder; a chip configured on the chip seat; an encapsulation compound covering the chip and the chip holder, wherein the plurality of external leads are disposed on the encapsulation compound; and A plurality of wires are electrically connected between the chip and the plurality of external pins. 8 . The package structure according to claim 1 , wherein the plurality of external leads of the package component are electrically connected to the patterned conductive layer of the core structure layer through a plurality of wires. 9 . The package structure according to claim 1 , wherein the plurality of external leads of the package component are structurally and electrically connected to the patterned conductive layer of the core structure layer. 10. The packaging structure according to claim 1, further comprising: An insulating layer is filled between the package element and the opening of the core structure layer. 11. The packaging structure according to claim 1, further comprising: The adhesive layer is configured between the core structure layer and the metal substrate. 12. The packaging structure according to claim 1, further comprising: The thermally conductive adhesive layer is configured between the packaging element and the metal substrate. 13. The packaging structure according to claim 1, further comprising: The surface treatment layer is configured on the upper surface of the patterned conductive layer and the outer surface of each of the outer pins. 14. The packaging structure according to claim 1, further comprising: The solder resist layer is configured on the core structure layer and at least covers the patterned conductive layer and the plurality of external leads of the package component. 15. The packaging structure according to claim 14, further comprising: electronic components configured on the solder resist layer; and A plurality of conductive vias penetrate the solder resist layer and expose part of the patterned conductive layer, and the electronic components are electrically connected to the patterned conductive layer through the plurality of conductive vias. 16. The packaging structure according to claim 1, further comprising: a solder resist layer configured on the core structure layer and covering the patterned conductive layer, wherein the solder resist layer exposes part of the upper surface of the patterned conductive layer; and The surface treatment layer is configured on the upper surface of the patterned conductive layer exposed by the solder resist layer and the outer surface of each of the outer leads.