CN1089403A - Switching device - Google Patents

Abstract

A device, intended to be connected in an electric circuit, comprising: (1) A pair of FETs connected in series in one line of the circuit, the sources of which are connected together, or the drains of which are connected together, the The state can be changed by the voltage applied to each gate; (2) a controller connected to the gate of at least one of the FETs; the controller changes the state of at least one of the FETs according to the overcurrent on the line.

Description

This device relates to the overcurrent protection of circuits, for example, caused by equipment failure, electrostatic discharge or other indications. The device is preferably bi-directional, ie capable of handling current flowing through the device in both directions, and preferably is capable of handling alternating current. Typically, such a device operates as a switch, closed under normal conditions and opened in response to an overcurrent fault. The device is particularly suitable for communication lines having a DC bias from which a voltage can be drawn.

German patent application 3725390, patented to Wickmam Werke GmbH on July 31, 1987, discusses a relatively simple form of circuit protection device. The device has a series switching transistor that controls the circuit current and a control transistor that controls the base or gate voltage of the switching transistor. The base or gate voltage of the control transistor is set with a voltage divider across the switching transistor so that when the device encounters an overcurrent, the control transistor is turned on and the switching transistor is turned off. Although this device is particularly simple, it is not bidirectional and has the disadvantage that in normal operation there is always a large voltage drop across the device before it conducts, and in the case of bipolar devices, This voltage drop is due to the voltage drop across the base resistor from the emitter junction voltage of the switching transistor.

We have now designed a circuit protection device that is bidirectional and, in the preferred embodiments, at least protects an AC circuit. Specifically, we have designed a circuit protection device using a pair of field effect transistors (FETs). For the switch, the pair of transistors is preferably configured such that one is forward biased and the other is reverse biased for any voltage across the device.

Accordingly, the present invention provides a device for connection in an electrical circuit, the device comprising:

(1) A pair of FETs, connected in series in one line of a circuit, with their sources or drains connected together, whose state can be changed by applying a voltage to each of their gates (usually by substituting one voltage for the other a voltage conducted);

(2) a controller connected to the gate of at least one (preferably two) FETs;

The controller reacts to overcurrent on the line, changing the state of the FET.

This kind of device preferably not only acts as a current limiter (that is, the allowable current rises as the voltage drop across the device increases to a certain range, and the current remains constant when the range is exceeded), but also when the voltage across the device reaches a certain threshold voltage, the current just drop. The voltage drop is usually caused by the resistance of the current flowing through the device, and then the excess current will greatly weaken the current flowing thereafter. This situation can be regarded as "return", but the degree of return may be less than 100%.

The characteristics of FET itself can be regarded as the current limiting effect, that is, from the relationship curve of its ID (drain current) to V _DS (drain-source voltage), it can be seen that from V _DS = 0 to a certain threshold where the _ID value is stable, there is risen. There is a series of such curves for different values of V _GS (gate-source voltage).

The role of the controller is preferably to make V _GS more negative (in the case of trench FETs) as V _DS rises (and thus the current through the device increases), so that the operating point increases from an I _D -V _DS curve shifts to another curve. The result is a feedback effect.

Enhancement n-channel FETs differ from depletion n-channel FETs in the way this process occurs. The enhancement mode FET requires a bias voltage to turn on properly, so the role of the controller is to remove this bias voltage, for example, to reduce V _GS from, for example, 5 volts to 0 volts. On the other hand, the depletion mode FET is turned on when V _GS =0, where the role of the controller is to reduce V _GS to eg -5 volts.

The controller can consist of a switch that applies a voltage (in the case of an n-channel depletion FET) or reduces or removes a positive voltage (in the case of an n-channel enhancement FET), and can be essentially instantaneous in doing so, Step by step, depending on the required return speed. The controller can consist of transistors whose resistance forms the switch.

The opposite is true for P-channel FETs, where a voltage of more positive polarity is applied to the gate (e.g. -5 volts to 0 volts for an enhancement FET, and from 0 volts to +5 volts for a depletion FET, for example) causing the FET to due.

The gate or base voltage of the transistor (whose value determines this resistance) allows it to be automatically related to the voltage drop across the device and thus to the value of the current to be controlled.

The return process can include positive feedback and thus can be very fast. Generally, when the FET is n-channel, its channel resistance increases as the polarity of the gate voltage becomes more negative, and when the FET is p-channel, its channel resistance increases as the polarity of the gate voltage becomes more positive . In addition, the input to the controller is the voltage drop across the FET, which itself is a function of the channel resistance, and the output of the controller is the V _GS value. Therefore, the excess current is stored by the controller as a voltage drop across the FET, which causes a change in V _GS . A change in V _GS increases the channel resistance, which increases the voltage drop across the FET, which in turn causes a further change in V _GS , and so on.

When we say FETs are connected together, we also include the possibility of connecting other components like resistors between them. The resistance value of any such resistor is preferably less than 100 kilohms, and more ideally substantially equal to 0 ohms.

We prefer to configure FETs so that their sources are connected together rather than their drains, because this allows their gates to be connected together and controlled with a single voltage signal. This is because it is the gate-source (not gate-drain) voltage that controls the source-drain resistance, and thus the resistance of the device. If the drain sides are connected together, the sources must be at different voltages from each other; if you want to get the gate-source voltages correct, the two gate voltages will usually be different.

The device is preferably used as overcurrent protection and/or as a remote switch in telecommunication lines such as telephone lines or other communication lines. The device may comprise a first pair of FET (1) and controller (2) connected to one wire of the line, and a second pair of FET (1) and controller (2) connected to the other wire of the line on a wire. In addition, a shunt switch may be provided to interconnect the conductors of the line, for example to bypass overvoltage across a telephone or other load in the circuit, or to ground both conductors. This shunt switch can be actuated by this controller or another controller.

The invention also provides a telecommunications system or other system comprising a communication line and the apparatus of the invention in which the voltage is generated from a bias voltage on the line. The present invention also provides terminal equipment equipped with the device of the present invention, such as telephones, computers, network interface devices or switching switches.

Typically, each FET in a pair of FETs can be either an enhancement FET or a depletion FET, and both can be n-channel or p-channel FETs. The enhancement mode FET should be off under normal conditions and usually requires a bias voltage to turn it on. At this time, the controller is used to remove the bias voltage according to the overcurrent, but also according to a separate gating signal. This can be achieved by opening a switch that applies a bias voltage to the FET or by shorting the gate and source of the FET.

The depletion mode FET should be turned on under normal conditions, in this case the controller can be used to apply bias voltage to the FET according to the overcurrent, or according to a separate gating signal.

Mixing an enhancement-mode and a depletion-mode FET is not currently recommended because doing so would require the controller to control the FETs in the opposite manner, making it more complex.

In a preferred embodiment, we provide a device that can be connected in series in the circuit to protect the circuit from overcurrent, the device comprising:

(i) A pair of enhancement mode FETs (preferably n-channel type), connected in series in the line, with their sources connected together, the two FETs can be biased by applying a voltage source to their gates to make them conduct Pass;

(ii) A pair of control transistors, each connected between the gate and source of one of the FETs; each control transistor becomes biased on when the device encounters an overcurrent, thereby turning off both FETs.

The present invention has the advantage that the voltage appearing across the device is reduced, the device can handle current bi-directionally, and in the preferred embodiment the switch can be remotely actuated by changing the output of the voltage source.

It is entirely possible to manufacture devices with a voltage drop of no more than 1 volt, for example no more than 0.6 volts, especially about 0.5 volts, at a line current of 50 mA. This voltage drop is due to the forward biased FET channel resistance and the voltage drop across the parasitic diode present in the reverse biased FET. Of course, a FET with a lower channel resistance will have a lower voltage drop across it for the same current. Typically, parasitic diodes are leaky (which is best), so the voltage drop across the parasitic diode is only about 0.1 volts at 50mA. At least in the case of enhancement-mode FETs, when the gate is forward-biased and the drain-source currents are reversed, the parasitic diode behavior is essentially linear rather than the usual nonlinear diode behavior. Additionally, the device can be used directly in AC circuits, eliminating the need for a rectifier bridge (which would add another 1.3 volts to the voltage drop).

As mentioned above, the characteristic of the device is preferably foldback, that is, the current flowing through the device increases with the voltage drop across the device until the voltage drop reaches a certain voltage difference called the threshold voltage, At this point the current through the device drops to a smaller value. Usually, the ratio of the maximum leakage current of the device in the non-conducting state to the maximum current (tripping current) of the device in the conducting state is not greater than 0.5, more ideally not greater than 0.1, especially not greater than 0.01. In many cases, this ratio can be less than 10 ⁻⁴ . Depending on how the FET's biasing mechanism works, the device can be made to have a "slow" or "fast" foldback characteristic. A device is said to have fast foldback characteristics if it can quickly switch from its on-state to its off-state in, say, less than 100 microseconds, if the transition from the on-state to the off-state is relatively fast. Long, it can be said that the device has a slow return characteristic. Which feature is better depends on the purpose of the circuit. For example, when a device with fast foldback characteristics is in the current transition process, it usually allows less energy to be supplied to the load, and when the load of the circuit has a large inductance or needs to make the device respond to the short-term Slower foldback characteristics may be more desirable when current transitions are less sensitive.

The control transistor can be a bipolar transistor or a FET. The base or gate of each control transistor is usually fixed in a voltage divider across the device. In this way, the voltage appearing across the device due to the resistance of the switching FET, etc., is passed to the base or gate of each control transistor.

When the emitter junction voltage rises above 0.6 volts or the gate-to-source voltage rises to the threshold voltage of the control transistor, they turn on and "short" the gate and source of the switching FET, turning it off.

If necessary, the device can be remotely controlled or connected to a fixed voltage source. In this case, the device only functions as an overcurrent protection switch. The voltage source can be fixed eg by connecting to the line voltage (or a fraction of the line voltage), or it can be reversed by means of a voltage doubler circuit or the like.

Although the above device need only be a two-terminal device, it is also possible according to the invention to form a three-terminal device, wherein the third terminal is connected when an overcurrent occurs, so as to shunt the current flowing from the load to the ground terminal. .

A five-terminal protective device for the protection of a pair of lines, such as that commonly used in the telephone protection industry, may be constructed using the overcurrent protective device described above, which may use two shunt devices for shunting the overcurrent to an earth terminal and/or Or a single shunt across both ends of the line.

The device of the invention is particularly suitable for use as a series switch in a maintenance terminal unit (MTU). Such an MTU is described in our pending UK patent application 9223770 entitled "Power Line Testing Apparatus", the disclosure of which is incorporated herein by reference.

This patent application claims a switching device connectable in a communication channel consisting of a pair of wires, the switching device comprising:

(1) a series switch connected in each line and preferably controlled by a voltage generator whose power is derived from the voltage present between the lines, preferably controlled by a control circuit;

(2) a shunt switch, connected between the lines, which may be connected on the exchange side or the customer side of the series switch; and

(3) The control circuit can activate the series switch and the shunt switch when receiving the signal sent along the channel;

Wherein the control circuit can activate the shunt switch and the series switch when receiving a single signal, but the shunt switch will remain closed for a period of time other than when the series switch is still open, so that various tests can be carried out on the channel;

If the shunt switch is on the switching side of the series switch, the shunt switch is preferably opened before the series switch is closed after each switch is activated by the control circuit; and

If the shunt switch is on the user side of the series switch, after each switch is activated by the control circuit, the series switch is preferably closed before the shunt switch is opened.

The content of the present invention is illustrated by way of example with reference to the accompanying drawings:

Figure 1 is a circuit diagram of a device employing two enhancement mode FETs;

Figure 2 is a circuit diagram of a device employing two depletion mode FETs;

Figure 3 (1-3) is a circuit diagram of a device employing two pairs of FETs and two controllers;

Figure 4 (1-2) is a circuit diagram using some charge pumps.

See Figure 1. The switching means of circuit line 1 comprises a pair of n-channel enhancement mode field effect transistors Q1 and Q2 arranged such that their sources are connected together so that one of these transistors is always forward biased and the other is always forward biased. Reverse biased (but which one is forward biased and which one is reverse biased depends on the polarity of the line voltage). When one of these FETs is reverse biased, current flows in its "parasitic" drain-source diode, producing a very low voltage drop. This makes the AC characteristics of the circuit essentially linear.

The gates of the two FETs Q1 and Q2 are connected together, and this node is connected to the positive voltage source 2 . This node is also connected to the sources of the two FETs Q1 and Q2 via a 10 megohm resistor R1 to prevent the gate terminals from floating.

Here a pair of NPN bipolar control transistors Q3 and Q4 are provided, the respective emitters of which are preferably connected together so that each transistor Q3 and Q4 is connected between the gate and source terminals of the respective FET, Q1 and Q2 . The bases of the bipolar transistors are tied to a pair of voltage dividers consisting of resistors R2, R3, R4 and R5, each connected across FET Q1 or Q2.

When working, when the voltage source 2 is turned on, FETQ1 and Q2 are turned on due to entering the bias state, so that current can flow in the line, and the current flows through the parasitic diode of the reverse biased FET. If an overcurrent occurs, the base-emitter voltage of control transistors Q3 and Q4 rises to about 0.7 volts, and these transistors turn on, shorting the gates and sources of FETs Q1 and Q2 and turning off the two FETs , and then disconnect the line, protecting any equipment connected to the line. The flow of current can also be controlled by changing the voltage of the voltage source 2 when necessary.

Even after the overcurrent has passed, the device remains off because the entire system voltage is dropped across the device, ensuring that the control transistors remain on. In this state, the only leakage current is due to the four series connected resistors R2 to R5. This leakage current can be reduced to a satisfactory level by choosing a high value, for example 1 megohm, for each of the resistors R2 to R5. The device is resettable simply by removing the line voltage, causing control transistors Q3 and Q4 to turn off.

Some capacitors (not shown) can be placed in parallel between resistors R2 and R4 to prevent the device from opening when power is initially applied to the line and to prevent the over current on the line normally caused by the activation of the control transistors Q3 and Q4 of parasitic current spikes.

Although it is said that the bipolar overcurrent control transistors Q3 and Q4 are used when the device is described above, field effect transistors, relays or other devices or circuits can also be used at all.

Figure 2 shows the setup consisting of two depletion mode FETs Q2 and Q3 and a controller. The device is plugged into line 1. The controller 3 includes rectifiers D1 , D2 , D3 , D4 , a regulator 4 and a negative voltage generator 5 . Regulator 4 is composed of FET Q1 and resistor R1, and the negative voltage generator is based on 7660 integrated circuit plus capacitors C1 and C2. A variable resistor RV1 is provided so that the degree of foldback can be selected by adjusting the negative voltage applied to the respective gates of FETs Q2 and Q3.

Current flows from the source connected to J1 through FETs Q2 and Q3 to the load connected to J2 (the return line is not shown in the figure). The flow of this current causes a voltage drop across Q2 and Q3, which is proportional to the current due to the essentially linear resistance characteristics of the paired FETs. As shown in Figure 1, one FET is forward biased and the other FET has a parasitic diode that allows current to flow in the reverse direction.

A fault causing an overcurrent causes an increase in the voltage across FETs Q2 and Q3, which is applied to the negative voltage generator 5 of the controller 3. Thanks to the rectifiers D1, D2, D3, D4, the negative voltage generator steers either direction of the current occurring in line 1 and the device will work on the AC line.

When the tripping value required by the device is reached, the negative voltage generator 5 applies the required negative bias voltage to each gate of FET Q2 and Q3, so that the two FETs are cut off. In this way, line 1 is disconnected, which protects the equipment connected to line 1.

The circuit shown in Figure 3 has two devices substantially of the type shown in Figure 1, one for each of the two lines, for example the tip and ring lines of a telecommunications system. In this circuit, the bias voltage for each FET is generated by the optoelectronic device 6 . In some cases, such optoelectronic devices draw a lot of line current, and when there is such a problem, we prefer to use a voltage doubler or a charge pump to provide the bias voltage, together with a voltage divider etc. if necessary. Figure 4 shows a suitable circuit to meet our current requirements for reducing power consumption, where the charge pump is shown in Figure 7.

Components are available in various ratings, but we prefer the ratings listed below.

The current rating of each FET is preferably greater than 1 mA, more desirably greater than 10 mA, especially greater than 100 mA, and preferably less than 500 A, usually less than 10 A, often less than 1 A. Various types of FETs can be used, including MOSFETs and JFETs and n-channel and p-channel types, including combinations thereof.

Their channel resistance is preferably less than 1 kohm, and more ideally less than 100 ohms when turned on. On-resistance is typically greater than 2 milliohms, often greater than 100 milliohms.

The ideal voltage rating is 1500 volts to 20 volts, especially 400 volts 20 volts, and the ideal power consumption is between 1 kilowatt and 200 milliwatts, typically from 1 watt to 100 milliwatts. Ideal gate thresholds are between 10 volts and 0.8 volts, especially from 1-4 volts.

The bipolar transistors of the controller preferably have the following characteristics:

V _CEO (Max) 20-400 Volts

Ic (Max) 100mA-500mA

hfc 10-100

Claims (15)

1. A device for connecting in a circuit, characterized in that it comprises: (1) A pair of FETs, connected in series in one line of the circuit, with their sources or drains connected together, and their state can be changed by the voltage applied to their gates; (2) a controller connected to the gate of at least one of the FETs; The controller changes the state of at least one of the FETs in response to overcurrent on the line. 2. The apparatus of claim 1 wherein each FET is an enhancement mode FET which can be biased into conduction by applying a voltage to its gate, the voltage being removed by the controller. 3. The apparatus of claim 1 wherein each FET is a depletion FET capable of being turned off by the controller. 4. A device as claimed in any preceding claim, wherein the controller is powered by a voltage drop across the device. 5. The device according to claim 4, characterized in that the controller is composed of a pair of control transistors, each control transistor is connected between the gate and source of one of the FETs, when the device encounters an overcurrent, each control transistor The transistor is biased and turned on. 6. The apparatus of claim 5 wherein each FET is an enhancement mode FET and each control transistor is arranged to short the gate and source of each FET when conductive. 7. The device of claim 5, wherein each FET is a depletion FET, and each control transistor is arranged to connect a voltage source to each gate and each source of each FET when conducting. between. 8. A device as claimed in claim 6 or 7, characterized in that the base or gate of the or each control transistor is fixed in a voltage divider across the device. 9. A device as claimed in any preceding claim, wherein the controller also changes the state of the FET in response to an external gating signal which changes the voltage on the gate. 10. Apparatus according to any preceding claim, for connection in a communication line, the arrangement comprising: a first pair of FETs (1) and a controller (2), connected in a conductor in the line; and a second For the FET (1) and the controller (2), connect in the other wire of the line. 11. Apparatus according to any preceding claim, for connection in a communication line, the apparatus further comprising a shunt switch which, when actuated by the or another controller, interconnects the conductors of the line or connects the lines to each other. A wire is connected to ground. 12. A device as claimed in any one of the preceding claims, wherein the controller causes the V _GS of at least one of the n-channel FETs to decrease as the FET's V _DS increases so that the FET behaves as a foldback, Alternatively, the controller causes the V _GS of at least one of the P-channel FETs to increase as the FET's V _DS increases, thereby making the FET behave like a foldback. 13. The apparatus of claim 12, wherein the foldback process includes positive feedback due to an increase in the channel resistance of the FET as the value of V _GS varies. 14. A communication system comprising a communication line and apparatus as claimed in any preceding claim, wherein the voltage is generated from a DC bias on the line. 15. A terminal equipment of a telecommunication system provided with a device as claimed in any one of claims 1-14.

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